Modeling Universal Instruction Selection
2015 (English)In: Principles and Practice of Constraint Programming: 21st International Conference, CP 2015, Cork, Ireland, August 31 -- September 4, 2015, Proceedings / [ed] Gilles Pesant, Springer, 2015, Vol. 9255, 609-626 p.Conference paper (Refereed)
Instruction selection implements a program under compilation by selecting processor instructions and has tremendous impact on the performance of the code generated by a compiler. This paper introduces a graph-based universal representation that unifies data and control flow for both programs and processor instructions. The representation is the essential prerequisite for a constraint model for instruction selection introduced in this paper. The model is demonstrated to be expressive in that it supports many processor features that are out of reach of state-of-the-art approaches, such as advanced branching instructions, multiple register banks, and SIMD instructions. The resulting model can be solved for small to medium size input programs and sophisticated processor instructions and is competitive with LLVM in code quality. Model and representation are significant due to their expressiveness and their potential to be combined with models for other code generation tasks.
Place, publisher, year, edition, pages
Springer, 2015. Vol. 9255, 609-626 p.
, Lecture Notes in Computer Science, 9255
instruction selection, global code motion, code generation, optimizing compilers, program representations, modern processor architectures
Research subject Computer Science
IdentifiersURN: urn:nbn:se:kth:diva-169684DOI: 10.1007/978-3-319-23219-5_42ScopusID: 2-s2.0-84944558675ISBN: 978-3-319-23219-5OAI: oai:DiVA.org:kth-169684DiVA: diva2:824504
21st International Conference on Principles and Practice of Constraint Programming,August 31-September 4, 2015, Ireland
FunderSwedish Research Council, VR 621-2011-6229
QC 201508282015-06-222015-06-222015-08-28Bibliographically approved