Integration of GMR-based spin torque oscillators and CMOS circuitry
2015 (English)In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 111, 91-99 p.Article in journal (Refereed) Published
This paper demonstrates the integration of giant magnetoresistance (GMR) spin torque oscillators (STO) with dedicated high frequency CMOS circuits. The wire-bonding-based integration approach is employed in this work, since it allows easy implementation, measurement and replacement. A GMR STO is wire-bonded to the dedicated CMOS integrated circuit (IC) mounted on a PCB, forming a (GMR STO + CMOS IC) pair. The GMR STO has a lateral size of 70 nm and more than an octave of tunability in the microwave frequency range. The proposed CMOS IC provides the necessary bias-tee for the GMR STO, as well as electrostatic discharge (ESD) protection and wideband amplification targeting high frequency GMR STO-based applications. It is implemented in a 65 nm CMOS process, offers a measured gain of 12 dB, while consuming only 14.3 mW and taking a total silicon area of 0.329 mm2. The measurement results show that the (GMR STO + CMOS IC) pair has a wide tunability range from 8 GHz to 16.5 GHz and improves the output power of the GMR STO by about 10 dB. This GMR STO-CMOS integration eliminates wave reflections during the signal transmission and therefore exhibits good potential for developing high frequency GMR STO-based applications, which combine the features of CMOS and STO technologies.
Place, publisher, year, edition, pages
2015. Vol. 111, 91-99 p.
CMOS, Giant magnetoresistance, Integration, On-chip bias-tee, Spin torque oscillator, Wire bonding
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-170209DOI: 10.1016/j.sse.2015.05.037ISI: 000358294500016ScopusID: 2-s2.0-84930627106OAI: oai:DiVA.org:kth-170209DiVA: diva2:827652
QC 201506292015-06-292015-06-292015-11-12Bibliographically approved