Efficient STDP Micro-Architecture for Silicon Spiking Neural Networks
2014 (English)In: 2014 17TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD), 2014, 496-503 p.Conference paper (Refereed)
Spiking neural networks (SNNs) are the closest approach to biological neurons in comparison with conventional artificial neural networks (ANN). SNNs are composed of neurons and synapses which are interconnected with a complex pattern. As communication in such massively parallel computational systems is getting critical, the network-on-chip (NoC) becomes a promising solution to provide a scalable and robust interconnection fabric. However, using NoC for large-scale SNNs arises a trade-off between scalability, throughput, neuron/router ratio (cluster size), and area overhead. In this paper, we tackle the trade-off using a clustering approach and try to optimize the synaptic resource utilization. An optimal cluster size can provide the lowest area overhead and power consumption. For the learning purposes, a phenomenon known as spike-timing-dependent plasticity (STDP) is utilized. The micro-architectures of the network, clusters, and the computational neurons are also described. The presented approach suggests a promising solution of integrating NoCs and STDP-based SNNs for the optimal performance based on the underlying application.
Place, publisher, year, edition, pages
2014. 496-503 p.
Spiking Neural Network, Networks-on-Chip, STDP, Neuron Clustering
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-172645DOI: 10.1109/DSD.2014.109ISI: 000358409000065ScopusID: 2-s2.0-84928783203ISBN: 978-1-4799-5793-4OAI: oai:DiVA.org:kth-172645DiVA: diva2:849094
17th Euromicro Conference on Digital System Design (DSD), AUG 27-29, 2014, Verona, ITALY
QC 201508272015-08-272015-08-272016-04-13Bibliographically approved