Designing 2D and 3D network-on-chip architectures
2014 (English)Book (Other academic)
This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect. It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools. Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms, NoC router design, NoC-based system integration, verification and testing, and NoC reliability. Case studies are used to illuminate new design methodologies.
Place, publisher, year, edition, pages
Springer New York , 2014. , 265 p.
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-174754DOI: 10.1007/978-1-4614-4274-5ScopusID: 2-s2.0-84929574081ISBN: 9781461442745ISBN: 978-146144273-8OAI: oai:DiVA.org:kth-174754DiVA: diva2:859482
QC 201510072015-10-072015-10-072015-10-07Bibliographically approved