Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Prefetching for the Kilo-Instruction Processor
KTH, School of Information and Communication Technology (ICT).
2015 (English)Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

The large latency of memory accesses in modern computer systems is a key obstacle to achieving high processor utilization. Techniques to reduce or tolerate large memory latencies become essential for achieving high processor utilization. Prefetch is one of the most widely studied mechanisms at literature. This mechanism predicts the future effective addresses of loads to bring in advance their data to the upper and faster levels of the memory hierarchy. Another technique to alleviate the memory gap is the out-of-order commit, implemented in the Kilo-Instruction processors. This technique is based on the fact that independent instructions of a delinquent load can be executed even if the data for that load is not still available. The goal of this thesis project is to study a stride prefetching mechanism built on top of a Kilo-Instruction processor. I implemented the stride prefetching mechanism on SimpleScalar 3.0 and evaluate several sets of prefetch parameters by simulating them in a Kilo-instruction processor environment using the SPEC2000 benchmarks. The results show that the prefetching scheme effectively eliminates a major portion of data access penalty for a uniprocessor environment but provides less than 15% speedup improvement when applied to the Kilo-Instruction processor.

Place, publisher, year, edition, pages
2015.
Series
TRITA-ICT-EX, 2015:19
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:kth:diva-174843OAI: oai:DiVA.org:kth-174843DiVA: diva2:859497
Subject / course
Computer Systems
Educational program
Master of Science in Engineering - Computer Science and Technology
Supervisors
Examiners
Available from: 2015-10-07 Created: 2015-10-07 Last updated: 2017-08-04Bibliographically approved

Open Access in DiVA

fulltext(1204 kB)10 downloads
File information
File name FULLTEXT01.pdfFile size 1204 kBChecksum SHA-512
43ff0d3a8380f388c1bdd491e86ff032eff4de2eef13e006508e63581560ce9e4dd03984c33ded132c4eaa73b980ec353d826caec953cab8f4d33e11995c2192
Type fulltextMimetype application/pdf

By organisation
School of Information and Communication Technology (ICT)
Engineering and Technology

Search outside of DiVA

GoogleGoogle Scholar
Total: 10 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

urn-nbn

Altmetric score

urn-nbn
Total: 58 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf