Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Short Message Network-On-Chip Interconnect for ASIC
KTH, School of Information and Communication Technology (ICT).
2014 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

The rise of large scale integration has resulted in large number of processing elements/cores on a single ASIC. Thus an efficient interconnect scheme between the different processing elements and interfaces is required. Bus based interconnect poses problems such as non-scalability. This thesis explores the Network-on-Chip (NOC) as a global interconnect scheme on a state of the art ASIC. Different On-chip interconnect techniques proposed by the academia/industry are summarized and Design space exploration of NOC schemes is performed. A Network-on-Chip interconnect, primarily utilized for short messaging service between the processing elements/nodes in the ASIC, is designed for Ericsson ASICs. Practical ASIC design issues such as non-uniform network topology (irregular mesh) and performance immunity of interconnect due to variations in the floorplan are addressed in the NOC design. The proposed Network-on-chip interconnect for Ericsson ASICs is evaluated in terms of varying traffic models, routing algorithms, NOC router FIFO depths and floor plans. The SystemC cycle accurate performance results of NOC are compared with the currently implemented Bus based solution for the Ericsson ASIC.

Place, publisher, year, edition, pages
2014.
Series
TRITA-ICT-EX, 2014:190
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-175761OAI: oai:DiVA.org:kth-175761DiVA: diva2:862201
Examiners
Available from: 2015-10-23 Created: 2015-10-20 Last updated: 2017-08-03Bibliographically approved

Open Access in DiVA

fulltext(21452 kB)28 downloads
File information
File name FULLTEXT01.pdfFile size 21452 kBChecksum SHA-512
11d71b2e12f0d170da9cdd08ba0a2d440ceb893d69688788aae21b92e2b12c0d97e1fcf2330630b5be137f7779dbc9ce7f0862d844804d22a0b5e8b937e6ad9c
Type fulltextMimetype application/pdf

By organisation
School of Information and Communication Technology (ICT)
Electrical Engineering, Electronic Engineering, Information Engineering

Search outside of DiVA

GoogleGoogle Scholar
Total: 28 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

urn-nbn

Altmetric score

urn-nbn
Total: 219 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf