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Implementation and Evaluation of Concurrency on Parallella
KTH, School of Information and Communication Technology (ICT).
KTH, School of Information and Communication Technology (ICT).
2014 (English)Independent thesis Basic level (degree of Bachelor), 10 credits / 15 HE creditsStudent thesis
Abstract [en]

The question asked is what optimizations can be done when working with the Parallella board from Adapteva and how they di er from other concurrent solutions. Parallella is a small super computer with a unique 16 core co-processor that we were to utilize. We have been working to parallelizing image manipulation software, and then analyzing the results of some performed tests. The goal is to conclude how to properly utilize the Epiphany accelerator, and also see how it performs in comparison to other CPUs. This project is a part of the PaPP project, which will utilize Parallella, and the work can be seen as an initial evaluation of the board. We have tested the board to see how it holds up and made our best e orts to adapt to the hardware and explain our path of working.

This report is worth reading for anyone who has little experience with Parallella, who desires to learn how well it works and what it's good for. There are descriptions of all libraries used and detailed thoughts on how to implement software solutions for Epiphany. This is a bachelor level project and was performed with no prior knowledge of Parallella.

Place, publisher, year, edition, pages
2014. , 54 p.
Series
TRITA-ICT-EX, 2014:155
National Category
Computer and Information Science
Identifiers
URN: urn:nbn:se:kth:diva-177385OAI: oai:DiVA.org:kth-177385DiVA: diva2:872598
Examiners
Available from: 2015-11-19 Created: 2015-11-19 Last updated: 2017-08-03Bibliographically approved

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CiteExportLink to record
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Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
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  • de-DE
  • en-GB
  • en-US
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  • nn-NO
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  • Other locale
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Output format
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