Impact of pattern dependency of SiGe layers grown selectively in source/drain on the performance of 22 nm node pMOSFETs
2015 (English)In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 114, 43-48 p.Article in journal (Refereed) Published
Pattern dependency of selective epitaxy of Si<inf>1</inf><inf>-</inf><inf>x</inf>Ge<inf>x</inf> (0.20 ≤ x ≤ 0.45) grown in recessed source/drain regions of 22 nm pMOSFETs has been studied. A complete substrate mapping over 200 mm wafers was performed and the transistors' characteristics were measured. The designed SiGe profile included a layer with Ge content of 40% at the bottom of recess (40 nm) and capped with 20% Ge as a sacrificial layer (20 nm) for silicide formation. The induced strain in the channel was simulated before and after silicidation. The variation of strain was localized and its effect on the transistors' performance was determined. The chips had a variety of SiGe profile depending on their distance (closest, intermediate and central) from the edge of the 200 mm wafer. SiGe layers with poor epi-quality were observed when the coverage of exposed Si of the chip was below 1%. This causes high Ge contents with layer thicknesses above the critical thickness.
Place, publisher, year, edition, pages
Elsevier, 2015. Vol. 114, 43-48 p.
CMOS, RPCVD, Selective epitaxy, SiGe, CMOS integrated circuits, Epitaxial growth, Germanium, MOSFET devices, Silicides, Silicon wafers, Critical thickness, Pattern dependencies, Sacrificial layer, Silicide formation, Source/drain regions, Silicon alloys
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-176177DOI: 10.1016/j.sse.2015.07.003ISI: 000363193300008ScopusID: 2-s2.0-84938330179OAI: oai:DiVA.org:kth-176177DiVA: diva2:874685
QC 201511272015-11-272015-11-022015-12-16Bibliographically approved