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Dependable Multicore Architectures at Nanoscale: The View From Europe
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2015 (English)In: IEEE Design & Test, ISSN 2168-2356, Vol. 32, no 2, 17-28 p., 6905763Article in journal (Refereed) Published
Abstract [en]

The introduction of multicore chips allowed the constant increase in delivered performance otherwise impossible to achieve. Multiple microprocessor cores from different instruction set architectures stay at the epicenter of such chips and are surrounded by memory cores of different technologies, sizes and functionalities, as well as by peripheral controllers, special function cores, analog and mixed-signal cores, reconfigurable cores, etc. The functionality as well as the complexity of multicore chips is unprecedented.

Place, publisher, year, edition, pages
IEEE , 2015. Vol. 32, no 2, 17-28 p., 6905763
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Mechanical Engineering
URN: urn:nbn:se:kth:diva-179123DOI: 10.1109/MDAT.2014.2359572ISI: 000354407400003ScopusID: 2-s2.0-84926315110OAI: diva2:881364

QC 20151211

Available from: 2015-12-10 Created: 2015-12-10 Last updated: 2015-12-11Bibliographically approved

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Izosimov, Viacheslav
Mechanical Engineering

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