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Synthesis of Fault-Tolerant Embedded Systems with Checkpointing and Replication
Computer and Information Science Dept., Linköping University, Sweden.ORCID iD: 0000-0003-1768-6697
2006 (English)Conference paper (Other academic)
Abstract [en]

We present an approach to the synthesis of fault-tolerant hard real-time systems for safety-critical applications. We use checkpointing with rollback recovery and active replication for tolerating transient faults. Processes are statically scheduled and communications are performed using the time-triggered protocol. Our synthesis approach decides the assignment of fault-tolerance policies to processes, the optimal placement of checkpoints and the mapping of processes to processors such that transient faults are tolerated and the timing constraints of the application are satisfied. We present several synthesis algorithms which are able to find fault-tolerant implementations given a limited amount of resources. The developed algorithms are evaluated using extensive experiments, including a real-life example

Place, publisher, year, edition, pages
IEEE , 2006. 440-447 p.
National Category
Mechanical Engineering
Identifiers
URN: urn:nbn:se:kth:diva-179566DOI: 10.1109/DELTA.2006.83ISBN: 0-7695-2500-8OAI: oai:DiVA.org:kth-179566DiVA: diva2:884084
Conference
3rd IEEE Intl. Workshop on Electronic Design, Test & Applications (DELTA), Kuala Lumpur, Malaysia.
Note

QC 20160119

Available from: 2015-12-17 Created: 2015-12-17 Last updated: 2016-01-19Bibliographically approved

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Izosimov, Viacheslav
Mechanical Engineering

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ReferencesLink to record
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