Synthesis of Fault-Tolerant Embedded Systems with Checkpointing and Replication
2006 (English)Conference paper (Other academic)
We present an approach to the synthesis of fault-tolerant hard real-time systems for safety-critical applications. We use checkpointing with rollback recovery and active replication for tolerating transient faults. Processes are statically scheduled and communications are performed using the time-triggered protocol. Our synthesis approach decides the assignment of fault-tolerance policies to processes, the optimal placement of checkpoints and the mapping of processes to processors such that transient faults are tolerated and the timing constraints of the application are satisfied. We present several synthesis algorithms which are able to find fault-tolerant implementations given a limited amount of resources. The developed algorithms are evaluated using extensive experiments, including a real-life example
Place, publisher, year, edition, pages
IEEE , 2006. 440-447 p.
IdentifiersURN: urn:nbn:se:kth:diva-179566DOI: 10.1109/DELTA.2006.83ISBN: 0-7695-2500-8OAI: oai:DiVA.org:kth-179566DiVA: diva2:884084
3rd IEEE Intl. Workshop on Electronic Design, Test & Applications (DELTA), Kuala Lumpur, Malaysia.
QC 201601192015-12-172015-12-172016-01-19Bibliographically approved