Change search
ReferencesLink to record
Permanent link

Direct link
Going ballistic: Graphene hot electron transistors
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.ORCID iD: 0000-0003-1234-6060
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
Show others and affiliations
2015 (English)In: Solid State Communications, ISSN 0038-1098, E-ISSN 1879-2766, Vol. 224, 64-75 p.Article in journal (Refereed) PublishedText
Abstract [en]

This paper reviews the experimental and theoretical state of the art in ballistic hot electron transistors that utilize two-dimensional base contacts made from graphene, i.e. graphene base transistors (GBTs). Early performance predictions that indicated potential for THz operation still hold true today, even with improved models that take non-idealities into account. Experimental results clearly demonstrate the basic functionality, with on/off current switching over several orders of magnitude, but further developments are required to exploit the full potential of the GBT device family. In particular, interfaces between graphene and semiconductors or dielectrics are far from perfect and thus limit experimental device integrity, reliability and performance.

Place, publisher, year, edition, pages
Elsevier, 2015. Vol. 224, 64-75 p.
Keyword [en]
Graphene, Hot electron transistors graphene base transistor, GBT, HBT, Ballistic transport, NEGF
National Category
Physical Sciences
URN: urn:nbn:se:kth:diva-180239DOI: 10.1016/j.ssc.2015.08.012ISI: 000366070300013ScopusID: 2-s2.0-84947603528OAI: diva2:895050

QC 20160118

Available from: 2016-01-18 Created: 2016-01-08 Last updated: 2016-05-03Bibliographically approved
In thesis
1. Graphene Hot-electron Transistors
Open this publication in new window or tab >>Graphene Hot-electron Transistors
2016 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

Graphene base transistors (GBTs) have been, recently, proposed to overcome the intrinsic limitations of the graphene field effect transistors (GFETs) and exploit the graphene unique properties in high frequency (HF) applications. These devices utilize single layer graphene as the base material in the vertical hot-electron transistors. In an optimized GBT, the ultimate thinness of the graphene-base and its high conductivity, potentially, enable HF performance up to the THz region.  This thesis presents an experimental investigation on the GBTs as well as integration process developments for the fabrication of graphene-based devices.

In this work, a full device fabrication and graphene integration process were designed with high CMOS compatibility considerations. To this aim, basic process modules, such as graphene transfer, deposition of materials on graphene, and formation of tunnel barriers, were developed and optimized. A PDMS-supporting graphene transfer process were introduced to facilitate the wet/dry wafer-scale transfer from metal substrate onto an arbitrarily substrate. In addition, dielectric deposition on graphene using atomic layer deposition (ALD) was investigated. These dielectric layers, mainly, served as the base-collector insulators in the fabricated GBTs. Moreover, the integration of silicon (Si) on the graphene surface was studied.

Using the developed fabrication process, the first proof of concept devices were demonstrated. These devices utilized 5 nm-thick silicon oxide (SiO2) and about 20 nm-thick aluminum oxide (Al2O3) as the emitter-base insulator (EBI) and base-collector insulator (BCI). The direct current (DC) functionality of these devices exhibited >104 on/off current ratios and a current transfer ratio of about 6%. The performance of these devices was limited by the non-optimized barrier parameters and device manufacturing technology.

The possibility to improve and optimize the GBT performance was demonstrated by applying different barrier optimization approaches. Comparing to the proof of concept devices, several orders of magnitude higher injection current density was achieved using a bilayer dielectric tunnel barrier. Utilizing the novel TmSiO/TiO2 (1 nm/6 nm) dielectric stack, this tunnel barrier prevents defect mediated tunneling and, simultaneously, promotes the Fowler-Nordheim tunneling (FNT) and step tunneling (ST). Furthermore, it was shown that Si/graphene Schottky junction can significantly improve the current gain by reducing the electron backscattering at the base-collector barrier. In this thesis, a maximum current transfer ratio of about 35% has been achieved.

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2016. xviii, 81 p.
TRITA-ICT, 2016:08
Graphene, hot-electron transistors, graphene base transistors, GBT, cross-plane carrier transport, tunneling, ballistic transport, heterojunction transistors, graphene integration, graphene transfer
National Category
Engineering and Technology
Research subject
Information and Communication Technology
urn:nbn:se:kth:diva-186044 (URN)ISBN 978-91-7595-932-0 (ISBN)
Public defence
2016-05-26, SAL C, Electrum 229, Kista, 10:00 (English)
EU, FP7, Seventh Framework Programme, 317839EU, European Research Council, 228229

QC 20160503

Available from: 2016-05-03 Created: 2016-04-29 Last updated: 2016-05-05Bibliographically approved

Open Access in DiVA

No full text

Other links

Publisher's full textScopus

Search in DiVA

By author/editor
Vaziri, SamSmith, Anderson DavidÖstling, Mikael
By organisation
Integrated Devices and Circuits
In the same journal
Solid State Communications
Physical Sciences

Search outside of DiVA

GoogleGoogle Scholar
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

Altmetric score

Total: 58 hits
ReferencesLink to record
Permanent link

Direct link