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Self-adaptive SoCs for dependability: Review and prospects
KTH, School of Information and Communication Technology (ICT), Industrial and Medical Electronics.
2014 (English)In: Advancing Embedded Systems and Real-Time Communications with Emerging Technologies, IGI Global, 2014, 1-21 p.Chapter in book (Other academic)Text
Abstract [en]

Dependability is a primary concern for emerging billion-transistor SoCs (Systems-on-Chip), especially when the constant technology scaling introduces an increasing rate of faults and errors. Considering the time-dependent device degradation (e.g. caused by aging and run-time voltage and temperature variations), self-adaptive circuits and architectures to improve dependability is promising and very likely inevitable. This chapter extensively surveys existing works on monitoring, decision-making, and reconfiguration addressing different dependability threats to Very Large Scale Integration (VLSI) chips. Centralized, distributed, and hierarchical fault management, utilizing various redundancy schemes and exploiting logical or physical reconfiguration methods, are all examined. As future research directions, the challenge of integrating different error management schemes to account for multifold threats and the great promise of error resilient computing are identified. This chapter provides, for chip designers, much needed insights on applying a self-adaptive computing paradigm to approach dependability on error-prone, cost-sensitive SoCs.

Place, publisher, year, edition, pages
IGI Global, 2014. 1-21 p.
National Category
Computer Engineering
URN: urn:nbn:se:kth:diva-181270DOI: 10.4018/978-1-4666-6034-2.ch001ScopusID: 2-s2.0-84945993140ISBN: 9781466660366 (ISBN); 9781466660359 (ISBN)OAI: diva2:901647

QC 20160208

Available from: 2016-02-08 Created: 2016-01-29 Last updated: 2016-02-08Bibliographically approved

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Tenhunen, Hannu
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