Optimal switching of SiC lateral MOSFETs
2015 (English)In: Power Electronics and Applications (EPE’15 ECCE-Europe), 2015 17th European Conference on, IEEE , 2015, 1-10 p.Conference paper (Refereed)Text
The switching loss of the 1700 V SiC Planar-Gate MOSFET is significant at switching frequencies above 2 kHz. If a simple resistive gate driver is adjusted for the worst case operating point (temperature, commutated voltage and current) with a given application dV/dt requirement, other operating points usually have lower dV/dt resulting in non-optimal losses. The paper shows results of an optimized gate-drive solution, adapting a current source control in order to reduce the losses while fulfilling the application dV/dt requirements.
Place, publisher, year, edition, pages
IEEE , 2015. 1-10 p.
field effect transistor switches;losses;power MOSFET;SiC;lateral MOSFET;optimal switching;planar gate MOSFET;resistive gate driver;switching loss;voltage 1700 V;worst case operating point;Current measurement;Logic gates;MOSFET;Silicon carbide;Switches;Voltage control;Voltage measurement;MOSFET;Silicon Carbide (SiC);Voltage Source Converter (VSC)
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-182757DOI: 10.1109/EPE.2015.7309140ISI: 000377101800091ScopusID: 2-s2.0-84965008185OAI: oai:DiVA.org:kth-182757DiVA: diva2:905688
Power Electronics and Applications (EPE’15 ECCE-Europe), 2015 17th European Conference on
QC 201603162016-02-232016-02-232016-07-06Bibliographically approved