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Register allocation and instruction scheduling in Unison
KTH, School of Information and Communication Technology (ICT), Software and Computer systems, SCS. SICS (Swedish Institute of Computer Science).ORCID iD: 0000-0002-2806-7333
SICS (Swedish Institute of Computer Science).
KTH, School of Information and Communication Technology (ICT), Software and Computer systems, SCS.ORCID iD: 0000-0001-6794-6413
KTH, School of Information and Communication Technology (ICT), Communication: Services and Infrastucture (Closed 20120101), Software and Computer Systems, SCS (Closed 20120101).
2016 (English)Conference paper (Refereed)
Abstract [en]

This paper describes Unison, a simple, flexible, and potentially optimal software tool that performs register allocation and instruction scheduling in integration using combinatorial optimization. The tool can be used as an alternative or as a complement to traditional approaches, which are fast but complex and suboptimal. Unison is most suitable whenever high-quality code is required and longer compilation times can be tolerated (such as in embedded systems or library releases), or the targeted processors are so irregular that traditional compilers fail to generate satisfactory code.

Place, publisher, year, edition, pages
2016.
National Category
Engineering and Technology Computer Systems
Identifiers
URN: urn:nbn:se:kth:diva-183393OAI: oai:DiVA.org:kth-183393DiVA: diva2:910640
Conference
25th International Conference on Compiler Construction, March 17-18, 2016
Note

QC 20160401

Available from: 2016-03-09 Created: 2016-03-09 Last updated: 2016-04-01Bibliographically approved

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25th International Conference on Compiler Construction

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Castañeda Lozano, RobertoHjort Blindell, Gabriel
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ReferencesLink to record
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