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Register allocation and instruction scheduling in Unison
KTH, School of Information and Communication Technology (ICT), Software and Computer systems, SCS. SICS (Swedish Institute of Computer Science).ORCID iD: 0000-0002-2806-7333
SICS (Swedish Institute of Computer Science).
KTH, School of Information and Communication Technology (ICT), Software and Computer systems, SCS.ORCID iD: 0000-0001-6794-6413
KTH, School of Information and Communication Technology (ICT), Software and Computer systems, SCS.ORCID iD: 0000-0002-6283-7004
2016 (English)In: Proceedings of CC 2016: The 25th International Conference on Compiler Construction, Association for Computing Machinery (ACM), 2016, 263-264 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper describes Unison, a simple, flexible, and potentially optimal software tool that performs register allocation and instruction scheduling in integration using combinatorial optimization. The tool can be used as an alternative or as a complement to traditional approaches, which are fast but complex and suboptimal. Unison is most suitable whenever high-quality code is required and longer compilation times can be tolerated (such as in embedded systems or library releases), or the targeted processors are so irregular that traditional compilers fail to generate satisfactory code.

Place, publisher, year, edition, pages
Association for Computing Machinery (ACM), 2016. 263-264 p.
Keyword [en]
Combinatorial optimization, Instruction scheduling, Register allocation
National Category
Computer Systems
Identifiers
URN: urn:nbn:se:kth:diva-183393DOI: 10.1145/2892208.2892237ISI: 000389808800026Scopus ID: 2-s2.0-84966560429ISBN: 9781450342414 (print)OAI: oai:DiVA.org:kth-183393DiVA: diva2:910640
Conference
25th International Conference on Compiler Construction, CC 2016, Barcelona, Spain, 17 March 2016 through 18 March 2016
Note

QC 20161122

Available from: 2016-03-09 Created: 2016-03-09 Last updated: 2017-01-23Bibliographically approved

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  • apa
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