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Dark Silicon Aware Runtime Mapping for Many-core Systems: A Patterning Approach
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2015 (English)In: 2015 33RD IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD), IEEE , 2015, 573-580 p.Conference paper (Refereed)Text
Abstract [en]

Limitation on power budget in many-core systems leaves a fraction of on-chip resources inactive, referred to as dark silicon. In such systems, an efficient run-time application mapping approach can considerably enhance resource utilization and mitigate the dark silicon phenomenon. In this paper, we propose a dark silicon aware runtime application mapping approach that patterns active cores alongside the inactive cores in order to evenly distribute power density across the chip. This approach leverages dark silicon to balance the temperature of active cores to provide higher power budget and better resource utilization, within a safe peak operating temperature. In contrast with exhaustive search based mapping approach, our agile heuristic approach has a negligible runtime overhead. Our patterning strategy yields a surplus power budget of up to 17% along with an improved throughput of up to 21% in comparison with other state-of-the-art run-time mapping strategies, while the surplus budget is as high as 40% compared to worst case scenarios.

Place, publisher, year, edition, pages
IEEE , 2015. 573-580 p.
Keyword [en]
Dark Silicon, Power Budgeting, Runtime Mapping
National Category
Computer Science
Identifiers
URN: urn:nbn:se:kth:diva-184065ISI: 000370645200091ScopusID: 2-s2.0-84962385244ISBN: 978-1-4673-7166-7OAI: oai:DiVA.org:kth-184065DiVA: diva2:914058
Conference
33rd IEEE International Conference on Computer Design (ICCD), OCT 18-21, 2015, New York, NY
Note

QC 20160323

Available from: 2016-03-23 Created: 2016-03-22 Last updated: 2016-03-23Bibliographically approved

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Tenhunen, Hannu
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School of Information and Communication Technology (ICT)
Computer Science

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ReferencesLink to record
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