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3D-stacked many-core architecture for biological sequence analysis problems
KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.
KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.ORCID iD: 0000-0003-0565-9376
Indian Institute of Technology, Delhi, India.
2015 (English)In: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2015 International Conference on, IEEE conference proceedings, 2015, 211-220 p.Conference paper, Published paper (Refereed)
Resource type
Text
Abstract [en]

Sequence analysis plays critical role in bioinformatics, and most applications of which have compute intensive kernels consuming over 70% of total execution time. By exploiting the compute intensive execution stages of popular sequence analysis applications, we present and evaluate a VLSI architecture with a focus on those that target at biological sequences directly, including pairwise alignment, multiple sequence alignment, database search, and short read sequence mappings. Based on coarse grained reconfigurable array (CGRA) we propose the use of many-core and 3D-stacked technologies to gain further improvement over memory subsystem, which gives another order of magnitude speedup from high bandwidth and low access latency. We analyze our approach in terms of its throughput and efficiency for different application mappings. Initial experimental results are evaluated from a stripped down implementation in a commodity FPGA, and then we scale the results to estimate the performance of our architecture with 9 layers of 68 mm2 stacked wafers in 45-nm process. We demonstrate numerous estimated speedups better than any existed hardware accelerators for at least 39 times for the entire range of applications and datasets of interest. In comparison, the alternative FPGA based accelerators deliver only improvement for single application, while GPGPUs perform not well enough on accelerating program kernel with random memory access and integer addition/comparison operations.

Place, publisher, year, edition, pages
IEEE conference proceedings, 2015. 211-220 p.
Keyword [en]
VLSI;bioinformatics;field programmable gate arrays;multiprocessing systems;parallel architectures;reconfigurable architectures;3D-stacked many-core architecture;CGRA;VLSI architecture;bioinformatics;biological sequence analysis problems;coarse grained reconfigurable array;commodity FPGA;database search;memory subsystem;multiple sequence alignment;pairwise alignment;short read sequence mappings;Bioinformatics;Biology;Computational modeling;Computer architecture;Databases;Kernel;Sequences;Accelerator architectures;Application specific integrated circuits;Bioinformatics;Computational biology;Coprocessors;Reconfigurable architectures;Three-dimensional integrated circuits
National Category
Embedded Systems
Identifiers
URN: urn:nbn:se:kth:diva-184234DOI: 10.1109/SAMOS.2015.7363678ISI: 000380507900029Scopus ID: 2-s2.0-84963665644OAI: oai:DiVA.org:kth-184234DiVA: diva2:915724
Conference
Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2015 International Conference on
Note

QC 20160405

Available from: 2016-03-30 Created: 2016-03-30 Last updated: 2016-09-05Bibliographically approved

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CiteExportLink to record
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Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
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  • en-US
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More languages
Output format
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