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Tolerating transient illegal turn faults in NoCs
KTH, School of Information and Communication Technology (ICT), Industrial and Medical Electronics. University of Turku, Finland.
2016 (English)In: Microprocessors and microsystems, ISSN 0141-9331, E-ISSN 1872-9436, Vol. 43, no SI, 104-115 p.Article in journal (Refereed) PublishedText
Abstract [en]

Network-on-Chip (NoC) is becoming a competitive solution to connect hundreds of processing elements in modern computing platforms. Under the trend of shrinking feature sizes, circuits are likely to suffer from faults which lead to degraded performance and erroneous behaviour. Compared to permanent faults, transient faults happen even more frequently and seriously while they are hidden within complex on chip behaviours. One of the serious consequences caused by transient faults is taking illegal turns by the packets after the damage of control logic in on-chip routers which may lead to a deadlock situation and eventually crashing the entire system. To avoid this situation, in this paper, we propose a comprehensive scheme called ODT including an improved router architecture, an illegal-turn-resilient routing algorithm, online fault-detect units and a fault classification method. By applying ODT, more turns are supported on routing level and the deadlock situations can be significantly reduced. Experimental results indicate up to 22% increase of the survived packets in the network when 4% of routing computation units in failure. The extra area overhead and power consumption of ODT method is around 9.22% and 9.63%.

Place, publisher, year, edition, pages
Elsevier, 2016. Vol. 43, no SI, 104-115 p.
Keyword [en]
Complex networks, Computation theory, Crime, Fault detection, Fault tolerance, Network architecture, Reconfigurable hardware, Routers, Servers, VLSI circuits, Computing platform, Degraded performance, Fault classification, Network-on-chip(NoC), Processing elements, Router architecture, Shrinking feature sizes, Transient faults, Network-on-chip
National Category
Computer Engineering
Identifiers
URN: urn:nbn:se:kth:diva-187146DOI: 10.1016/j.micpro.2016.01.016ISI: 000377740500010OAI: oai:DiVA.org:kth-187146DiVA: diva2:928977
Funder
VINNOVA
Note

QC 20160711

Available from: 2016-05-17 Created: 2016-05-17 Last updated: 2016-07-11Bibliographically approved

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Ebrahimi, Masoumeh
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