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FIST: A framework to interleave spiking neural networks on CGRAs
KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems. Turku Centre for Computer Science, Finland.
KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems. University of Turku, Finland .
KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.ORCID iD: 0000-0003-0565-9376
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2015 (English)In: Proceedings - 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2015, IEEE , 2015, 751-758 p.Conference paper (Refereed)Text
Abstract [en]

Coarse Grained Reconfigurable Architectures (CGRAs) are emerging as enabling platforms to meet the high performance demanded by modern embedded applications. In many application domains (e.g. robotics and cognitive embedded systems), the CGRAs are required to simultaneously host processing (e.g. Audio/video acquisition) and estimation (e.g. audio/video/image recognition) tasks. Recent works have revealed that the efficiency and scalability of the estimation algorithms can be significantly improved by using neural networks. However, existing CGRAs commonly employ homogeneous processing resources for both the tasks. To realize the best of both the worlds (conventional processing and neural networks), we present FIST. FIST allows the processing elements and the network to dynamically morph into either conventional CGRA or a neural network, depending on the hosted application. We have chosen the DRRA as a vehicle to study the feasibility and overheads of our approach. Synthesis results reveal that the proposed enhancements incur negligible overheads (4.4% area and 9.1% power) compared to the original DRRA cell.

Place, publisher, year, edition, pages
IEEE , 2015. 751-758 p.
Keyword [en]
Audio systems, Cognitive systems, Neural networks, Reconfigurable architectures, Robotics, Coarse grained reconfigurable architecture (CGRAs), Conventional processing, Embedded application, Estimation algorithm, Host processing, Processing elements, Processing resources, Spiking neural networks, Embedded systems
National Category
Computer Engineering
Identifiers
URN: urn:nbn:se:kth:diva-187415DOI: 10.1109/PDP.2015.60ISI: 000380471500113ScopusID: 2-s2.0-84962812079OAI: oai:DiVA.org:kth-187415DiVA: diva2:930547
Conference
23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2015; Turku; Finland
Note

QC 20160526

Available from: 2016-05-24 Created: 2016-05-23 Last updated: 2016-09-05Bibliographically approved

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Jafri, SyedDaneshtalab, MasoudHemani, AhmedPlosila, JuhaTenhunen, Hannu
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