System Modeling and Design Refinement in ForSyDe
2003 (English)Doctoral thesis, monograph (Other scientific)
Advances in microelectronics allow the integration of more andmore functionality on a single chip. Emerging system-on-a-chiparchitectures include a large amount of heterogeneous componentsand are of increasing complexity. Applications using thesearchitectures require many low-level details in order to yield anefficient implementation. On the other hand constanttime-to-market pressure on electronic systems demands a shortdesign process that allows to model a system at a highabstraction level, not taking low-level implementation detailsinto account. Clearly there is a significant abstraction gapbetween an ideal model for specification and another one forimplementation. This abstraction gap has to be addressed bymethodologies for electronic system design.
This thesis presents the ForSyDe (Formal System Design)methodology, which has been developed with the objective to movesystem design to a higher level of abstraction and to bridge theabstraction gap by transformational design refinement. ForSyDe isbased on carefully selected formal foundations. The initialspecification model uses a synchronous model of computation,which separates communication from computation and has anabstract notion of time. ForSyDe uses the concept of processconstructors to implement the synchronous model, to allow fordesign transformation and the mapping of a refined model onto thetarget architecture. The specification model is refined into adetailed implementation model by the stepwise application ofwell-defined design transformation rules. These rules are eithersemantic preserving or they inflict a design decision modifyingthe semantics. These design decisions are used to introduce thelow-level implementation details that are needed for an efficientimplementation. The implementation model is mapped onto thecomponents of the target architecture. At present ForSyDe modelscan be mapped onto VHDL or C/C++ in order to allow commercialtools to generate custom hardware or sequential software. Thethesis uses a digital equalizer to illustrate the concepts andpotential of ForSyDe.
Electronic System Design, Hardware/Software Co-Design,Electrical Engineering
Place, publisher, year, edition, pages
Kista: Mikroelektronik och informationsteknik , 2003. , xvi, 228 p.
Trita-IMIT. LECS, ISSN 1651-4076 ; 03:03
Electronic System Design, Hardware/Software Co-Design, Electrical Engineering
IdentifiersURN: urn:nbn:se:kth:diva-3525ISBN: 91-7283-501-XOAI: oai:DiVA.org:kth-3525DiVA: diva2:9340
NR 201408052003-05-142003-05-14Bibliographically approved