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  • 1.
    Abbas, Naeem
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    Runtime Parallelisation Switching for MPEG4 Encoder on MPSoC2008Independent thesis Advanced level (degree of Master (Two Years)), 80 credits / 120 HE creditsStudent thesis
    Abstract [en]

    The recent development for multimedia applications on mobile terminals raised the need for flexible and scalable computing platforms that are capable of providing considerable (application specific) computational performance within a low cost and a low energy budget. The MPSoC with multi-disciplinary approach, resolving application mapping, platform architecture and runtime management issues, provides such multiple heterogeneous, flexible processing elements. In MPSoC, the run-time manager takes the design time exploration information as an input and selects an active Pareto point based on quality requirement and available platform resources, where a Pareto point corresponds to a particular parallelization possibility of target application. To use system’s scalability at best and enhance application’s flexibility a step further, the resource management and Pareto point selection decisions need to be adjustable at run-time. This thesis work experiments run-time Pareto point switching for MPEG-4 encoder. The work involves design time exploration and then embedding of two parallelization possibilities of MPEG-4 encoder into one single component and enabling run-time switching between parallelizations, to give run-time control over adjusting performance-cost criteria and allocation de-allocation of hardware resources at run-time. The newer system has the capability to encode each video frame with different parallelization. The obtained results offer a number of operating points on Pareto curve in between the previous ones at sequence encoding level. The run-time manager can improve application performance up to 50% or can save memory bandwidth up to 15%, according to quality request.

  • 2.
    Alam, Assad
    et al.
    KTH, School of Electrical Engineering (EES), Automatic Control.
    Asplund, Fredrik
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Behere, Sagar
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Björk, Mattias
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Garcia Alonso, Liliana
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Khaksari, Farzad
    KTH, School of Electrical Engineering (EES), Signal Processing.
    Khan, Altamash
    KTH, School of Electrical Engineering (EES), Signal Processing.
    Kjellberg, Joakim
    KTH, School of Electrical Engineering (EES), Automatic Control.
    Liang, Kuo-Yun
    KTH, School of Electrical Engineering (EES), Automatic Control.
    Lyberger, Rickard
    Scania CV AB.
    Mårtensson, Jonas
    KTH, School of Electrical Engineering (EES), Automatic Control. KTH, School of Electrical Engineering (EES), Centres, ACCESS Linnaeus Centre.
    Nilsson, John-Olof
    KTH, School of Electrical Engineering (EES), Signal Processing.
    Pettersson, Henrik
    Scania CV AB.
    Pettersson, Simon
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Stålklinga, Elin
    KTH, School of Electrical Engineering (EES), Automatic Control.
    Sundman, Dennis
    KTH, School of Electrical Engineering (EES), Signal Processing.
    Zachariah, Dave
    KTH, School of Electrical Engineering (EES), Signal Processing.
    Cooperative driving according to Scoop2011Report (Other academic)
    Abstract [en]

    KTH Royal Institute of Technology and Scania are entering the GCDC 2011 under the name Scoop –Stockholm Cooperative Driving. This paper is an introduction to their team and to the technical approach theyare using in their prototype system for GCDC 2011.

  • 3.
    Anthony, Richard
    et al.
    University of Greenwich.
    Chen, DeJiu
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Pelc, Mariusz
    University of Greenwich.
    Persson, Magnus
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Törngren, Martin
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Context-Aware Adaptation in DySCAS2009In: Electronic Communications of the EASST, ISSN 1863-2122, E-ISSN 1863-2122, ISSN 1863-2122, Vol. 19Article in journal (Refereed)
    Abstract [en]

    DySCAS is a dynamically self-configuring middleware for automotivecontrol systems. The addition of autonomic, context-aware dynamic configurationto automotive control systems brings a potential for a wide range of benefits in termsof robustness, flexibility, upgrading etc. However, the automotive systems representa particularly challenging domain for the deployment of autonomics concepts, havinga combination of real-time performance constraints, severe resource limitations,safety-critical aspects and cost pressures. For these reasons current systems are staticallyconfigured. This paper describes the dynamic run-time configuration aspectsof DySCAS and focuses on the extent to which context-aware adaptation has beenachieved in DySCAS, and the ways in which the various design and implementationchallenges are met.

  • 4.
    Anthony, Richard
    et al.
    The University of Greenwich.
    Chen, DeJiu
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Systems.
    Törngren, Martin
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Systems.
    Scholle, Detlef
    Enea Data AB.
    Sanfridson, Martin
    Volvo Technology AB.
    Rettberg, Achim
    University of Paderborn/C-LAB.
    Qureshi, Tahir Naseer
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Systems.
    Persson, Magnus
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Systems.
    Feng, Lei
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Systems.
    Autonomic Middleware for Automotive Embedded Systems2009In: Autonomic Communication / [ed] Vasilakos, Athanasios V.; Parashar, Manish; Karnouskos, Stamatis; Pedrycz, Witold, Springer US , 2009, 169-210 p.Chapter in book (Refereed)
    Abstract [en]

    This chapter describes DySCAS: an advanced autonomic platform-independent middleware framework for automotive embedded systems. The concepts and architecture are motivated and described in detail, focusing on the need for, and achievement of, high flexibility and automatic run-time reconfiguration. The design of the middleware is positioned with respect to the way it overcomes the specific technical, environmental, and performance challenges of the automotive domain. Self-management is achieved in terms of automatic configuration for context-aware behavior, resource-use efficiency, and self-healing to handle run-time detected faults. The self-management is governed by the use of policies distributed throughout the middleware components. The simulation techniques that have been used for extensive validation are described and some key results presented. A reference implementation is presented, illustrating the way in which the various concepts and mechanisms can be realized and orchestrated.

  • 5.
    Anthony, Richard
    et al.
    The University of Greenwich.
    Leonhardi, Alexander
    Daimler AG.
    Ekelin, Cecilia
    Volvo Technology AB.
    Chen, DeJiu
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Systems.
    Törngren, Martin
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Systems.
    de Boer, Gerrit
    Bosch GmbH.
    Jahnich, Isabell
    University of Paderborn/C-LAB.
    Burton, Simon
    Redell, Ola
    Enea Data AB.
    Weber, Alexander
    Vollmer, Vasco
    A Future Dynamically Reconfigurable Automotive Software System2008In: Proceedings of the Elektronik im Kraftfahrzeug, 2008Conference paper (Refereed)
    Abstract [en]

    Embedded software systems in vehicles are of rapidly increasing commercial importance for the automotive industry. Current systems employ a static run-time environment; due to the difficulty and cost involved in the development of dynamic systems in a high-integrity embedded control context. A dynamic system, referring to the system configuration, would greatly increase the flexibility of the offered functionality and enable customised software configuration for individual vehicles, adding customer value through plug-and-play capability, and increased quality due to its inherent ability to adjust to changes in hardware and software. We envisage an automotive system containing a variety of components, from a multitude of organizations, not necessarily known at development time. The system dynamically adapts its configuration to suit the run-time system constraints.This paper presents our vision for future automotive control systems that will be regarded in an EU research project, referred to as DySCAS (Dynamically Self-Configuring Automotive Systems). We propose a self-configuring vehicular control system architecture, with capabilities that include automatic discovery and inclusion of new devices, self-optimisation to best-use the processing, storage and communication resources available, self-diagnostics and ultimately self-healing. Such an architecture has benefits extending to reduced development and maintenance costs, improved passenger safety and comfort, and flexible owner customisation.Specifically, this paper addresses the following issues: The state of the art of embedded software systems in vehicles, emphasising the current limitations arising from fixed run-time configurations; and the benefits and challenges of dynamic configuration, giving rise to opportunities for self-healing, self-optimisation, and the automatic inclusion of users’ Consumer Electronic (CE) devices. Our proposal for a dynamically reconfigurable automotive software system platform is outlined and a typical use-case is presented as an example to exemplify the benefits of the envisioned dynamic capabilities.

  • 6.
    Anthony, Richard
    et al.
    The University of Greenwich.
    Rettberg, Achim
    University of Paderborn/C-LAB.
    Chen, DeJiu
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Jahnich, Isabell
    University of Paderborn/C-LAB.
    de Boer, Gerrit
    Bosch GmbH.
    Ekelin, Cecilia
    Volvo Technology AB.
    Towards a Dynamically Reconfigurable Automotive Control System Architecture2007In: Embedded System Design: Topics, Techniques and Trends, 2007, 71-84 p.Conference paper (Refereed)
    Abstract [en]

    This paper proposes a vehicular control system architecture that supports self-configuration. The architecture is based on dynamic mapping of processes and services to resources to meet the challenges of future demanding use-scenarios in which systems must be flexible to exhibit context-aware behaviour and to permit customization. The architecture comprises a number of low-level services that will provide the required system functionalities, which include automatic discovery and incorporation of new devices, self-optimisation to best-use the processing, storage and communication resources available, and self-diagnostics. The benefits and challenges of dynamic configuration and the automatic inclusion of users' Consumer Electronic (CE) devices are briefly discussed and the self-management and control-theoretic technologies that will be used are described in outline. A number of generic use-cases have been identified, each with several specific use-case scenarios. To demonstrate the extent of the flexible reconfiguration facilitated by the architecture, some of these use-cases are described, each exemplifying a different aspect of dynamic reconfiguration.

  • 7.
    Anthony, Richard
    et al.
    The University of Greenwich.
    Ward, Paul
    The University of Greenwich.
    Chen, DeJiu
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Systems.
    Hawthorne, James
    The University of Greenwich.
    Mariusz, Pelc
    The University of Greenwich.
    Rettberg, Achim
    University of Paderborn/C-LAB.
    Törngren, Martin
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Systems.
    A Middleware Approach to Dynamically Configurable Automotive Embedded Systems2008In: ISVCS 2008: The First Annual International ICST Symposium on Vehicular Computing Systems, EUDL - European Union Digital Library , 2008Conference paper (Refereed)
    Abstract [en]

    This paper presents an advanced dynamically configurable middleware for automotive embedded systems. The layered architecture of the middleware, and the way in which core and optional services provide transparency and flexible platform independent support for portability, is described. The design of the middleware is positioned with respect to the way it overcomes the specific technical, environmental, performance and safety challenges of the automotive domain. The use of policies to achieve flexible run-time configuration is explained with reference to the core policy technology which has been extended and adapted specifically for this project. The component model is described, focussing on how the configuration logic is distributed throughout the middleware and application components, by inserting ‘decision points’ wherever deferred logic or run-time context-sensitive configuration is required. Included in this discussion are the way in which context information is automatically provided to policies to inform context-aware behaviour; the dynamic wrapper mechanism which isolates policies, provides transparency to software developers and silently handles run-time errors arising during dynamic configuration operations.

  • 8. Anwar, Hassan
    et al.
    Jafri, Syed Mohammad Asad Hassan
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Sergei, Dytckov
    Daneshtalab, Masoud
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Hemani, Ahmed
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Plosila, Juha
    University of Turku, Finland.
    Tenhunen, Hannu
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Exploring Spiking Neural Network on Coarse-Grain Reconfigurable Architectures2014In: ACM International Conference Proceeding Series, 2014, 64-67 p.Conference paper (Refereed)
    Abstract [en]

    Today, reconfigurable architectures are becoming increas- ingly popular as the candidate platforms for neural net- works. Existing works, that map neural networks on re- configurable architectures, only address either FPGAs or Networks-on-chip, without any reference to the Coarse-Grain Reconfigurable Architectures (CGRAs). In this paper we investigate the overheads imposed by implementing spiking neural networks on a Coarse Grained Reconfigurable Ar- chitecture (CGRAs). Experimental results (using point to point connectivity) reveal that up to 1000 neurons can be connected, with an average response time of 4.4 msec.

  • 9.
    Armengaud, Eric
    et al.
    Virtual Vehicle Competence Center, Austria.
    Zoier, Markus
    Virtual Vehicle Competence Center, Austria.
    Baumgart, Andreas
    OFFIS E. V., Germany.
    Biehl, Matthias
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Chen, De Jiu
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Griessnig, Gerhard
    AVL List GmbH, Austria; Graz University of Technology, Austria.
    Hein, Christian
    Fraunhofer FOKUS, Germany.
    Ritter, Tom
    Fraunhofer FOKUS, Germany.
    Tavakoli-Kolagari, Ramin
    Volvo Technology Corporation, Sweden.
    Model-based Toolchain for the Efficient Development of Safety-Relevant Automotive Embedded Systems2011In: SAE Technical Paper: Paper Number: 2011-01-0056, Society of Automotive Engineers, 2011Conference paper (Refereed)
    Abstract [en]

    Advanced functionalities unthinkable a few decades ago are now being introduced into automotive vehicles through embedded systems for reasons like emission control, vehicle connectivity, safety and cooperative behaviors. As the development often involves stakeholders from different engineering disciplines and organizations, the complexity due to shared requirements, interdependencies of data, functions, and resources, as well as tight constraints in regards to timing, safety, and resource efficiency makes the system integration, quality control and assurance, reuse and change management increasingly more difficult. This calls for a more rigorous approach to the development of automotive embedded systems and components. This paper describes the CESAR reference technology platform (RTP) that supports the formalization of various engineering concerns in the development of safety-relevant embedded systems and thereby a model-based integration of various tools and methods to form seamless environments or toolchains for the development of such systems.

  • 10.
    Asplund, Fredrik
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Safety and Tool Integration, A System-Theoretic Process Analysis2012Report (Other academic)
    Abstract [en]

    In this report I detail a System-Theoretic Process Analysis (STPA) hazard analysis of the tool integration of development environments for embedded systems. Building on results from previous studies I generalize and expand on earlier findings regarding the relationship between safety and tool integration.

    To prepare for the analysis I customized STPA for the context of tool integration. This customization allowed me to subsequently design and analyze three versions of a tool chain originally provided by an industrial partner. A net result of 85, 98 and 73 risks was identified, in comparison to 25 integration weaknesses identified through expert knowledge. The design of the different versions of the tool chain and a comparison of the identified risks with the integration weaknesses allowed me to validate the usefulness of STPA for both identifying and correctly categorizing risks and causes in the context of tool integration. An analysis of my results also points out the fact that STPA is not a silver bullet, without enough expertise it is easy to omit important parts of process models and thus arrive at incomplete conclusions.

    In regard to the relationship between safety and tool integration nine properties were identified, properties that need to be supported correctly to avoid hazards in the context of tool integration. These properties require support throughout a noticeable part of a development environment to have an impact and derive much of that impact from the possibility to centralize them. They also interrelate, so that often several of them need to be handled to mitigate one type of risk. However, introducing support for them across a whole development environment is likely to be costly, or even impossible. Furthermore, introducing support for these properties will mitigate some risks, but also create other risks at higher levels of organization.

    These properties therefore point to the size a development environment, the number of contexts towards which the development environment can be verified and the effort required to ensure the added requirements at higher levels of organization as deciding factors on whether the effort to support them should be made (other efforts, more efficient in those particular cases, could otherwise be considered). The existence of these properties also point to the possibility of developing and pre-qualifying tools and tool chains based on the assumption that some or all of these properties will be supported by the final development environment. This could potentially lower, or at least distribute, the cost of the final qualification.

  • 11.
    Asplund, Fredrik
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Tool Integration and Safety: A Foundation for Analysing the Impact of Tool Integrationon Non-functional Properties2012Licentiate thesis, comprehensive summary (Other academic)
    Abstract [en]

    The increasing complexity of embedded systems development is becoming difficult to handle with development environments based on disjoint engineering tools. Support for interactions between various engineering tools, especially through automated means, has therefore received an increased amount of attention during the last few years. The subsequent increase in the amount of tool integration is leading to an increased impact of tool integration on non-functional properties of development efforts, development environments and end products. At the same time there is a lack of methods and tools for analysing the relationship between these properties and tool integration. To establish a foundation for analysing this generic relationship, the specific relationship between tool integration and the safety of end products is analysed in this thesis.

    A survey was conducted to analyze the State of the Art of tool integration as related to safety. This survey specifically identified the lack of an efficient handling of tool integration by modern safety standards as an important concern. In relation to this survey, three theories were identified as of specific importance. These are the school of thought known as Systems Thinking, the Systems-Theoretic Accident Model and Processes (STAMP) causality model and the System-Theoretic Process Analysis (STPA) hazard analysis technique.

    Building on these theories, this thesis provides original contributions intended to (1) describe concepts and models related to tool integration and safety (the first and second contribution), (2) link tool integration to safety in a way that reduces complexity during analysis (the third contribution) and (3) propose how to interpret and make use of the implications of the presented theories and the first three contributions (the fourth and fifth contribution).

    • The first contribution is a new conceptual model of a development effort that emphasizes tool integration.

    • The second contribution is a new reference model for tool integration in highly heterogeneous environments.

    • The third contribution consists of nine safety-related tool chain properties, i.e. properties of tool chains that could mitigate at least part of the risks introduced by tool integration.

    • The fourth contribution is a proposition on how to identify safety implications due to a high level of automation of tool integration.

    • The fifth contribution is a proposition for a new software tool qualification process.

  • 12.
    Asplund, Fredrik
    et al.
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Biehl, Matthias
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Loiret, Frederic
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Towards the Automated Qualification of Tool Chain Design2012In: SAFECOMP 2012 Workshops: Sassur, ASCoMS, DESEC4LCCI, ERCIM/EWICS, IWDE, Magdeburg, Germany, September 25-28, 2012, Proceedings, Springer Berlin/Heidelberg, 2012, 392-399 p.Conference paper (Refereed)
    Abstract [en]

    The development of safety-critical embedded systems is supported by a number of development tools, which are increasingly integrated into automated tool chains. Safety standards require these tool chains to be qualified, which is costly and requires a large effort. To reduce cost and effort tool chains can be composed of pre-qualified tools and then themselves pre-qualified by identifying the parts of tool chain software that have an impact on safety more exactly. In this paper we propose the use of a modeling language to describe this tool chain composition. This allows us to reduce effort even further by automatically analyzing the tool chain model for safety issues. It also promises to reduce the effort and cost of later steps in the deployment of the tool chain by formalizing the communication of safety issues and automating the generation of code for tool chain software.

  • 13.
    Asplund, Fredrik
    et al.
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    El-khoury, Jad
    Törngren, Martin
    Qualifying Software Tools, a Systems Approach2012In: Computer Safety, Reliability, and Security: 31st International Conference, SAFECOMP 2012, Magdeburg, Germany, September 25-28, 2012. Proceedings, Springer Berlin/Heidelberg, 2012, 340-351 p.Conference paper (Refereed)
    Abstract [en]

    Modern safety standards designed to ensure safety in embedded system products often take a descriptive approach, focusing on describing appropriate requirements on management, processes, methods and environments during development. While the qualification of software tools has been included in several such standards, how to handle the safety implications of tools integrated into tool chains has been largely ignored. This problem is aggravated by an increase both in automation of tool integration and the size of development environments.

    In this paper we define nine safety goals for tool chains and suggest a qualification method that takes a systems approach on certifying software tools as parts of tool chains. With this method, software tools are developed and pre-qualified under the assumption that certain properties will be supported by the development environment they are to be deployed in. The proposed method is intended to (1) achieve a stronger focus on the relevant parts of tool chains in regard to safety and (2) separate the extra effort these parts imply from the effort already stipulated by safety standards.

  • 14.
    Asplund, Fredrik
    et al.
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    El-khoury, Jad
    Törngren, Martin
    Safety-Guided Design through System-Theoretic Process Analysis, Benefits and Difficulties2012In: 30th International System Safety Conference Proceedings, 2012Conference paper (Refereed)
    Abstract [en]

    Development environments for embedded systems are moving towards increased automation between Commercial Of The Shelf (COTS) engineering tools. While automation provides new opportunities for e.g. verification, it also to some extent decreases the possibility of identifying and acting on safety issues that arise during development. To investigate the relationship between tool integration and safety we performed a System-Theoretic Process Analysis (STPA) of a tool chain from an industrial case study. This tool chain was then reanalyzed and redesigned twice, in part motivated by identified hazards.

    This paper presents our experiences from applying STPA to safety-guided design in the context of integrating COTS engineering tools into tool chains. We discuss the benefits of and difficulties with applying STPA. We also suggest improvements that complement STPA with support methods and tools.

    The primary benefit was the support in categorizing risks and causes. The three difficulties we encountered were identifying context-specific causal factors, defining control structures across several domains (management, user, technical, etc.) and limiting the domains taken into account. The use of STPA during safety-guided design would be facilitated by the use of expert systems and simulation, especially in regard to relating different domains.

  • 15.
    Asplund, Fredrik
    et al.
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Törngren, Martin
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    The Discourse on Tool Integration Beyond Technology, A Literature Survey2015In: Journal of Systems and Software, ISSN 0164-1212, Vol. 106, 117-131 p.Article in journal (Refereed)
    Abstract [en]

    The tool integration research area emerged in the 1980s. This survey focuses on those strands of tool integration research that discuss issues beyond technology.

     

    We reveal a discourse centered around six frequently mentioned non-functional properties. These properties have been discussed in relation to technology and high level issues. However, while technical details have been covered, high level issues and, by extension, the contexts in which tool integration can be found, are treated indifferently. We conclude that this indifference needs to be challenged, and research on a larger set of stakeholders and contexts initiated.

     

    An inventory of the use of classification schemes underlines the difficulty of evolving the classical classification scheme published by Wasserman. Two frequently mentioned redefinitions are highlighted to facilitate their wider use.

     

    A closer look at the limited number of research methods and the poor attention to research design indicates a need for a changed set of research methods. We propose more critical case studies and method diversification through theory triangulation.

     

    Additionally, among disparate discourses we highlight several focusing on standardization which are likely to contain relevant findings. This suggests that open communities employed in the context of (pre-)standardization could be especially important in furthering the targeted discourse.

  • 16.
    Asplund, Fredrik
    et al.
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Törngren, Martin
    Biehl, Matthias
    El-khoury, Jad
    Frede, Daniel
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Tool Integration, from Tool to Tool Chain with ISO 262622012Conference paper (Refereed)
    Abstract [en]

    The use of innovative power sources in future cars has long-ranging implications on vehicle safety.  We studied these implications in the context of the guidance on software tool qualification in the then current ISO 26262 draft, when building an urban concept vehicle to participate in the 2011 Shell Eco-Marathon. While the guidance on tool qualification is detailed, the guidance in regard to tools integrated into tool chains is limited. It only points out that the environment that tools execute in needs to be taken into consideration.

    In this paper we clarify the implications of tool chains on tool qualification in the context of ISO 26262 by focusing on answering two questions; first, are there parts of the development environment related to tool integration that are likely to fall outside of tool qualification efforts as currently defined by ISO 26262; secondly, can we define if, and -if so- how, tool integration is affected by ensuring functional safety.

    We conclude by identifying two areas related to tool integration that are likely to fall outside the tool qualification efforts (data integrity and process logic) and describing how different constraints imposed by ISO 26262 in relation to tool qualification conflict when tool integration is improved (improvements aimed at supporting completeness, consistency and the safety lifecycle vs. tool qualification cost).

    We are able to make additional conclusions in relation to the State of the Art discussion on software tool qualification according to ISO 26262. First, reference tool chains and guidelines on which characteristics tool qualification should ensure for tool chains are needed to complement ISO 26262. Secondly, guidance on tool integration can be found in the completeness characteristic, the consistency characteristic and the ISO 26262 safety lifecycle process. Finally, qualification efforts should ideally target tool chains rather than individual tools.

  • 17.
    Asplund, Fredrik
    et al.
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Törngren, Martin
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Hawkins, Richard
    University of York.
    McDermid, John A.
    University of York.
    The Need for a Confidence View of CPS Support Environments (Fast Abstract)2015In: Proceedings of HASE 2015, The 16th IEEE International Symposium on High Assurance Systems Engineering, IEEE Computer Society, 2015, 273-274 p.Conference paper (Refereed)
    Abstract [en]

    Multi-View Modelling Integration Frameworks (MVMIFs) may help mitigate complexity associated with the development of CPS, but may also have implications on safety. Safety-related standards do not provide guidance to mitigate this problem. We therefore suggest that MVMIFs are extended with a confidence view to support the creation of an assurance case that covers issues related to risks in the support environment.

  • 18.
    Attarzadeh Niaki, Seyed Hosein
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    Design Space Exploration Of Field Programmable Counter Arrays And Their Integration With FPGAs2008Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Field Programmable Counter Arrays (FPCAs) have been recently introduced to close the gap between FPGA and ASICs for arithmetic dominated applications. FPCAs are reconfigurable lattices that can be embedded into FPGAs to efficiently compute the result of multi-operand additions.

    The first contribution of this work is a Design Space Exploration (DSE) of the FPCAs and the identification of trade-offs between different parameters which describe them. Methods for analyzing and pruning the design space are proposed to enable a smart exploration. Finally, a set of best performing architectures in terms of area and delay is determined.

    Secondly, a study of possible integration schemes to build a hybrid FPGA/FPCA chip is performed. The goal is to find a solution with optimal usage of on-chip silicon area. The advantages and disadvantages of each solution are studied and a new integration solution based on properties of FPCAs is suggested. A VLSI implementation proves the applicability of the proposed solutions.

  • 19.
    Attarzadeh Niaki, Seyed Hosein
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Managing the Complexity in Embedded and Cyber-Physical System Design: System Modeling and Design-Space Exploration2014Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    To cope with the increasing complexity of embedded and cyber-physical system design, different system-level design approaches are proposed which start from abstract models and implement them using design flows with high degrees of automation. However, creating models of such systems and also formulating the mathematical problems arising in these design flows are themselves challenging tasks. A promising approach is the composable construction of these models and problems from more basic entities. Unfortunately, it is non-trivial to propose such compositional formulations today because the current practice in the electronic design automation domain tends to be on using imperative languages and frameworks due to legacy and performance-oriented reasons.

    This thesis addresses the system design complexity by first promoting proper formalisms and frameworks for capturing models and formulating design-space exploration problems for electronic system-level design in a declarative style; and second, propose realizations based on the industrially accepted languages and frameworks which hold the interesting properties such as composability and parallelism.

    For modeling, ForSyDe, a denotational system-level modeling formalism for heterogeneous embedded systems is chosen, extended with timed domains to make it more appropriate for capturing cyber-physical systems, and mapped on top of the IEEE standard system design language SystemC. The realized modeling framework, called ForSyDe-SystemC, can be used for modeling systems of heterogeneous nature and their composition to form more sophisticated systems and also conducting parallel and distributed simulation for boosting the simulation speed. Another extension to ForSyDe, named wrapper processes, introduces the ability to compose formal ForSyDe models with legacy IP blocks running in external execution environments to perform a heterogeneous co-simulation.

    In platform-based design flows, the correct and optimal mapping of an application model onto a flexible platform involves solving a hard problem, named design space exploration. This work proposes Tahmuras, a constraint- based framework to construct generic design space exploration problems as the composition of three individual sub-problems: the application, the platform, and the mapping and scheduling problems. In this way, the model of the design space exploration problem in Tahmuras is automatically generated for each combination of application semantics, target platform, and mapping and scheduling policy simply by composing their respective problems. Using constraint programming, problems can be modeled in a declarative style, while they can be solved in a variety of different styles, including imperative solving heuristics commonly used to solve difficult problems. Efficient parallel solvers exists for constraint programming. 

  • 20.
    Attarzadeh Niaki, Seyed Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Beserra, G. S.
    University of Brasilia.
    Andersen, N.
    Novelda AS.
    Verdon, M.
    DA-Design Oy.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Heterogeneous system-level modeling for small and medium enterprises2012In: Integrated Circuits and Systems Design (SBCCI), 2012 25th Symposium on, IEEE conference proceedings, 2012, 1-6 p.Conference paper (Refereed)
    Abstract [en]

    The design of today's electronic embedded systems is an increasingly complicated task. This is especially problematic for Small and Medium Enterprises (SMEs) which have limited resources. In this work, we identify a set of common design practices used in industry, with a special focus on problems faced by smaller companies, and formulate them as design scenarios. We show how SMEs can benefit from a system-level design approach by customizing a formal heterogeneous system modeling framework for each scenario. The applicability of this approach is demonstrated by two industrial use cases, an impulse-radio radar and a UART-based protocol.

  • 21.
    Attarzadeh Niaki, Seyed Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Cevrero, Alessandro
    Ecole Polytechnique Federale de Lausanne, Lausanne, Switzerland.
    Brisk, Philip
    Ecole Polytechnique Federale de Lausanne, Lausanne, Switzerland.
    Nicopoulos, Chrysostomos
    Ecole Polytechnique Federale de Lausanne, Lausanne, Switzerland.
    Gurkaynak, Frank K.
    Ecole Polytechnique Federale de Lausanne, Lausanne, Switzerland.
    Leblebici, Yusuf
    Ecole Polytechnique Federale de Lausanne, Lausanne, Switzerland.
    Ienne, Paolo
    Ecole Polytechnique Federale de Lausanne, Lausanne, Switzerland.
    Design space exploration for field programmable compressor trees2008In: Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems, New York: ACM Press, 2008, 207-216 p.Conference paper (Refereed)
    Abstract [en]

    The Field Programmable Compressor Tree (FPCT) is a programmable compressor tree (e.g., a Wallace or Dadda Tree) intended for integration in an FPGA or other reconfigurable device. This paper presents a design space exploration (DSE) method that can be used to identify the best FPCT architecture for a given set of arithmetic benchmark circuits; in practice, an FPGA vendor can use the design space exploration to tailor the FPCT to meet the needs of the most important benchmark circuits of the vendor’s largest-volume clients. One novel feature of the DSE is the introduction of a metric called I/O utilization; we found that I/O utilization has a strong correlation with both the critical path delay and area of the benchmark circuits under study. Pruning the search space using I/O utilization allowed us to reduce significantly the number of FPCTs that must be synthesized and evaluated during the DSE, while giving high confidence that the best architectures are still explored. The DSE was applied to seven small-to-medium range benchmark circuits; one FPCT architecture was found that was 30% faster than the second best in terms of critical path delay, and only 3.34% larger than the smallest.

  • 22.
    Attarzadeh Niaki, Seyed Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Jakobsen, M. K.
    Technical University of Denmark.
    Sulonen, T.
    DA-Design Oy.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Formal heterogeneous system modeling with SystemC2012In: Proceedings of Forum on Specification and Design Languages (FDL) 2012, 2012, 160-167 p.Conference paper (Refereed)
    Abstract [en]

    Electronic System Level (ESL) design of embedded systems proposes raising the abstraction level of the design entry to cope with the increasing complexity of such systems. To exploit the benefits of ESL, design languages should allow specification of models which are a) heterogeneous, to describe different aspects of systems; b) formally defined, for application of analysis and synthesis methods; c) executable, to enable early detection of specification; and d) parallel, to exploit the multi- and many-core platforms for simulation and implementation. We present a modeling library on top of SystemC, targeting heterogeneous embedded system design, based on four models of computation. The library has a formal basis where all elements are well defined and lead in construction of analyzable models. The semantics of communication and computation are implemented by the library, which allows the designer to focus on specifying the pure functional aspects. A key advantage is that the formalism is used to export the structure and behavior of the models via introspection as an abstract representation for further analysis and synthesis.

  • 23.
    Attarzadeh Niaki, Seyed Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Mikulcak, Marcus
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Robino, Francesco
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    A Framework for Characterizing Predictable Platform Templates2014Report (Other academic)
    Abstract [en]

    The design of real-time multiprocessor systems is a very costly and time-consuming process due to the need for extensive verification efforts. Genericcorrect-by-construction system-level design flows, targeting predictable plat-forms, would help to tackle this problem. Unfortunately, because system-level design problems are formulated monolithically, existing methods areeither not powerful enough to perform efficient design space exploration,over-customized to a specific class of platforms, or do not allow to be ex-tended with new heuristics and solving methods, which makes their reusedifficult. We present a formal framework to explicitly capture and character-ize predictable platform templates that can be used to formulate a genericdesign flow for real-time streaming applications in a composable manner. Aproof-of-concept implementation of such a flow is performed and used to mapa JPEG encoder application onto an FPGA-based time-predictable platform.

  • 24.
    Attarzadeh Niaki, Seyed Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Mikulcak, Marcus
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Automatic Generation of Virtual Prototypes from Platform Templates2015In: Languages, Design Methods, and Tools for Electronic System Design: Selected Contributions from FDL 2013 / [ed] Marie-Minerve Louërat, Torsten Maehne, Switzerland: Springer, 2015, 147-166 p.Chapter in book (Refereed)
    Abstract [en]

    Virtual Prototypes (VPs) provide an early development platform to embedded software designers when the hardware is not ready yet and allows them to explore the design space of a system, both from the software and architecture perspective. However, automatic generation of VPs is not straightforward because several aspects such as the validity of the generated platforms and the timing of the components needs to be considered. To address this problem, based on a framework which characterizes predictable platform templates, we propose a method for automated generation of VPs which is integrated into a combined design flow consisting of analytic and simulation based design-space exploration. Using our approach the valid TLM-2.0-based simulated VP instances with timing annotation can be generated automatically and used for further development of the system in the design flow. We have demonstrated the potential of our method by designing a JPEG encoder system.

  • 25.
    Attarzadeh Niaki, Seyed Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Mikulcak, Marcus
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Rapid virtual prototyping of real-time systems using predictable platform characterizations2013In: Forum on Specification Design Languages (FDL) 2013, 2013, 6646652- p.Conference paper (Refereed)
    Abstract [en]

    Virtual prototypes (VPs) provide an early development platform to embedded software designers when the hardware is not ready yet and allows them to explore the design space of a system, both from the software and architecture perspective. However, automatic generation of VPs is not straightforward because several aspects such as the validity of the generated platforms and the timing of the components needs to be considered. To address this problem, based on a framework which characterizes predictable platform templates, we propose a method for automated generation of VPs which is integrated into a combined design flow consisting of analytic and simulation based design-space exploration. Using our approach the valid TLM 2.0-based simulated VP instances with timing annotation can be generated automatically and used for further development of the system in the design flow. We have demonstrated the potential of our method by designing a JPEG encoder system.

  • 26.
    Attarzadeh Niaki, Seyed Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    An Automated Parallel Simulation Flow for Heterogeneous Embedded Systems2013In: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013, 2013, 27-30 p.Conference paper (Refereed)
    Abstract [en]

    Simulation of complex embedded and cyber-physical systems requires exploitation of the computation power ofavailable parallel architectures. Current simulation environments either do not address this parallelism or use separate models for parallel simulation and for analysis and synthesis, which might lead to model mismatches. We extend a formal modeling framework targeting heterogeneous systems with elements that enable parallel simulations. An automated flow is then proposed that starting from a serial executable specification generates an efficient MPI-based parallel simulation model by using aconstraint-based method. The proposed flow generates parallel models with acceptable speedups for a representative example.

  • 27.
    Attarzadeh Niaki, Seyed Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Co-simulation of embedded systems in a heterogeneous MoC-based modeling framework2011In: 2011 6th IEEE International Symposium on Industrial Embedded Systems (SIES): Proceedings of a meeting held 15-17 June 2011, Vasteras, Sweden., IEEE Press, 2011, 238-247 p.Conference paper (Refereed)
    Abstract [en]

    New design methodologies and modeling frameworks are required to provide a solution for integrating legacy code and IP models in order to be accepted in the industry. To tackle this problem, we introduce the concept of wrappers in the context of a formal heterogeneous embedded system modeling framework. The formalism is based on the language-independent concept of models of computation. Wrappers enable the framework to co-simulate/co-execute with external models which might be legacy code, an IP block, or an implementation of a partially refined system. They are defined formally in order to keep the analyzability of the original framework and also enable automations such as generation of model wrappers and co-simulation interfaces. As a proof of concept, three wrappers for models in different abstraction levels are introduced and implemented for two case studies.

  • 28.
    Attarzadeh Niaki, Seyed Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Semi-formal refinement of heterogeneous embedded systems by foreign model integration2011In: 2011 Forum on Specification and Design Languages (FDL), IEEE conference proceedings, 2011, 179-186 p.Conference paper (Refereed)
    Abstract [en]

    There is a need for integration of external models in high-level system design flows. We introduce a set of partial refinement operations to implement models of heterogeneous embedded systems. The models are in form of process networks where each process belongs to a single model of computation. A semi-formal design flow has been introduced based on these operations to incrementally refine system specifications to their implementation. Wrapper processes, which allow co-simulation of a system model in the framework with external models and implementations are used to keep the intermediate system models after each refinement step verifiable. Additionally, this design flow has the advantage of integrating legacy code and IP cores. Using a simple example as the case study, we have shown how we can apply this design methodology to a simple system.

  • 29.
    Attarzadeh-Niaki, Seyed-Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.
    Altinel, Ekrem
    KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.
    Koedam, Martijn
    Eindhoven University of Technology.
    Molnos, Anca
    CEA-LETI.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.
    Goossens, Kees
    Eindhoven University of Technology.
    A Composable and Predictable MPSoC Design Flow for Multiple Real-Time Applications2015Conference paper (Refereed)
    Abstract [en]

    Design of real-time MPSoC systems including multiple appli-cations is challenging because temporal requirements of each applicationmust be respected throughout the entire design flow. Currently the de-sign of different applications is often interdependent, making converge toa solution for each application difficult. This paper proposes a composi-tional method to design applications independently, and then to executethem without interference. We define a formal modeling framework as asuitable entry point for application design. The models are executable,which enables early detection of specification errors, and include the for-mal properties of the applications based on well-defined models of com-putation. We combine this with a predictable MPSoC platform templatethat has a supporting design flow but lacks a simulation front-end. Thestructure and behavior of the application models are exported to an in-termediate format via introspection which is iteratively adapted for thebackend flow. We identify the problems arising in this adaptation andprovide appropriate solutions. The design flow is demonstrated by a sys-tem consisting of two streaming applications where less than half of thedesign time is dedicated to operating on the integrated system model.

  • 30.
    Attarzadeh-Niaki, Seyed-Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    An extensible modeling methodology for embedded and cyber-physical system design2016In: Simulation (San Diego, Calif.), ISSN 0037-5497, E-ISSN 1741-3133, Vol. 92, no 8, 771-794 p.Article in journal (Refereed)
    Abstract [en]

    models are important tools to manage the increasing complexity of system design. The choice of a modeling language for constructing models governs what types of systems can be modeled, and which subsequent design activities can be performed. This is especially true for the area of embedded electronic and cyber-physical system design, which poses several challenging requirements of modeling and design methodologies. This article argues that the Formal System Design (ForSyDe) methodology with the necessary presented extensions fulfills these requirements, and thus qualifies for the design of tomorrow's systems. Based on the theory of models of computation and the concept of process constructors, heterogeneous models are captured in ForSyDe with formal semantics. A refined layer of the formalism is introduced to make its denotational-style semantics easy to implement on top of commonly used imperative languages, and an open-source realization on top of the IEEE standard language SystemC is presented. The introspection mechanism is introduced to automatically export an intermediate representation of the constructed models for further analysis/synthesis by external tools. Flexibility and extensibility of ForSyDe is emphasized by integrating a new timed model of computation without central synchronization, and by providing mechanisms for integrating foreign models, parallel and distributed simulation, modeling adaptive, data-parallel, and non-deterministic systems. A set of ForSyDe features is demonstrated in practice, and compared with similar approaches using a running example and two relevant case studies.

  • 31.
    Attarzadeh-Niaki, Seyed-Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Automatic Construction of Models for Analytic Design Space Exploration ProblemsManuscript (preprint) (Other academic)
    Abstract [en]

    Due to the variety of application semantics and also the target platforms used in embedded electronic system design, it is challenging to propose a generic and extensible analytic design-space exploration (DSE) framework. Current approaches support a restricted class of application and platform models and are difficult to extend. This paper proposes a framework to capture the system functionality, a flexible target platform, and a binding policy explicitly using coherent constraint-based representations; together with a method for automatic construction of DSE problem models from them. Heterogeneous semantics is captured using constraints on logical clocks. The applicability of this method is demonstrated by constructing DSE problem models from various combinations of application and platforms models. Time-triggered and untimed models of the system functionality and heterogeneous target platforms are used for this purpose. The constructed models can be solved using different solvers and heuristics. 

  • 32.
    Attarzadeh-Niaki, Seyed-Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    An extensible modeling methodology for embedded and CPS designManuscript (preprint) (Other academic)
    Abstract [en]

    Abstract models are important tools to manage the increasing complexity of system design. The choice of a modeling language for constructing models governs what types of systems can be modeled and which subsequent design activities can be performed. This is especially true for the area of embedded electronic and cyber-physical system design, which poses several challenging requirements on modeling and design methodologies. This article argues that the ForSyDe methodology with the necessary extensions can fulfill these requirements and thus qualifies for the design of tomorrow’s systems. Based on the theory of models of computation and the concept of process constructors, heterogeneous models are captured in ForSyDe with precise semantics. A refined layer of the formalism is introduced to make its denotational-style semantics easy to implement on top of the commonly used imperative languages and an open-source realization on top of the IEEE standard language SystemC is reported. The introspection mechanism is introduced to automatically export an intermediate representation of the constructed models for further analysis/synthesis by external tools. Flexibility and extensibility of ForSyDe is emphasized by integrating a new timed model of computation without central synchronization, and providing mechanisms for integrating foreign models, parallel and distributed simulation, modeling adaptive, data-parallel, and non-deterministic systems. A set of ForSyDe features are demonstrated in practice and compared to similar approaches using two relevant case studies. 

  • 33.
    Awan, Ahsan Javed
    KTH, School of Information and Communication Technology (ICT), Software and Computer systems, SCS.
    Accelerating Apache Spark with Fixed Function Hardware Accelerators Near DRAM and NVRAM2016Other (Refereed)
  • 34.
    Badawi, Mohammad
    KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.
    Adaptive Coarse-grain Reconfigurable Protocol Processing Architecture2016Doctoral thesis, monograph (Other academic)
    Abstract [en]

    Digital signal processors and their variants have provided significant benefit to efficient implementation of Physical Layer (PHY) of Open Systems Interconnection (OSI) model’s seven-layer protocol processing stack compared to the general purpose processors. Protocol processors promise to provide a similar advantage for implementing higher layers in the (OSI)'s seven-layer model. This thesis addresses the problem of designing customizable coarse-grain reconfigurable protocol processing fabrics as a solution to achieving high performance and computational efficiency. A key requirement that this thesis addresses is the ability to not only adapt to varying applications and standards, and different modes in each standard but also to time varying load and performance demands while maintaining quality of service.This thesis presents a tile-based multicore protocol processing architecture that can be customized at design time to meet the requirements of the target application. The architecture can then be reconfigured at boot time and tuned to suit the desired use-case. This architecture includes a packet-oriented memory system that has deterministic access time and access energy costs, and hence can be accurately dimensioned to fulfill the requirements of the desired use-case. Moreover, to maintain quality of service as predicted, while minimizing the use of energy and resources, this architecture encompasses an elastic management scheme that controls run-time configuration to deploy processing resources based on use-case and traffic demands.To evaluate the architecture presented in this thesis, different case studies were conducted while quantitative and qualitative metrics were used for assessment. Energy-delay product, energy efficiency, area efficiency and throughput show the improvements that were achieved using the processing cores and the memory of the presented architecture, compared with other solutions. Furthermore, the results show the reduction in latency and power consumption required to evaluate controlling states when using the elastic management scheme. The elasticity of the scheme also resulted in reducing the total area required for the controllers that serve multiple processing cores in comparison with other designs. Finally, the results validate the ability of the presented architecture to support quality of service without misutilizing available energy during a real-life case study of a multi-participant Voice Over Internet Protocol (VOIP) call.

  • 35.
    Badawi, Mohammad
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Hemani, Ahmed
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    A Coarse-Grained Reconfigurable Protocol Processor2011In: International Symposium on System-on-Chip, 2011. Proceedings, 2011Conference paper (Refereed)
    Abstract [en]

    Trade-off between flexibility and performance became an important factor for characterizing modern protocol processing architectures. While some solutions tend to be more flexible and less computational efficient like GPPs, other solutions like custom ASIC devices provide high computational efficiency while loosing the ability to cope with the diversity of current and evolving protocols. We propose a reconfigurable protocol processor that is flexible and highly adaptable to the needs of the required protocol with the ability to operate individually or as a multi-core integrating processors. We show how a common protocol processing task that consumes one third of RISC CPU time can be performed on our processor at high speed and low energy cost.

  • 36.
    Badawi, Mohammad
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.
    Lu, Zhonghai
    KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.
    Hemani, Ahmed
    KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.
    Service-Guaranteed Multi-Port PacketMemory for Parallel Protocol Processing Architecture2016In: Proceedings - 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2016, Institute of Electrical and Electronics Engineers (IEEE), 2016, 408-412 p., 7445367Conference paper (Refereed)
    Abstract [en]

    Parallel processing architectures have been increasingly utilized due to their potential for improving performance and energy efficiency. Unfortunately, the anticipated improvement often suffers from a limitation caused by memory access latency and latency variation, which consequently impact Quality of Service (QoS). This paper presents a service-guaranteed multi-port packet memory system to boost parallelism in protocol processing architectures. In this proposed memory system, all arriving packets are guaranteed a memory space, such that, a packet memory space can be allocated in a bounded number of cycles and each of its locations is accessible in a single cycle. We consider a real-time Voice Over Internet Protocol (VOIP) call as a case-study to evaluate our service-guaranteed memory system.

  • 37. Bačkalov, I.
    et al.
    Bulian, G.
    Rosén, Anders
    KTH, School of Engineering Sciences (SCI), Aeronautical and Vehicle Engineering, Naval Systems.
    Shigunov, V.
    Themelis, N.
    Improvement of ship stability and safety in intact condition through operational measures: Challenges and opportunities2016In: Ocean Engineering, ISSN 0029-8018, E-ISSN 1873-5258, Vol. 120, 353-361 p.Article in journal (Refereed)
    Abstract [en]

    Attaining a sufficient level of safety from the point of view of stability is typically considered to be a matter of design. However, it is impossible to ensure safety only by design measures, and operational measures can then represent a complementary tool for efficiently and cost-effectively increasing the overall safety of the vessel. Time could therefore be coming for systematically considering operational measures as a recognised and regulated integral part of a holistic approach to ship safety from the point of view of stability. This paper therefore aims at capturing recent trends of research targeting operational safety measures, with specific attention to the intact ship condition. Open challenges and opportunities for research are identified, potential benefits and shortcomings of different options are discussed, and needs and possibilities for further developments in this area are explored. As an overall goal, this paper aims at providing food for thoughts as well as a ground for further proceeding towards the target of implementing a virtuous integrated approach to intact ship safety, from the point of view of stability, which gives due credit to effective and robust operational risk control options.

  • 38.
    Behere, Sagar
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Systems.
    Scoop Technical Report: Year 20112011Report (Other academic)
    Abstract [en]

    This report deals with the technical solution that was implemented for the Grand Cooperative Driving Challenge (GCDC) 2011. The GCDC involved developing a system to drive a vehicle autonomously in specific situations. Some reflections on the design process are also included. The goal of the report is to make the user understand the technical solution and the motivations behind the design choices made.

  • 39.
    Behere, Sagar
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    A Functional Reference Architecture for Autonomous Driving2016In: Information and Software Technology, ISSN 0950-5849, E-ISSN 1873-6025, Vol. 73, 136-150 p.Article in journal (Refereed)
    Abstract [en]

    Context

    As autonomous driving technology matures towards series production, it is necessary to take a deeper look at various aspects of electrical/electronic (E/E) architectures for autonomous driving.

    Objective

    This paper describes a functional architecture for autonomous driving, along with various considerations that influence such an architecture. The functionality is described at the logical level, without dependence on specific implementation technologies.

    Method

    Engineering design has been used as the research method, which focuses on creating solutions intended for practical application. The architecture has been refined and applied over a five year period to the construction of protoype autonomous vehicles in three different categories, with both academic and industrial stakeholders.

    Results

    The architectural components are divided into categories pertaining to (i) perception, (ii) decision and control, and (iii) vehicle platform manipulation. The architecture itself is divided into two layers comprising the vehicle platform and a cognitive driving intelligence. The distribution of components among the architectural layers considers two extremes: one where the vehicle platform is as "dumb" as possible, and the other, where the vehicle platform can be treated as an autonomous system with limited intelligence. We recommend a clean split between the driving intelligence and the vehicle platform. The architecture description includes identification of stakeholder concerns, which are grouped under the business and engineering categories. A comparison with similar architectures is also made, wherein we claim that the presence of explicit components for world modeling, semantic understanding, and vehicle platform abstraction seem unique to our architecture.

    Conclusion

    The concluding discussion examines the influences of implementation technologies on functional architectures and how an architecture is affected when a human driver is replaced by a computer. The discussion also proposes that reduction and acceleration of testing, verification, and validation processes is the key to incorporating continuous deployment processes.

  • 40.
    Behere, Sagar
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Systems Engineering and Architecting for Intelligent Autonomous Systems2016Manuscript (preprint) (Other academic)
    Abstract [en]

    This chapter provides insights into architecture and systems engineering for autonomous driving systems, through a set of complementary perspectives. For practitioners, a short term perspective uses the state of the art to define a three layered functional architecture for autonomous driving, consisting of a vehicle platform, a cognitive driving intelligence, and off-board supervisory and monitoring services. The architecture is placed within a broader context of model based systems engineering (MBSE), for which we define four classes of models: Concept of Operations, Logical Architecture, Application Software Components, and Platform Components. These classes aid an immediate or subsequent MBSE methodology for concrete projects. Also for concrete projects, we propose an implementation setup and technologies that combine simulation and implementation for rapid testing of autonomous driving functionality in physical and virtual environments. Future evolution of autonomous driving systems is explored with a long term perspective looking at stronger concepts of autonomy like machine consciousness and self-awareness. Contrasting these concepts with current engineering practices shows that scaling to more complex systems may require incorporating elements of so-called \emph{constructivist} architectures. The impact of autonomy on systems engineering is expected to be mainly around testing and verification, while implementations shall continue experiencing an influx of technologies from non-automotive domains.

  • 41.
    Behere, Sagar
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Architecture support for automobile autonomy:A state of the art survey2012Report (Other academic)
  • 42.
    Behere, Sagar
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Reference Architectures for Highly Automated Driving2016Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    Highly automated driving systems promise increased road traffic safety, as well as positive impacts on sustainable transportation by means of increased traffic efficiency and environmental friendliness. The design and development of such systems require scientific advances in a number of areas. One area is the vehicle's electrical/electronic (E/E) architecture. The E/E architecture can be presented using a number of views, of which an important one is the functional view. The functional view describes the decomposition of the system into its main logical components, along with the hierarchical structure, the component inter-connections, and requirements. When this view captures the principal ideas and patterns that constitute the foundation of a variety of specific architectures, it may be termed as a reference architecture. Two reference architectures for highly automated driving form the principal contribution of this thesis. The first reference architecture is for cooperative driving. In a cooperative driving situation, vehicles and road infrastructure in the vicinity of a vehicle continuously exchange wireless information and this information is then used to control the motion of the vehicle. The second reference architecture is for autonomous driving, wherein the vehicle is capable of driver-less operation even without direct communication with external entities. The description of both reference architectures includes their main components and the rationale for how these components should be distributed across the architecture and its layers. These architectures have been validated via multiple real-world instantiations, and the guidelines for instantiation also form part of the architecture description. A comparison with similar architectures is also provided, in order to highlight the similarities and differences. The comparisons show that in the context of automated driving, the explicit recognition of components for semantic understanding, world modeling, and vehicle platform abstraction are unique to the proposed architecture. These components are not unusual in architectures within the Artificial Intelligence/robotics domains; the proposed architecture shows how they can be applied within the automotive domain. A secondary contribution of this thesis is a description of a lightweight, four step approach for model based systems engineering of highly automated driving systems, along with supporting model classes. The model classes cover the concept of operations, logical architecture, application software components, and the implementation platforms. The thesis also provides an overview of current implementation technologies for cognitive driving intelligence and vehicle platform control, and recommends a specific setup for development and accelerated testing of highly automated driving systems, that includes model- and hardware-in-the-loop techniques in conjunction with a publish/subscribe bus. Beyond the more "traditional" engineering concepts, the thesis also investigates the domain of machine consciousness and computational self-awareness. The exploration indicates that current engineering methods are likely to hit a complexity ceiling, breaking through which may require advances in how safety-critical systems can self-organize, construct, and evaluate internal models to reflect their perception of the world. Finally, the thesis also presents a functional architecture for the brake system of an autonomous truck. This architecture proposes a reconfiguration of the existing brake systems of the truck in a way that provides dynamic, diversified redundancy, and an increase in the system reliability and availability, while meeting safety requirements.

  • 43.
    Behere, Sagar
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Architecting Autonomous Automotive Systems: With an emphasis on Cooperative Driving2013Licentiate thesis, comprehensive summary (Other academic)
    Abstract [en]

    The increasing usage of electronics and software in a modern automobile enables realization of many advanced features. One such feature is autonomous driving. Autonomous driving means that a human driver’s intervention is not required to drive the automobile; rather, theautomobile is capable of driving itself. Achieving automobile autonomyrequires research in several areas, one of which is the area of automotive electrical/electronics (E/E) architectures. These architectures deal with the design of the computer hardware and software present inside various subsystems of the vehicle, with particular attention to their interaction and modularization. The aim of this thesis is to investigate how automotive E/E architectures should be designed so that 1) it ispossible to realize autonomous features and 2) a smooth transition canbe made from existing E/E architectures, which have no explicit support for autonomy, to future E/E architectures that are explicitly designed for autonomy.The thesis begins its investigation by considering the specific problem of creating autonomous behavior under cooperative driving condi-tions. Cooperative driving conditions are those where continuous wireless communication exists between a vehicle and its surroundings, which consist of the local road infrastructure as well as the other vehicles in the vicinity. In this work, we define an original reference architecture for cooperative driving. The reference architecture demonstrates how a subsystem with specific autonomy features can be plugged into an existing E/E architecture, in order to realize autonomous driving capabilities. Two salient features of the reference architecture are that it isminimally invasive and that it does not dictate specific implementation technologies. The reference architecture has been instantiated on two separate occasions and is the main contribution of this thesis. Another contribution of this thesis is a novel approach to the design of general, autonomous, embedded systems architectures. The approach introduces an artificial consciousness within the architecture, that understands the overall purpose of the system and also how the different existing subsystems should work together in order to meet that purpose.This approach can enable progressive autonomy in existing embedded systems architectures, over successive design iterations.

  • 44.
    Behere, Sagar
    et al.
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Asplund, Fredrik
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Söderberg, Andreas
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.). The SP Technical Research Institute, Sweden.
    Törngren, Martin
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Architecture challenges for intelligent autonomous machines: An industrial perspective2016In: 13th International conference on Intelligent Autonomous Systems (IAS-13), Springer, 2016, Vol. 302, 1669-1681 p.Conference paper (Refereed)
    Abstract [en]

    Machines are displaying a trend of increasing autonomy. This has a far reaching impact on the architectures of the embedded systems within the machine. The impact needs to be clearly understood and the main obstacles to autonomy need to be identified. The obstacles, especially from an industrial perspective, are not just technological butalso relate to system aspects like certification, development processes and product safety. In this paper, we identify and discuss some of the main obstacles to autonomy from the viewpoint of technical specialists working on advanced industrial product development. The identified obstacles cover topics like world modeling, user interaction, complexity and system safety.

  • 45.
    Behere, Sagar
    et al.
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Törngren, Martin
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Chen, DeJiu
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    A reference architecture for cooperative driving2013In: Journal of systems architecture, ISSN 1383-7621, E-ISSN 1873-6165, Vol. 59, no 10: Part C, 1095-1112 p.Article in journal (Refereed)
    Abstract [en]

    Cooperative driving systems enable vehicles to adapt their motion to the surrounding traffic situation by utilizing information communicated by other vehicles and infrastructure in the vicinity. How should these systems be designed and integrated into the modern automobile? What are the needed functions, key architectural elements and their relationships? We created a reference architecture that systematically answers these questions and validated it in real world usage scenarios. Key findings concern required services and enabling them via the architecture. We present the reference architecture and discuss how it can influence the design and implementation of such features in automotive systems.

  • 46.
    Berntsson, Lars-Olof
    et al.
    Volvo Technology AB.
    Blom, Hans
    Volvo Technology AB.
    Chen, DeJiu
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Systems.
    Cuenot, Philippe
    Siemens VDO.
    Donandt, Jörg
    Daimler AG.
    Eklund, Ulrich
    Volvo Cars.
    Freund, Ulrich
    ETAS GmbH.
    Frey, Patrick
    ETAS GmbH.
    Gérard, Sébastien
    CEA List , Commissariat à l'Énergie Atomique Saclay.
    Jansson, Pontus
    Mecel AB.
    Johansson, Rolf
    Mentor Graphics Corp..
    Lönn, Henrik
    Volvo Technology AB.
    Reiser, Mark-Oliver
    Technical University of Berlin.
    Selin, Dennis
    Volvo Cars.
    Servat, David
    CEA List , Commissariat à l'Énergie Atomique Saclay.
    Sjöstedt, Carl-Johan
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Systems.
    Tessier, Patrick
    CEA List , Commissariat à l'Énergie Atomique Saclay.
    Reiser, Mark-Oliver
    Technical University of Berlin.
    Törner, Fredrik
    Volvo Car Corp..
    Törngren, Martin
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Systems.
    Weber, Matthias
    Carmeq GmbH.
    EAST-ADL 2.0 Specification2008Report (Refereed)
    Abstract [en]

    This specification of the EAST ADL 2.0 is based on the EAST-ADL developed in the EAST EEA projectand has been further refined and harmonized with on-going modelling appraches in the automotiveindustry. It presents the modeling infrastructure, i.e. how the modeling elements should be represented inthe language and the UML representation. For each package a usage example is provided.The EAST-ADL 2.0 is harmonized with AUTOSAR.The metamodel and UML profile of EAST ADL 2.0 is defined in two steps: A domain (automotive)metamodel is defined, capturing only the domain specific needs of the language, without adding the UML2details. The basic concepts of UML are used for this purpose, such as classes, compositions andassociations. Based on the domain metamodel, a UML2 profile for the domain metamodel is defined,specifying stereotypes with properties and constraints.Comments on the content of this document are welcomed, and should be directed to <coordinator@atesst.org>.Please download the latest available specification and the XMI file ready for use in UML2 tools from the <atesst.org> website.

  • 47.
    Beserra, G. S.
    et al.
    University of Brasilia.
    Attarzadeh Niaki, Seyed Hosein
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Integrating virtual platforms into a heterogeneous MoC-based modeling framework2012In: Proceedings of Forum on Specification and Design Languages (FDL) 2012, IEEE conference proceedings, 2012, 143-150 p.Conference paper (Refereed)
    Abstract [en]

    In order to handle the increasing complexity of embedded systems, design methodologies must take into account important aspects, such as abstraction, IP-reuse and heterogeneity. System design often starts in a high abstraction level, by developing a virtual platform (VP), which is typically composed of TLM models. TLM has become very popular in the modeling of bus-based systems and currently there is an increasing availability of libraries that provide TLM IPs. Heterogeneity can be naturally captured in a framework supporting different Models of Computation (MoCs). We introduce a novel approach for integrating TLM IPs/VPs into a MoC-based modeling framework, allowing them to co-simulate heterogeneous systems. This approach allows to raise the abstraction level, enabling a more careful design space exploration before selecting a proper VP. We exemplify the potential of our approach with a case study in which a VP with a processor generated by ArchC communicates with a continuous-time model.

  • 48. Bharadwaj, Bharadwaj
    et al.
    Mehta, Nandish
    Dwivedi, Satyam
    ECE Department, Indian Institute of Science/Bangalore.
    Gupte, Ajit
    Adaptative Techniques to Reduce Power in Digital Circuits2011In: Journal of Low Power Electronics and Applications, ISSN 2079-9268, Vol. 1, no 2, 261-276 p.Article in journal (Refereed)
    Abstract [en]

    CMOS chips are engineered with sufficient performance margins to ensure that they meet the target performance under worst case operating conditions. Consequently, excess power is consumed for most cases when the operating conditions are more benign. This article will review a suite of dynamic power minimization techniques, which have been recently developed to reduce power consumption based on actual operating conditions. We will discuss commonly used techniques like Dynamic Power Switching (DPS), Dynamic Voltage and Frequency Scaling (DVS and DVFS) and Adaptive Voltage Scaling (AVS). Recent efforts to extend these to cover threshold voltage adaptation via Dynamic Voltage and Threshold Scaling (DVTS) will also be presented. Computation rate is also adapted to actual work load requirements via dynamically changing the hardware parallelism or by controlling the number of operations performed. These will be explained with some examples from the application domains of media and wireless signal processing.

  • 49.
    Blom, Hans
    et al.
    Volvo Technology AB.
    Lönn, Henrik
    Volvo Technology AB.
    Hagl, Frank
    Continental Automotive DE.
    Papadopoulos, Yiannis
    University of Hull.
    Reiser, Mark-Oliver
    Technical University of Berlin.
    Sjöstedt, Carl-Johan
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Chen, DeJiu
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Tagliabo, Fulvio
    Centro Ricerche Fiat S.C.p.A..
    Torchiaro, Sandra
    Centro Ricerche Fiat S.C.p.A..
    Tucci-Piergiovanni, Sara
    CEA List , Commissariat à l'Énergie Atomique Saclay.
    Tavakoli Kolagari, Ramin
    Nuremberg Institute of Technology.
    EAST-ADL: An Architecture Description Language for Automotive Software-Intensive Systems2013In: Embedded Computing Systems: Applications, Optimization, and Advanced Design / [ed] M. Khalgui, O. Mosbahi, & A. Valentini, Hershey: Information Science Reference, 2013Chapter in book (Refereed)
    Abstract [en]

    EAST-ADL is an Architecture Description Language (ADL) initially defined in several European-funded research projects and subsequently refined and aligned with the more recent AUTOSAR automotive standard. It provides a comprehensive approach for defining automotive electronic systems through an information model that captures engineering information in a standardized form. Aspects covered include vehicle features, requirements, analysis functions, software and hardware components, and communication. The representation of the system’s implementation is not defined in EAST-ADL itself but by AUTOSAR. However, traceability is supported from EAST-ADL’s lower abstraction levels to the implementation level elements in AUTOSAR. In this chapter, the authors describe EAST-ADL in detail, show how it relates to AUTOSAR as well as other significant automotive standards, and present current research work on using EAST-ADL in the context of fully-electric vehicles, the functional safety standard ISO 26262, and for multi-objective optimization.

  • 50.
    Borgström, Fredrik
    KTH, School of Technology and Health (STH), Medical Engineering, Computer and Electronic Engineering.
    Acceleration of FreeRTOS withSierra RTOS accelerator: Implementation of a FreeRTOS software layer onSierra RTOS accelerator2016Independent thesis Basic level (professional degree), 10 credits / 15 HE creditsStudent thesis
    Abstract [en]

    Today, the effect of the most common ways to improve the performance of embedded systems and real-time operating systems is stagnating. Therefore it is interesting to examine new ways to push the performance boundaries of embedded systems and real-time operating systems even further. It has previously been demonstrated that the hardware-based real-time operating system, Sierra, has better performance than the software-based real-time operating system, FreeRTOS. These real-time operating systems have also been shown to be similar in many aspects, which mean that it is possible for Sierra to accelerate FreeRTOS. In this thesis an implementation of such acceleration has been carried out. Because existing real-time operating systems are constantly in development combined with that it was several years since an earlier comparison between the two real-time operating systems was per-formed, FreeRTOS and Sierra were compared in terms of functionality and architecture also in this thesis. This comparison showed that FreeRTOS and Sierra share the most fundamental functions of a real-time operating system, and thus can be accelerated by Sierra, but that FreeRTOS also has a number of exclusive functions to facilitate the use of that real-time operating system. The infor-mation obtained by this comparison was the very essence of how the acceleration would be imple-mented. After a number of performance tests it could be concluded that all of the implemented functions, with the exception of a few, had shorter execution time than the corresponding functions in the original version of FreeRTOS.

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