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  • 1.
    Asplund, Fredrik
    et al.
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    Törngren, Martin
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Mechatronics.
    The Discourse on Tool Integration Beyond Technology, A Literature Survey2015In: Journal of Systems and Software, ISSN 0164-1212, E-ISSN 1873-1228, Vol. 106, p. 117-131Article in journal (Refereed)
    Abstract [en]

    The tool integration research area emerged in the 1980s. This survey focuses on those strands of tool integration research that discuss issues beyond technology.

     

    We reveal a discourse centered around six frequently mentioned non-functional properties. These properties have been discussed in relation to technology and high level issues. However, while technical details have been covered, high level issues and, by extension, the contexts in which tool integration can be found, are treated indifferently. We conclude that this indifference needs to be challenged, and research on a larger set of stakeholders and contexts initiated.

     

    An inventory of the use of classification schemes underlines the difficulty of evolving the classical classification scheme published by Wasserman. Two frequently mentioned redefinitions are highlighted to facilitate their wider use.

     

    A closer look at the limited number of research methods and the poor attention to research design indicates a need for a changed set of research methods. We propose more critical case studies and method diversification through theory triangulation.

     

    Additionally, among disparate discourses we highlight several focusing on standardization which are likely to contain relevant findings. This suggests that open communities employed in the context of (pre-)standardization could be especially important in furthering the targeted discourse.

  • 2. Bousse, Erwan
    et al.
    Leroy, Dorian
    Combemale, Benoit
    Wimmer, Manuel
    Baudry, Benoit
    KTH, School of Electrical Engineering and Computer Science (EECS), Software and Computer systems, SCS.
    Omniscient debugging for executable DSLs2018In: Journal of Systems and Software, ISSN 0164-1212, E-ISSN 1873-1228, Vol. 137, p. 261-288Article in journal (Refereed)
    Abstract [en]

    Omniscient debugging is a promising technique that relies on execution traces to enable free traversal of the states reached by a model (or program) during an execution. While a few General-Purpose Languages (GPLs) already have support for omniscient debugging, developing such a complex tool for any executable Domain Specific Language (DSL) remains a challenging and error prone task. A generic solution must: support a wide range of executable DSLs independently of the metaprogramming approaches used for implementing their semantics; be efficient for good responsiveness. Our contribution relies on a generic omniscient debugger supported by efficient generic trace management facilities. To support a wide range of executable DSLs, the debugger provides a common set of debugging facilities, and is based on a pattern to define runtime services independently of metaprogramming approaches. Results show that our debugger can be used with various executable DSLs implemented with different metaprogramming approaches. As compared to a solution that copies the model at each step, it is on average sixtimes more efficient in memory, and at least 2.2 faster when exploring past execution states, while only slowing down the execution 1.6 times on average.

  • 3.
    Danglot, Benjamin
    et al.
    INRIA, Lille, France..
    Vera-Perez, Oscar
    INRIA, Rennes, France..
    Yu, Zhongxing
    KTH, School of Electrical Engineering and Computer Science (EECS), Theoretical Computer Science, TCS.
    Zaidman, Andy
    Delft Univ Technol, Delft, Netherlands..
    Monperrus, Martin
    KTH, School of Electrical Engineering and Computer Science (EECS), Theoretical Computer Science, TCS.
    Baudry, Benoit
    KTH, School of Electrical Engineering and Computer Science (EECS), Software and Computer systems, SCS.
    A snowballing literature study on test amplification2019In: Journal of Systems and Software, ISSN 0164-1212, E-ISSN 1873-1228, Vol. 157, article id UNSP 110398Article in journal (Refereed)
    Abstract [en]

    The adoption of agile approaches has put an increased emphasis on testing, resulting in extensive test suites. These suites include a large number of tests, in which developers embed knowledge about meaningful input data and expected properties as oracles. This article surveys works that exploit this knowledge to enhance manually written tests with respect to an engineering goal (e.g., improve coverage or refine fault localization). While these works rely on various techniques and address various goals, we believe they form an emerging and coherent field of research, which we coin "test amplification". We devised a first set of papers from DBLP, searching for all papers containing "test" and "amplification" in their title. We reviewed the 70 papers in this set and selected the 4 papers that fit the definition of test amplification. We use them as the seeds for our snowballing study, and systematically followed the citation graph. This study is the first that draws a comprehensive picture of the different engineering goals proposed in the literature for test amplification. We believe that this survey will help researchers and practitioners entering this new field to understand more quickly and more deeply the intuitions, concepts and techniques used for test amplification. rights reserved.

  • 4.
    Katsikas, Georgios P.
    et al.
    KTH, School of Information and Communication Technology (ICT), Communication Systems, CoS, Network Systems Laboratory (NS Lab).
    Maguire Jr., Gerald Q.
    KTH, School of Information and Communication Technology (ICT), Communication Systems, CoS, Radio Systems Laboratory (RS Lab).
    Kostic, Dejan
    KTH, School of Information and Communication Technology (ICT), Communication Systems, CoS, Network Systems Laboratory (NS Lab).
    Profiling and accelerating commodity NFV service chains with SCC2017In: Journal of Systems and Software, ISSN 0164-1212, E-ISSN 1873-1228, Vol. 127, no C, p. 12-27Article in journal (Refereed)
    Abstract [en]

    Recent approaches to network functions virtualization (NFV) have shown that commodity network stacks and drivers struggle to keep up with increasing hardware speed. Despite this, popular cloud networking services still rely on commodity operating systems (OSs) and device drivers.

     

    Taking into account the hardware underlying of commodity servers, we built an NFV profiler that tracks the movement of packets across the system’s memory hierarchy by collecting key hardware and OS-level performance counters.

     

    Leveraging the profiler’s data, our Service Chain Coordinator’s (SCC) runtime accelerates user-space NFV service chains, based on commodity drivers. To do so, SCC combines multiplexing of system calls with scheduling strategies, taking time, priority, and processing load into account.

     

    By granting longer time quanta to chained network functions (NFs), combined with I/O multiplexing, SCC reduces unnecessary scheduling and I/O overheads, resulting in three-fold latency reduction due to cache and main memory utilization improvements. More importantly, SCC reduces the latency variance of NFV service chains by up to 40x compared to standard FastClick chains by making the average case for an NFV chain to perform as well as the best case. These improvements are possible because of our profiler’s accuracy.

  • 5.
    Lagerström, Robert
    et al.
    KTH, School of Electrical Engineering (EES), Industrial Information and Control Systems.
    Johnson, Pontus
    KTH, School of Electrical Engineering (EES), Industrial Information and Control Systems.
    Höök, David
    KTH, School of Electrical Engineering (EES), Industrial Information and Control Systems.
    Architecture analysis of enterprise systems modifiability - Models, analysis, and validation2010In: Journal of Systems and Software, ISSN 0164-1212, E-ISSN 1873-1228, Vol. 83, no 8, p. 1387-1403Article in journal (Refereed)
    Abstract [en]

    Enterprise architecture (EA) models can be used in order to increase the general understanding of enterprise systems and to perform various kinds of analysis. This paper presents instantiated architectural models based on a metamodel for enterprise systems modifiability analysis, i.e. for assessing the cost of making changes to enterprise-wide systems. The instantiated architectural models detailed are based on 21 software change projects conducted at four large Nordic companies. Probabilistic relational models (PRMs) are used for formalizing the EA analysis approach. PRMs enable the combination of regular entity-relationship modeling aspects with means to perform enterprise architecture analysis under uncertainty. The modifiability metamodel employed in the analysis is validated with survey and workshop data (in total 110 experts were surveyed) and with the data collected in the 21 software change projects. Validation indicates that the modifiability metamodel contains the appropriate set of elements. It also indicates that the metamodel produces estimates within a 75% accuracy in 87% of the time and has a mean accuracy of 88% (when considering projects of 2000 man-hours or more).

  • 6. Larusdottir, M.
    et al.
    Gulliksen, Jan
    KTH, School of Computer Science and Communication (CSC), Media Technology and Interaction Design, MID.
    Cajander, Å.
    A license to kill - Improving UCSD in Agile development2017In: Journal of Systems and Software, ISSN 0164-1212, E-ISSN 1873-1228, Vol. 123Article in journal (Refereed)
    Abstract [en]

    Agile development processes, such as Scrum, focus on communication, developer collaboration and delivery of working software early and continuously. User-centered systems design (UCSD) is a process emphasizing usability and the user experience throughout the system life cycle. It highlights the UCSD activities: understanding the context of use, iterative prototyping to explore the design space and active collaboration with users throughout the software development. Agile processes are by many assumed to address similar issues as UCSD, hence, by applying Agile processes the systems would become usable for the end-users and their user experience should improve. This paper discusses and interprets findings on UCSD activities in Agile projects in practice, that are analyzed according to the fundamental principles from the Agile manifesto. We show that Agile development has much to gain from integrating UCSD, and give guidance on how to integrate UCSD in Agile processes. User experience (UX) professionals need a more explicit role in the Agile projects and more authority. We recommend that they receive a "license to kill" design suggestions that are not perceived as useful by the users.

  • 7. Martinez, M.
    et al.
    Monperrus, Martin
    KTH, School of Electrical Engineering and Computer Science (EECS), Computer Science, Theoretical Computer Science, TCS.
    Astor: Exploring the design space of generate-and-validate program repair beyond GenProg2019In: Journal of Systems and Software, ISSN 0164-1212, E-ISSN 1873-1228, Vol. 151, p. 65-80Article in journal (Refereed)
    Abstract [en]

    This article contributes to defining the design space of program repair. Repair approaches can be loosely characterized according to the main design philosophy, in particular “generate- and-validate” and synthesis-based approaches. Each of those repair approaches is a point in the design space of program repair. Our goal is to facilitate the design, development and evaluation of repair approaches by providing a framework that: a) contains components commonly present in most approaches, b) provides built-in implementations of existing repair approaches. This paper presents a Java framework named Astor that focuses on the design space of generate-and-validate repair approaches. The key novelty of Astor is to provides explicit extension points to explore the design space of program repair. Thanks to those extension points, researchers can both reuse existing program repair components and implement new ones. Astor includes 6 unique implementations of repair approaches in Java, including GenProg for Java called jGenProg. Researchers have already defined new approaches over Astor. The implementations of program repair approaches built already available in Astor are capable of repairing, in total, 98 real bugs from 5 large Java programs. Astor code is publicly available on Github: https://github.com/SpoonLabs/astor.

  • 8. Nayebi, Abbas
    et al.
    Sarbazi-Azad, Hamid
    Karlsson, Gunnar
    KTH, School of Electrical Engineering (EES), Communication Networks.
    Performance analysis of opportunistic broadcast for delay-tolerant wireless sensor networks2010In: Journal of Systems and Software, ISSN 0164-1212, E-ISSN 1873-1228, Vol. 83, no 8, p. 1310-1317Article in journal (Refereed)
    Abstract [en]

    This paper investigates a class of mobile wireless sensor networks that are unconnected most of the times; we refer to them as delay-tolerant wireless sensor networks (DTWSN). These networks inherit their characteristics from both delay tolerant networks (DTN) and traditional wireless sensor networks. After introducing DTWSNs, three main problems in the design space of these networks are discussed: routing, data gathering, and neighbor discovery. A general protocol is proposed for DTWSNs based on opportunistic broadcasting in delay-tolerant networks with radio device on-off periods. Three performance measures are defined in the study: the energy for sending queries to ask for data from possible neighbors (querying energy), data transfer energy, and absorption time (delay). A simple yet accurate approximation for the data-transfer energy is proposed. An analytic model is provided to evaluate the querying energy per contact (epc). Simulation results for the data propagation delay show that the querying energy per contact measure obtained from the analytic model is proportional to the product of the querying energy and the delay. A practical rule of thumb for an optimal query interval in terms of delay and energy is derived from different parts of the study. (C) 2010 Elsevier Inc. All rights reserved.

  • 9.
    Närman, Per
    et al.
    KTH, School of Electrical Engineering (EES), Industrial Information and Control Systems.
    Holm, Hannes
    KTH, School of Electrical Engineering (EES), Industrial Information and Control Systems.
    Höök, David
    KTH, School of Electrical Engineering (EES), Industrial Information and Control Systems.
    Honeth, Nicholas
    KTH, School of Electrical Engineering (EES), Industrial Information and Control Systems.
    Johnson, Pontus
    KTH, School of Electrical Engineering (EES), Industrial Information and Control Systems.
    Using enterprise architecture and technology adoption models to predict application usage2012In: Journal of Systems and Software, ISSN 0164-1212, E-ISSN 1873-1228, Vol. 85, no 8, p. 1953-1967Article in journal (Refereed)
    Abstract [en]

    Application usage is an important parameter to consider in application portfolio management. This paper presents an enterprise architecture analysis framework which can be used to assess application usage. The framework, in the form of an architecture metamodel, incorporates variables from the previously published Technology Acceptance Model (TAM) and the Task-Technology Fit (TTF) model. The paper describes how the metamodel has been tailored for a specific domain, viz, industry maintenance management. The metamodel was tested in the maintenance management domain through a survey with 55 respondents at five companies. Data collected in the survey showed that the domain-specific metamodel is able to explain variations in maintenance management application usage. Integrating the TAM and TTF variables with an architecture metamodel allows architects to reuse research results smoothly, thereby aiding them in producing good application portfolio decision-support.

  • 10.
    Walker, Martin
    et al.
    University of Hull.
    Reiser, Mark-Oliver
    Technical University of Berlin.
    Tucci-Piergiovanni, Sara
    CEA List , Commissariat à l'Énergie Atomique Saclay.
    Papadopoulos, Yiannis
    University of Hull.
    Lönn, Henrik
    Volvo Technology AB.
    Mraidha, Chokri
    CEA List , Commissariat à l'Énergie Atomique Saclay.
    Parker, David
    University of Hull.
    Chen, DeJiu
    KTH, School of Industrial Engineering and Management (ITM), Machine Design (Dept.), Embedded Control Systems.
    Servat, David
    CEA List , Commissariat à l'Énergie Atomique Saclay.
    Automatic Optimisation of System Architectures using EAST-ADL2013In: Journal of Systems and Software, ISSN 0164-1212, E-ISSN 1873-1228, Vol. 86, no 10, p. 2467-2487Article in journal (Refereed)
    Abstract [en]

    There are many challenges which face designers of complex system architectures, particularly safety-critical or real-time systems. The introduction of architecture description languages (ADLs) has helped to meet these challenges by consolidating information about a system and providing a platform for modelling and analysis capabilities. However, managing this wealth of information can still be problematic, and evaluation of potential design decisions is still often performed manually. Automatic architectural optimisation can be used to assist this decision process, enabling designers to rapidly explore many different options and evaluate them according to specific criteria. In this paper, we present a multi-objective optimisation approach based on EAST-ADL, an ADL in the automotive domain, with the goal of combining the advantages of ADLs and architectural optimisation. The approach is designed to be extensible and leverages the capabilities of EAST-ADL to provide support for evaluation according to different factors, including dependability, timing/performance, and cost. The technique is applied to an illustrative example system featuring both hardware and software perspectives, demonstrating the potential benefits of this concept to the design of embedded system architectures.

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