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  • 1. Buchholt, K.
    et al.
    Eklund, P.
    Jensen, J.
    Lu, J.
    Ghandi, Reza
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Behan, G.
    Zhang, H.
    Spetz, A. Lloyd
    Hultman, L.
    Growth and characterization of epitaxial Ti3GeC2 thin films on 4H-SiC(0001)2012In: Journal of Crystal Growth, ISSN 0022-0248, E-ISSN 1873-5002, Vol. 343, no 1, p. 133-137Article in journal (Refereed)
    Abstract [en]

    Epitaxial Ti3GeC2 thin films were deposited on 4 degrees off-cut 4H-SiC(0001) using magnetron sputtering from high purity Ti, C, and Ge targets. Scanning electron microscopy and helium ion microscopy show that the Ti3GeC2 films grow by lateral step-flow with {11 (2) over bar0} faceting on the SiC surface. Using elastic recoil detection analysis, atomic force microscopy, and X-Ray diffraction the films were found to be substoichiometric in Ge with the presence of small Ge particles at the surface of the film.

  • 2. Buchholt, Kristina
    et al.
    Ghandi, Reza
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Lu, J.
    Eklund, Per
    Hultman, Lars
    Lloyd Spetz, Anita
    Ohmic contact properties of magnetron sputtered Ti3SiC2 on n- and p-type 4H-silicon carbide2011In: Applied Physics Letters, ISSN 0003-6951, E-ISSN 1077-3118, Vol. 98, no 4, p. 042108-Article in journal (Refereed)
    Abstract [en]

    Epitaxial Ti3SiC2 (0001) thin film contacts were grown on doped 4H-SiC (0001) using magnetron sputtering in an ultra high vacuum system. The specific contact resistance was investigated using linear transmission line measurements. Rapid thermal annealing at 950 degrees C for 1 min of as-deposited films yielded ohmic contacts to n-type SiC with contact resistances in the order of 10(-4) Omega cm(2). Transmission electron microscopy shows that the interface between Ti3SiC2 and n-type SiC is atomically sharp with evidence of interfacial ordering after annealing. (c) 2011 American Institute of Physics.

  • 3.
    Buono, Benedetto
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Ghandi, Reza
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Malm, B. Gunnar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Current Gain Degradation in 4H-SiC Power BJTs2011In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 679-680, p. 702-705Article in journal (Refereed)
    Abstract [en]

    SiC airs are very attractive for high power application, but long term stability is still problematic and it could prohibit commercial production of these devices. The aim of this paper is to investigate the current gain degradation in BJTs with no significant degradation of the on-resistance. Electrical measurements and simulations have been used to characterize the behavior of the BJT during the stress test. Current gain degradation occurs, the gain drops from 58 before stress to 43 after 40 hours, and, moreover, the knee current shows fluctuations in its value during the first 20 hours. Current gain degradation has been attributed to increased interface traps or reduced lifetime in the base-emitter region or small stacking faults in the base-emitter region, while fluctuations of the knee current might be due to stacking faults in the collector region.

  • 4.
    Buono, Benedetto
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Ghandi, Reza
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Malm, B. Gunnar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Influence of Emitter Width and Emitter-Base Distance on the Current Gain in 4H-SiC Power BJTs2010In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 57, no 10, p. 2664-2670Article in journal (Refereed)
    Abstract [en]

    The influence of the emitter-base geometry on the current gain has been investigated by means of measurements and simulations. Particular attention has been placed on the emitter width and on the distance between the emitter edge and the base contact. When the emitter width is decreased from 40 to 8 mu m, the current gain is reduced by 20%, whereas when the distance between the base contact and the emitter edge is decreased from 5 to 2 mu m, the current gain is reduced by 10%. Simulations have been used to investigate the reasons for the current gain reduction. The reduction of the emitter width induces two mechanisms of current gain reduction: earlier forward biasing of the base-collector junction and higher recombination in the emitter region. Both mechanisms result from the higher current density flowing under the emitter region. Placing the base contact very close to the emitter edge increases the base current by increasing the gradient of the electron concentration toward the base contact. The effect of increasing the base doping in the extrinsic region has been simulated, and the results demonstrate that the current gain can be improved if a high doping concentration in the range of 5 x 10(18) cm(-3) is used.

  • 5.
    Buono, Benedetto
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Ghandi, Reza
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Malm, B. Gunnar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Modeling and Characterization of Current Gain Versus Temperature in 4H-SiC Power BJTs2010In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 57, no 3, p. 704-711Article in journal (Refereed)
    Abstract [en]

    Accurate physical modeling has been developed to describe the current gain of silicon carbide (SiC) power bipolar junction transistors (BJTs), and the results have been compared with measurements. Interface traps between SiC and SiO2 have been used to model the surface recombination by changing the trap profile, capture cross section, and concentration. The best agreement with measurement is obtained using one single energy level at 1 eV above the valence band, a capture cross section of 1 x 10(-15) cm(2), and a trap concentration of 2 x 10(12) cm(-2). Simulations have been performed at different temperatures to validate the model and characterize the temperature behavior of SiC BJTs. An analysis of the carrier concentration at different collector currents has been performed in order to describe the mechanisms of the current gain fall-off at a high collector current both at room temperature and high temperatures. At room temperature, high injection in the base ( which has a doping concentration of 3 x 10(17) cm(-3)) and forward biasing of the base-collector junction occur simultaneously, causing an abrupt drop of the current gain. At higher temperatures, high injection in the base is alleviated by the higher ionization degree of the aluminum dopants, and then forward biasing of the base-collector junction is the acting mechanism for the current gain fall-off. Forward biasing of the base-collector junction can also explain the reduction of the knee current with increasing temperature by means of the negative temperature dependence of the mobility.

  • 6.
    Buono, Benedetto
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Ghandi, Reza
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Malm, B. Gunnar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Temperature Modeling and Characterization of the Current Gain in 4H-SiC Power BJTs2010In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 645-648, p. 1061-1064Article in journal (Refereed)
    Abstract [en]

    The current gain of 4H-SiC BJTs has been modeled using interface traps between SIC and SiO2 to describe surface recombination, by a positive temperature dependence of the carrier lifetime in the base region and by bandgap narrowing in the emitter region. The interface traps have been modeled by one single level at 1 eV above the valence band, with capture cross section of 1 x 10(-15) cm(2) and concentration of 2 x 10(12) cm(-2). The temperature behavior of SiC BJTs has been simulated and the results have been compared with measurements. An analysis of the carrier concentration has been performed in order to describe the mechanisms for fall-off of the current gain at high collector current. At room temperature high injection in the base and forward biasing of the base-collector junction occur simultaneously causing an abrupt drop of the current gain. At higher temperatures high injection in the base is alleviated by the higher ionization degree of the aluminum dopants, and then forward biasing of the base-collector junction is the only acting mechanism for the current gain fall-off at high collector current. This mechanism and the negative temperature dependence of the carrier mobility can also explain the reduction of the knee current for gain fall-off with increasing temperature. Simulations with different emitter widths have been also performed and analyzed to characterize the emitter size effect. Higher current density caused by reducing the emitter width introduces higher carrier recombination in the emitter region, leading to a reduction of the current gain.

  • 7.
    Buono, Benedetto
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Ghandi, Reza
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Malm, Bengt Gunnar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Modeling and Characterization of the ON-Resistance in 4H-SiC Power BJTs2011In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 58, no 7, p. 2081-2087Article in journal (Refereed)
    Abstract [en]

    The ON-resistance of silicon carbide bipolar transistors is characterized and simulated. Output characteristics are compared at different base currents and different temperatures in order to validate the physical model parameters. A good agreement is obtained, and the key factors, which limit the improvement of R-ON, are identified. Surface recombination and material quality play an important role in improving device performances, but the device design is also crucial. Based on simulation results, a design that can enhance the conductivity modulation in the lowly doped drift region is proposed. By increasing the base doping in the extrinsic region, it is possible to meet the requirements of having low voltage drop, high current density, and satisfactory forced current gain. According to simulation results, if the doping is 5 x 10(18) cm(-3), it is possible to conduct 200 A/cm(2) at V-CE = 1 V by having a forced current gain of about 8, which represents a large improvement, compared with the simulated value of only one in the standard design.

  • 8.
    Buono, Benedetto
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Ghandi, Reza
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Malm, Gunnar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Investigation of Current Gain Degradation in 4H-SiC Power BJTs2012In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 717-720, p. 1131-1134Article in journal (Refereed)
    Abstract [en]

    The current gain degradation of 4H-SiC BJTs with no significant drift of the on-resistance is investigated. Electrical stress on devices with different emitter widths suggests that the device design can influence the degradation behavior. Analysis of the base current extrapolated from the Gummel plot indicates that the reduction of the carrier lifetime in the base region could be the cause for the degradation of the gain. However, analysis of the base current of the base-emitter diode shows that the degradation of the passivation layer could also influence the reduction of the current gain.

  • 9.
    Buono, Benedetto
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Lee, Hyung-Seok
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl -Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Simulations of Open Emitter Breakdown Voltage in SiC BJTs with non Implanted JTE2009In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 615-617, p. 841-844Article in journal (Refereed)
    Abstract [en]

    Ion implantation for selective doping of SiC is problematic due to damage generation during the process and low activation of dopants. In SiC bipolar junction transistor (BJT) the junction termination extension (JTE) can be formed without ion implantation using instead a controlled etching into the epitaxial base. This etched JTE is advantageous because it eliminates ion implantation induced damage and the need for high temperature annealing. However, the dose, which is controlled by the etched base thickness and doping concentration, plays a crucial role. In order to find the optimum parameters, device simulations of different etched base thicknesses have been performed using the software Sentaurus Device. A surface passivation layer consisting of silicon dioxide, considering interface traps and fixed trapped charge, has been included in the analysis by simulations. Moreover a comparison with measured data for fabricated SiC BJTs has been performed.

  • 10.
    Carroll, Jude
    et al.
    Oxford Brookes University.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Hjälp studenterna att undvika plagiering2009 (ed. 1)Book (Other (popular science, discussion, etc.))
  • 11. Cho, H.
    et al.
    Lee, K. P.
    Leerungnawarat, P.
    Chu, S. N. G.
    Ren, F.
    Pearton, S. J.
    Zetterling, Carl-Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    High density plasma via hole etching in SiC2001In: Journal of Vacuum Science & Technology. A. Vacuum, Surfaces, and Films, ISSN 0734-2101, E-ISSN 1520-8559, Vol. 19, no 4, p. 1878-1881Article in journal (Refereed)
    Abstract [en]

    Throughwafer vias up to 100 mum deep were formed in 4H-SiC substrates by inductively coupled plasma etching with SF6/O-2 at a controlled rate of similar to0.6 mum min(-1) and use of Al masks. Selectivities of > 50 for SiC over Al were achieved. Electrical (capacitance-voltage: current-voltage) and chemical (Auger electron spectroscopy) analysis techniques showed that the etching produced only minor changes in reverse breakdown voltage, Schottky barrier height, and near surface stoichiometry of the SiC and had high selectivity over common frontside metallization. The SiC etch rate was a strong function of the incident ion energy during plasma exposure. This process is attractive for power SiC transistors intended for high current, high temperature applications and also for SiC micromachining.

  • 12. Cho, H.
    et al.
    Leerungnawarat, P.
    Hays, D. C.
    Pearton, S. J.
    Chu, S. N. G.
    Strong, R. M.
    Zetterling, Carl-Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Ren, F.
    Ultradeep, low-damage dry etching of SiC2000In: Applied Physics Letters, ISSN 0003-6951, E-ISSN 1077-3118, Vol. 76, no 6, p. 739-741Article in journal (Refereed)
    Abstract [en]

    The Schottky barrier height (Phi(B)) and reverse breakdown voltage (V-B) of Au/n-SiC diodes were used to examine the effect of inductively coupled plasma SF6/O-2 discharges on the near-surface electrical properties of SiC. For low ion energies (less than or equal to 60 eV) in the discharge, there is minimal change in Phi(B) and V-B, but both parameters degrade at higher energies. Highly anisotropic features typical of through-wafer via holes were formed in SiC using an Al mask.

  • 13.
    Colmenares, Juan
    et al.
    KTH, School of Electrical Engineering (EES), Electric power and energy systems.
    Kargarrazi, Saleh
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Elahipanah, Hossein
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Nee, Hans-Peter
    KTH, School of Electrical Engineering (EES), Electric power and energy systems.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    High Temperature Passive Components for Extreme EnvironmentsManuscript (preprint) (Other academic)
    Abstract [en]

    Silicon carbide is an excellent candidate when high temperature power electronics applications are considered. Integrated circuits as well as several power devices have been tested at high temperature. However, little attention has been paid to high temperature passive components that could enable the full SiC potential. In this work, the high temperature performances of different passive components have been studied. Integrated capacitors in bipolar SiC technology has been tested up to 300 °C and, two different designs of inductors have been tested up to 600 °C.

  • 14.
    Colmenares, Juan
    et al.
    KTH, School of Electrical Engineering (EES), Electric Power and Energy Systems.
    Kargarrazi, Saleh
    KTH, School of Information and Communication Technology (ICT), Elektronics, Integrated devices and circuits.
    Elahipanah, Hossein
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Nee, Hans-Peter
    KTH, School of Electrical Engineering (EES), Electric Power and Energy Systems.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    High-Temperature Passive Components for Extreme Environments2016In: 2016 IEEE 4TH WORKSHOP ON WIDE BANDGAP POWER DEVICES AND APPLICATIONS (WIPDA), IEEE conference proceedings, 2016, p. 271-274Conference paper (Refereed)
    Abstract [en]

    Silicon carbide is an excellent candidate when high temperature power electronics applications are considered. Integrated circuits as well as several power devices have been tested at high temperature. However, little attention has been paid to high temperature passive components that could enable the full SiC potential. In this work, the high-temperature performances of different passive components have been studied. Integrated capacitors in bipolar SiC technology have been tested up to 300 degrees C and, three different designs of inductors have been tested up to 700 degrees C.

  • 15. Dahlquist, Fanny
    et al.
    Svedberg, J. -O
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Breitholtz, Bo
    Lendenmann, Heinz
    2.8 kV, forward drop JBS diode with low leakage2000In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 338-342, p. 1179-1182Article in journal (Refereed)
    Abstract [en]

    High voltage Schottky-, Junction Barrier Schottky (JBS)- and PiN-diodes with an implanted JTE termination have been fabricated on the same 4H-SiC wafer. Blocking voltages of 2.5-2.8 kV were reached for JBS and PiN diodes while the Schottky diodes reach about 2.0 kV. It is shown that the JBS design increases the blocking voltage effectively compared to the Schottky device with less than 10% increase in on-state static losses. Also, a comparison of static losses to a PiN diode gives a decrease of 40% for the JBS. The leakage current is also lowered by two decades compared to the Schottky device at its blocking voltage. Temperature measurements show that the low leakage current is maintained up to at least 225 °C.

  • 16. Dahlquist, Fanny
    et al.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Rottner, K.
    Junction barrier Schottky diodes in 4H-SiC and 6H-SiC1998In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 264-268, no PART 2, p. 1061-1064Article in journal (Refereed)
    Abstract [en]

    The Junction Barrier Schottky (JBS) diode in silicon carbide is a promising candidate for a low-leakage power rectifier for high switching frequencies and elevated temperature operation. It has the advantage of a low forward voltage drop while keeping a low leakage current at high blocking voltage. JBS devices have been fabricated in 4H SiC and 6H SiC and then electrically characterised in comparison with pn and Schottky diodes on the same wafer. The JBS devices reached blocking voltages up to 1.0 kV at a leakage current density of 13 ÎŒA/cm2 and the forward conduction was limited by an on-resistance close to the theoretical value.

  • 17. Danielson, E.
    et al.
    Zetterling, Carl-Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Domeij, Martin
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Forsberg, U.
    Janzen, E.
    Investigation of thermal properties in fabricated 4H-SiC high power bipolar transistors2003In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 47, no 4, p. 639-644Article in journal (Refereed)
    Abstract [en]

    Silicon carbide bipolar junction transistors have been fabricated and investigated. The transistors had a maximum current gain of approximately 10 times, and a breakdown voltage of 450 V. When operated at high power densities the device showed a clear self-heating effect, decreasing the current gain. The junction temperature was extracted during self-heating to approximately 150 degreesC, using the assumption that the current gain only depends on temperature. Thermal images of a device under operation were also recorded using an infrared camera, showing a significant temperature increase in the vicinity of the device. The device was also tested in a switched setup, showing fast turn on and turn off at 1 MHz and 300 V supply voltage. Device simulations have been used to analyze the measured data. The thermal conductivity is fitted against the self-heating, and the lifetime in the base is fitted against the measurement of the current gain.

  • 18. Danielsson, E.
    et al.
    Lee, S. K.
    Zetterling, Carl-Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Inductively coupled plasma etch damage in 4H-SiC investigated by Schottky diode characterization2001In: Journal of Electronic Materials, ISSN 0361-5235, E-ISSN 1543-186X, Vol. 30, no 3, p. 247-252Article in journal (Refereed)
    Abstract [en]

    Ti Schottky diodes have been used to investigate the damage caused by inductively coupled plasma (ICP) etching of silicon carbide. The Schottky diodes were characterized using TV and CV measurements. An oxidation approach was tested in order to anneal the damage, and the diode characterization was used to determine the success of the annealing. The barrier height, leakage current, and ideality factor changed significantly on the sample exposed to the etch. When the etched samples were oxidized the electrical properties were recovered and were similar to the unetched reference sample (with oxidation temperatures ranging from 900 degreesC up to 1250 degreesC). Annealing in nitrogen at 1050 degreesC did not improve the electrical characteristics. A low energy etch showed little influence on the electrical characteristics, but since the etch rate was very low the etched depth may not be sufficient in order to reach a steady state condition for the surface damage.

  • 19. Danielsson, E.
    et al.
    Zetterling, Carl-Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Linthicum, K.
    Thomson, D. B.
    Nam, O. H.
    Davis, R. F.
    The influence of band offsets on the IV characteristics for GaN/SiC heterojunctions2002In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 46, no 6, p. 827-835Article in journal (Refereed)
    Abstract [en]

    GaN/SiC heterojunctions can improve the performance considerably for bipolar transistors based on SiC technology. In order to fabricate such devices with a high current gain, the origin of the low turn-on voltage for the heterojunction has to be investigated, which is believed to decrease the minority carrier injection considerably. In this work heterojunction diodes are compared and characterized. For the investigated diodes, the GaN layers have been grown by molecular beam epitaxy (MBE), metal organic chemical vapor deposition, and hydride vapor phase epitaxy. A diode structure fabricated with MBE is presented here, whereas others are collected from previous publications. The layers were grown either with a low temperature buffer, AIN buffer, or without buffer layer. The extracted band offsets are compared and included in a model for a recombination process assisted by tunneling, which is proposed as explanation for the low turn-on voltage. This model was implemented in a device simulator and compared to the measured structures, with good agreement for the diodes with a GaN layer grown without buffer layer. In addition the band offset has been calculated from Schottky barrier measurements, resulting in a type II band alignment with a conduction band offset in the range 0.6-0.9 eV. This range agrees well with the values extracted from capacitance-voltage measurements.

  • 20. Danielsson, E.
    et al.
    Zetterling, Carl-Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Nikolaev, A.
    Nikitina, I. P.
    Dmitriev, V.
    Fabrication and characterization of heterojunction diodes with HVPE-Grown GaN on 4H-SiC2001In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 48, no 3, p. 444-449Article in journal (Refereed)
    Abstract [en]

    GaN/SiC heterojunctions can improve the performance considerably for BJTs and FETs. In this work, heterojunction diodes have been manufactured and characterized. The fabricated diodes have a GaN n-type cathode region on top of a JH-SIC p-type epi layer. The GaN layer was grown with HVPE directly on off-axis SiC without a buffer layer. Mesa structures were formed and a Ti metallization was used as cathode contact to GaN, and the anode contact was deposited on the backside using sputtered Al. Both current-voltage (I-V) and capacitance-voltage (C-V) measurements were performed on the diode structures. The ideality factor of the measured diodes was 1.1 and was constant with temperature. A built in potential of 2.06 V was extracted from I-V-measurements and agrees well with the built in potential from C-V-measurements. The conduction band offset was extracted to 1.1 eV and the heterojunction was of type II. The turn on voltage for the diodes is about 1 V lower than expected and a suggested mechanism for this effect is discussed.

  • 21. Danielsson, E.
    et al.
    Zetterling, Carl-Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Tsvetkov, D.
    Dmitriev, V. A.
    Characterization of heterojunction diodes with hydride vapor phase epitaxy grown AlGaN on 4H-SiC2002In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 91, no 4, p. 2372-2379Article in journal (Refereed)
    Abstract [en]

    AlGaN/4H-SiC heterojunction diodes with varying composition of Al have been fabricated. Five different compositions were investigated, GaN, Al0.1Ga0.9N, Al0.15Ga0.85N, Al0.3Ga0.7N, and Al0.5Ga0.5N, along with a 4H-SiC homojunction diode for comparison. The turn on voltage was around 1 V, and the ideality factor between 1 and 2 for all heterojunction diodes except for the Al0.3Ga0.7N diode. This diode had an ideality factor between 2 and 3, and also showed a much lower series resistance, indicating a change in transport mechanism across the junction. A tunnel assisted recombination model was analyzed and compared to the extracted values of the GaN diode. The model agreed well with both current-voltage and capacitance-voltage measurements for this diode. This model was not applied to the other samples, since their characteristics could not be explained by a simple mechanism.

  • 22. Danielsson, Erik
    et al.
    Breitholtz, Bo
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Simulation Study of on-state Losses as Function of Carrier Life-time for a GaN/SiC High Power HBT Design1999In: Physica scripta. T, ISSN 0281-1847, Vol. 79, p. 290-293Article in journal (Refereed)
    Abstract [en]

    SiC has several properties that makes it more suitable than silicon for high power devices. One problem with SiC bipolar devices is the short carrier life times, and this problem becomes more severe when designing devices for high voltage applications since the dimensions are larger. This work investigates how the Shockley-Read-Hall lifetime influences the on-state characteristics of a HBT or BJT switch in 4H-SiC. The on-state characteristics were simulated with varying SRH lifetimes in the base and drift region. Comparisons were made at 100 A/cm2 collector current density, Jc, and at the base current density, JB, where the total on-state power loss of the design is at minimum. The SRH lifetime in the drift region is the dominant parameter for on-state performance, whereas the SRH lifetime in the base is of much less importance. The simulations showed that to reach an acceptable JC/JB-ratio of 100 at power minimum a SRH lifetime of at least 100 ÎŒs in the drift region was needed for the HBT design. This lifetime is far from the experimental values reported for 4H-SiC. The advantages of the heterojunction in comparison to ordinary BJTs decreases with shorter SRH lifetimes, but an improvement could always be seen.

  • 23.
    Danielsson, Erik
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Lee, Hyung-Seok
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Schöner, Adolf
    Acreo AB.
    Hallin, Christer
    Department of Physics and Measurement Technology, Linköping University.
    A 4H-SiC BJT with an Epitaxially Regrown Extrinsic Base Layer2005In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 483-485, p. 905-908Article in journal (Refereed)
    Abstract [en]

    4H-SiC BJTs were fabricated using epitaxial regrowth instead of ion implantation to form a highly doped extrinsic base layer necessary for a good base ohmic contact. A remaining p(+) regrowth spacer at the edge of the base-emitter junction is proposed to explain a low current gain of 6 for the BJTs. A breakdown voltage of 1000 V was obtained for devices with Al implanted JTE.

  • 24.
    Danielsson, Erik
    et al.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Domeij, Martin
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Zetterling, Carl-Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Schöner, Adolf
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Extrinsic base design of SiC bipolar transistors2004In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 457-460, no II, p. 1117-1120Article in journal (Refereed)
    Abstract [en]

    The SiC npn bipolar junction transistor (BJT) is a very promising device for high voltage and high power switches. The SiC BJT has, due to junction voltage cancellation, potentially a low on-resistance. However, the high resistivity in the base layer can induce a locally forward biased base collector junction and a premature current from the base to collector at on-state. In this work we propose a new technique to fabricate the extrinsic base using regrowth of the extrinsic base layer. This technique can put the highly doped region of the extrinsic base a few tenths of a micron from the intrinsic region. We also propose a new mobility model in our simulations to correctly account for the ionized impurities in minority carrier transport and elevated temperature.

  • 25. Danielsson, Erik
    et al.
    Harris, C. I.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Thermal stability of sputtered TiN as metal gate on 4H-SiC1998In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 264-268, no PART 2, p. 805-808Article in journal (Refereed)
    Abstract [en]

    MOS-structures were made with TiN as metal gate on 4H-SiC. The thermal stability and electrical properties of this gate was determined by CV-measurements. Comparison with Al gates showed that TiN worked well as a gate metal on 4H-SiC. The hysteresis and density of the interface states were comparable for the two gate types. The n-type samples had low leakage and a flatband voltage of a few volts, while the p-type samples had high leakage and a fiatband voltage of around -20 V. The structure showed poor characteristics after a 700°C anneal for one hour, which is probably caused by the formation of titanium silicide. The TiN films had a lower content of nitrogen than expected, which could influence the stability.

  • 26. Danielsson, Erik
    et al.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Breitholtz, B.
    Linthicum, K.
    Thomson, D. B.
    Nam, O. -H
    Davis, R. F.
    Simulation and electrical characterization of GaN/SiC and AlGaN/SiC heterodiodes1999In: Materials Science & Engineering: B. Solid-state Materials for Advanced Technology, ISSN 0921-5107, E-ISSN 1873-4944, Vol. 61-62, p. 320-324Article in journal (Refereed)
    Abstract [en]

    Heterojunctions on SiC is an area in rapid development, especially GaN/SiC and AlGaN/SiC heterojunctions. The heterojunction can improve the performance considerably for BJTs and FETs. In this work heterojunction diodes have been manufactured and characterized. The structure was a GaN or AlGaN n-type region on top of a 6H-SiC p-type substrate. Two different approaches of growing the n-type region were tested. The GaN was grown with the MBE technique using a polycrystalline GaN buffer, whereas the AlGaN was grown with CVD and an AlN buffer. The AlGaN had an aluminum mole fraction of around 0.1. Mesa structures were formed using Cl2 RIE of GaN/AlGaN, which showed good selectivity on 6H-SiC (about 1:6). A Ti metallization with subsequent RTA was used as contact to GaN and AlGaN, and the contact to 6H-SiC was liquid InGa. Both I-V and C-V measurements were performed on the heterojunction diode. The ideality factor of the diodes, doping concentration of the SiC, and the band alignment of the heterojunction were extracted. © 1999 Elsevier Science S.A.

  • 27. Danielsson, Erik
    et al.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Forsberg, U.
    Janzen, E.
    Investigation of thermal properties in fabricated 4H-SiC high-power bipolar transistors2002In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 389-393, no 2, p. 1337-1340Article in journal (Refereed)
    Abstract [en]

    Silicon Carbide bipolar junction transistors have been fabricated and investigated. The transistors had a maximmn current gain of approximately 10 times, and a breakdown voltage of up to 600 V. When operated at high power densities the device showed a clear self-heating effect, decreasing the current gain. The junction temperature was extracted during self-heating to approximately 150 °C, using the assumption that the current gain only depends on temperature. Thermal images of a device under operation were also recorded using an infrared camera, showing a significant temperature increase in the vicinity of the device. Physical device simulations have been used to analyze the measured data. The thermal conductivity is fitted to model the measured self-heating, and the lifetime in the base is fitted against the measurement of the current gain.

  • 28. Danielsson, Erik
    et al.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Lee, S. K.
    Linthicum, K. J.
    Thomson, D. B.
    Nam, O. -H
    Davis, R. F.
    Dry etching and metallization schemes in a GaN/SiC heterojunction device process2000In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 338-342, p. 1049-1052Article in journal (Refereed)
    Abstract [en]

    Dry etching and metallization schemes are described for a GaN/SiC heterojunction. GaN was reactive ion etched in a chlorine based chemistry (Cl2/Ar), and an ICP etch was used on 4H-SiC using a fluorine based chemistry (SF6/Ar/O2). The etch rates obtained on GaN was above 400 nm/min. High sample temperature from self heating and large dc-bias was the probable cause for the high etch rate. The ICP etch rate on SiC approached 320 nm/min, and the etch selectivity to GaN was >100. The metallization was based on Ti for both n-GaN and p-SiC. TLM and Kelvin structures were used to extract the specific contact resistivity, ρC. After a 950 °C anneal in N2 ρC on the GaN samples were below 1·10-6 Ωcm2 for sputtered contacts in room temperature, and an order of magnitude higher with evaporation. On p-SiC no ohmic behavior was found with a doping of 4·1018 cm-3, but the same contact metallization on highly doped areas (>1020 cm-3) showed ohmic behavior with ρC below 10-4 Ωcm2.

  • 29.
    Domeij, Martin
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Danielsson, Erik
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Lee, Hyung-Seok
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Current gain of 4H-SiC bipolar transistors including the effect of interface states2005In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 483, p. 889-892Article in journal (Refereed)
    Abstract [en]

    The current gain (β) of 4H-SiC BJTs as function of collector current (I-C) has been investigated by DC and pulsed measurements and by device simulations. A measured monotonic increase of β with I-C agrees well with simulations using a constant distribution of interface states at the 4H-SiC/SiO2 interface along the etched side-wall of the base-emitter junction. Simulations using only bulk recombination, on the other hand, are in poor agreement with the measurements. The interface states degrade the simulated current gain by combined effects of localized recombination and trapped charge that influence the surface potential. Additionally, bandgap narrowing has a significant impact by reducing the peak current gain by about 50% in simulations.

  • 30.
    Domeij, Martin
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Danielsson, Erik
    Liu, W.
    Zimmermann, U.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Measurements and simulations of self-heating and switching with 4H-SIC power BJTs2003In: IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD), Cambridge, 2003, p. 375-378Conference paper (Refereed)
    Abstract [en]

    Transient measurements and device simulations were performed to investigate self-heating and switching with 4H-SiC BJTs. A current gain decrease was found during self-heating presumably due to reduced electron mobility with increasing temperature. Surface recombination increased the simulated maximum temperature but the current gain decrease during self-heating was similar as for bulk recombination. A fast switching of 0.5 A and 200 V was shown with a voltage rise-time of about 70 ns and fall-time of 50 ns. Turn-off measurements show a noticeable delay time before fall-off of the emitter current, indicating a significant amount of stored carriers in the base.

  • 31.
    Domeij, Martin
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Lee, Hyung-Seok
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Danielsson, Erik
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Schöner, Adolf
    Acreo AB, Stockholm .
    Geometrical effects in high current gain 1100-V 4H-SiC BJTs2005In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 26, no 10, p. 743-745Article in journal (Refereed)
    Abstract [en]

    This paper reports the fabrication of epitaxial 4H-SiC bipolar junction transistors (BJTs) with a maximum current gain beta = 64 and a breakdown voltage of 1100 V. The high beta value is attributed to high material quality obtained after a continuous epitaxial growth of the base-emitter junction. The BJTs show a clear emitter-size effect indicating that surface recombination has a significant influence on beta. A minimum distance of 2-3 mu m between the emitter edge and base contact implant was found adequate to avoid a substantial beta reduction.

  • 32.
    Domeij, Martin
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Lee, Hyung-Seok
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Analysis of the base current and saturation voltage in 4H-SiC power BJTs2007In: 2007 European Conference On Power Electronics And Applications: Vols 1-10, 2007, p. 2744-2750Conference paper (Refereed)
    Abstract [en]

    Silicon carbide (SiC) power bipolar junction transistors are interesting competitors to Si IGBTs for 1200 V power electronics applications. Advantages of SiC BJTs are low collector-emitter saturation voltages, little stored charge and high temperature capability. In this work, SiC NPN power BJTs with common emitter current gains of 40 have been fabricated and characterized. Electrical measurements for BJTs with different emitter widths indicate that the current gain is limited by surface recombination. A low value of V-CESAT=0.9 V at J(C)=100 A/cm(2) was obtained for small and large area (3.4 mm(2)) BJTs and correlated with the formation of low-resistive ohmic contacts to the base. Large area BJTs were shown to operate with a current gain of 48 in pulsed mode at a collector current of 12 A corresponding to J(C)=360 A/cm(2).

  • 33.
    Domeij, Martin
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Lee, Hyung-Seok
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Schoner, A.
    Current gain dependence on emitter width in 4H-SiC BJTs2006In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 527-529, p. 1425-1428Article in journal (Refereed)
    Abstract [en]

    This paper reports the fabrication of epitaxial 4H-SiC bipolar junction transistors (BJTs) with a maximum current gain beta = 64 and a breakdown voltage of 1100 V. The high beta value is attributed to high material quality obtained after a continuous epitaxial growth of the base-emitter junction. The current gain of the BJTs increases with increasing emitter width indicating a significant influence of surface recombination. This "emitter-size" effect is in good agreement with device simulations including recombination in interface states at the etched termination of the base-emitter junction.

  • 34.
    Domeij, Martin
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Lee, Hyung-Seok
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Schöner, A.
    SiC power bipolar junction transistors: Modeling and improvement of the current gain2005In: 2005 European Conference on Power Electronics and Applications, Dresden, 2005, Vol. 2005, p. 1665888-Conference paper (Refereed)
    Abstract [en]

    Epitaxial silicon carbide bipolar junction transistors (BJTs) for power switching applications have been designed and fabricated with a maximum breakdown voltage of 1100 V. The BJTs have high common emitter current gains with maximum values exceeding 60, a result that is attributed to design optimization of the base and emitter layers and to a high material quality obtained by a continuous epitaxial growth. Device simulations of the current gain as function of collector current have been compared with measurements. The measurements show a clear emitter-size effect that is in good agreement with simulations including surface recombination in interface states at the etched termination of the base-emitter junction. Simulations indicate an optimum emitter doping around 1-1019 cm-3 in agreement with typical state-of-the-art BJTs.

  • 35.
    Domeij, Martin
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Lee, Hyung-Seok
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Schöner, Adolf
    High current gain silicon carbide bipolar power transistors2006In: Proceedings of the 18th International Symposium on Power Semiconductor Devices and ICs, 2006, p. 141-144Conference paper (Refereed)
    Abstract [en]

    Silicon carbide NPN bipolar junction transistors were fabricated and a current gain exceeding 60 was obtained for a BJT with a breakdown voltage BV(CEO)=1100 V. A reduction of the current gain was observed after contact annealing at 950 degrees C and this was attributed to degradation of the oxide passivation. Device simulations with varying emitter doping resulted in a maximum current gain for an emitter doping around 1(.)10(19) cm(-3). Resistive turn-off measurements were performed and a minimum collector-emitter voltage (V(CE)) rise-time of 40 ns was found. The VCE rise-time showed a clear dependence on the on-state base current thus indicating a significant stored charge.

  • 36.
    Ekström, Mattias
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics.
    Khartsev, Sergiy
    KTH, School of Information and Communication Technology (ICT), Electronics.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics.
    Integration and High-Temperature Characterization of Ferroelectric Vanadium-Doped Bismuth Titanate Thin Films on Silicon Carbide2017In: Journal of Electronic Materials, ISSN 0361-5235, E-ISSN 1543-186X, Vol. 46, no 7, p. 4478-4484Article in journal (Refereed)
    Abstract [en]

    4H-SiC electronics can operate at high temperature (HT), e.g., 300A degrees C to 500A degrees C, for extended times. Systems using sensors and amplifiers that operate at HT would benefit from microcontrollers which can also operate at HT. Microcontrollers require nonvolatile memory (NVM) for computer programs. In this work, we demonstrate the possibility of integrating ferroelectric vanadium-doped bismuth titanate (BiTV) thin films on 4H-SiC for HT memory applications, with BiTV ferroelectric capacitors providing memory functionality. Film deposition was achieved by laser ablation on Pt (111)/TiO2/4H-SiC substrates, with magnetron-sputtered Pt used as bottom electrode and thermally evaporated Au as upper contacts. Film characterization by x-ray diffraction analysis revealed predominately (117) orientation. P-E hysteresis loops measured at room temperature showed maximum 2P (r) of 48 mu C/cm(2), large enough for wide read margins. P-E loops were measurable up to 450A degrees C, with losses limiting measurements above 450A degrees C. The phase-transition temperature was determined to be about 660A degrees C from the discontinuity in dielectric permittivity, close to what is achieved for ceramics. These BiTV ferroelectric capacitors demonstrate potential for use in HT NVM applications for SiC digital electronics.

  • 37.
    Elahipanah, Hossein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Asadollahi, Ali
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Ekström, Mattias
    KTH, School of Information and Communication Technology (ICT), Electronics.
    Salemi, Arash
    KTH, School of Information and Communication Technology (ICT), Electronics.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    A wafer-scale Ni-salicide contact technology on n-type 4H-SiC2017In: ECS Journal of Solid State Science and Technology, ISSN 2162-8769, E-ISSN 2162-8777, Vol. 6, no 4, p. P197-P200Article in journal (Refereed)
    Abstract [en]

    A self-aligned Nickel (Ni) silicide process (Salicide) for n-type ohmic contacts on 4H-SiC is demonstrated and electrically verified in a wafer-scale device process. The key point is to anneal the contacts in two steps. The process is successfully employed on wafer-level and a contact resistivity below 5 × 10−6 Ω · cm2 is achieved. The influence of the proposed process on the oxide quality is investigated and no significant effect is observed. The proposed self-aligned technology eliminates the undesirable effects of the lift-off process. Moreover, it is simple, fast, and manufacturable at wafer-scale which saves time and cost.

  • 38.
    Elahipanah, Hossein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Kargarrazi, Saleh
    KTH, School of Information and Communication Technology (ICT).
    Salemi, Arash
    KTH, School of Information and Communication Technology (ICT).
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    500 degrees C High Current 4H-SiC Lateral BJTs for High-Temperature Integrated Circuits2017In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 38, no 10, p. 1429-1432Article in journal (Refereed)
    Abstract [en]

    High-current 4H-SiC lateral BJTs for hightemperature monolithic integrated circuits are fabricated. The BJTs have three different sizes and the designs are optimized in terms of emitter finger width and length and the device layout to have higher current density (J(C)), lower on-resistance (R-ON), and more uniform current distribution. A maximum current gain (beta) of >53 at significantly high current density was achieved for different sizes of SiC BJTs. The BJTs aremeasured fromroom temperature to 500 degrees C. An open-base breakdown voltage (V-CEO) of > 50 V is measured for the devices.

  • 39.
    Elahipanah, Hossein
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Salemi, Arash
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Buono, Benedetto
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Process variation tolerant 4H-SiC power devices utilizing trench structures2013In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 740-742, p. 809-812Article in journal (Refereed)
    Abstract [en]

    Silicon carbide (SiC) is one of the most attractive semiconductors for high voltage applications. The breakdown voltage of SiC-based devices highly depends on the variation of the fabrication process including doping of the epilayers and the etching steps. In this paper, we show a way to diminish this variability by employing novel trench structures. The influence of the process variations in terms of doping concentration and etching has been studied and compared with conventional devices. The breakdown voltage variation (ΔVBr) of 450 V and 2100 V is obtained for the ±20% variation of doping concentration of the devices with and without the trench structures, respectively. For ±20% variation in etching steps, the maximum ΔVBR of 380 V is obtained for the device with trench structures in comparison to 1800 V for the conventional structure without trench structures. These results show that the breakdown voltage variation is significantly reduced by utilizing the proposed structure.

  • 40.
    Elahipanah, Hossein
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Salemi, Arash
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Calr-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Intertwined Design: A Novel Lithographic Method to Realize Area Efficient High Voltage SiC BJTs and Darlington Transistors2016In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 63, no 11, p. 4366-4372Article in journal (Refereed)
    Abstract [en]

    A novel lithographic method called intertwined design is demonstrated for high-power SiC devices to improve the area usage and current drive with more uniform current distribution along the device. The higher current drive is achieved by employing the inactive area underneath the base metal contact pads; more uniform current distribution is obtained by the center-base design; whereas the hexagon and square cell geometries result in >15% higher current density at lower on-resistance compared with the conventional finger design. For the first time, we have experimentally presented the intertwined design to marry these advantages and realize a high-efficient SiC power device. Center-base high-voltage 4H–SiC BJTs and Darlington pairs with different square and hexagon cell geometries are fabricated and compared with conventional designs to prove the ability of the intertwined design. The method can widely be used for large-area high-voltage BJTs as well as for integrated devices.

  • 41.
    Elahipanah, Hossein
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Salemi, Arash
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    4.5-kV 20-mΩ. cm2 Implantation-Free 4H-SiC BJT with Trench Structures on the Junction Termination Extension2015In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 821, p. 838-841Article in journal (Refereed)
    Abstract [en]

    A single-mask junction termination extension withtrench structures is formed to realize a 4.5 kV implantation-free 4H-SiCbipolar junction transistor (BJT). The trench structures are formed on the baselayer with dry etching using a single mask. The electric field distributionalong the structure is controlled by the number and dimensions of the trenches.The electric field is distributed by the trench structures and thus the electricfield crowding at the base and mesa edges is diminished. The design isoptimized in terms of the depth, width, spacing, and number of the trenches toachieve a breakdown voltage (VB) of 4.5 kV, which is 85% of thetheoretical value. Higher efficiency is obtainable with finer lithographicresolution leading to smaller pitch, and higher number and narrower trenches.The specific on-resistance (RON) of 20 mΩ.cm2 is measuredfor the small-area BJT with active area of 0.04 mm2. The BV-RONof the fabricated device is very close to the SiC limit and by far exceeds thebest SiC MOSFETs.

  • 42.
    Elahipanah, Hossein
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Salemi, Arash
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    5.8-kV Implantation-Free 4H-SiC BJT With Multiple-Shallow-Trench Junction Termination Extension2015In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 36, no 2, p. 168-170Article in journal (Refereed)
    Abstract [en]

    Implantation-free 4H-SiC bipolar junction transistors with multiple-shallow-trench junction termination extension have been fabricated. The maximum current gain of 40 at a current density of 370 A/cm(2) is obtained for the device with an active area of 0.065 mm(2). A maximum open-base breakdown voltage (BV) of 5.85 kV is measured, which is 93% of the theoretical BV. A specific ON-resistance (R-ON) of 28 m Omega.cm(2) was obtained.

  • 43.
    Elahipanah, Hossein
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Salemi, Arash
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Modification of etched junction termination extension for the high voltage 4H-SiC power devices2016In: Silicon Carbide and Related Materials, Trans Tech Publications, 2016, p. 978-981Conference paper (Refereed)
    Abstract [en]

    High voltage 4H-SiC bipolar junction transistors (BJTs) with modified etched junction termination extension (JTE) were fabricated and optimized in terms of the length (LJTE) and remaining dose (DJTE) of JTEs. It is found that for a given total termination length (Σ LJTEi), a decremental JTE length from the innermost edge to the outermost mesa edge of the device will result in better modification of the electric field. A breakdown voltage (BV) of 4.95 kV is measured for the modified device which shows ~20% improvement of the termination efficiency for no extra cost or extra process step. Equal-size BJTs by interdigitated-emitter with different number of fingers and cell pitches were fabricated. The maximum current gain of 40 is achieved for a single finger device with the emitter width of 40 μm at IC = 0.25 A (JC = 310 A/cm2) which corresponds to RON = 33 mΩ.cm2. It is presented that the current gain decreases by having more fingers while the maximum current gain is achieved at higher current density.

  • 44.
    Eriksson, K. G. Peter
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Lee, Hyung-Seok
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    A Simple and Reliable Electrical Method for Measuring the Junction Temperature and Thermal Resistance of 4H-SiC Power Bipolar Junction Transistors2009In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 600-603, p. 1171-1174Article in journal (Refereed)
    Abstract [en]

    To determine the maximum allowed power dissipation in a power transistor, it is important to determine the relationship between junction temperature and power dissipation. This work presents a new method for measuring the junction temperature in a SiC bipolar junction transistor (BJT) that is self-heated during DC forward conduction. The method also enables extraction of the thermal resistance between junction and ambient by measurements of the junction temperature as function of DC power dissipation. The basic principle of the method is to determine the temperature dependent IN characteristics of the transistor under pulsed conditions with negligible self-heating, and compare these results with DC measurements with self-heating. Consistent results were obtained from two independent temperature measurements using the temperature dependence of the current gain, and the temperature dependence of the base-emitter IN characteristics, respectively.

  • 45. Esteve, Romain
    et al.
    Lorenzzi, J.
    Reshanov, S. A.
    Jegenyes, N.
    Schoner, A.
    Ferro, G.
    Zetterling, Carl-Mikael
    D Ferro, G; Siffert, P
    Electrical properties of MOS structures based on 3C-SiC(111) epilayers grown by Vapor-Liquid-Solid Transport and Chemical-Vapor Deposition on 6H-SiC(0001)2010In: AIP Conference Proceedings, 2010, Vol. 1292, p. 55-58Conference paper (Refereed)
    Abstract [en]

    The electrical properties of post-oxidized PECVD oxides in wet oxygen based on 3C-SiC(111) epilayers grown by Vapor-Liquid-Solid and Chemical-Vapor-Deposition mechanisms on 6H-SiC(0001) have been studied. Different 6H-SiC(0001) samples exhibiting diverse crystal orientations (on-axis, 2 degrees off-axis) and growth conditions were regarded. A comparative study of oxide qualities has been carried out via capacitance and conductance measurements (C-G-V). Achieved interface traps densities and effective oxide charges were compared for the different samples. Reliability issues have been considered via current measurements (I-V and TZDB) and statistical data treatment techniques (Weibull plots). Oxides based on 3C-SiC layer grown by a process combining VLS and CVD methods demonstrated low interface states densities D-it of 1.2 x 10(10) eV(-1)cm(-2) at 0.63 eV below the conduction band and fixed oxide charges Q(eff)/(g) estimated to -0.1 x 10(11) cm(-2)

  • 46.
    Esteve, Romain
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Reshano, S.A.
    Savage, S.
    Bakowski, M.
    Kaplan, W.
    Persson, S.
    Schöner, A.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Toward 4H-SiC MISFETs Devices Based on ONO (SiO2-Si3N4-SiO2) Structures2011In: Journal of the Electrochemical Society, ISSN 0013-4651, E-ISSN 1945-7111, Vol. 5, no 158, p. 496-501Article in journal (Refereed)
    Abstract [en]

    The electrical properties of metal-insulator-semiconductor (MIS) devices based on ONO (SiO2-Si3N4-SiO2) structures fabricatedon n-type 4H-SiC (0001) epilayers have been investigated. Three different combinations of low-pressure chemical vapordeposition (LPCVD), plasma-enhanced chemical vapor deposition (PECVD) and thermal oxidations (TO) in N2O and wet oxygenH2O:O2 were studied for the formation of the ONO stack. In addition, the influence of the thickness of SiO2and Si3N4 layers were considered and recommendations for optimal ONO structure are given. Oxide characterization tests and reliability investigations have been performed at room and high temperatures. This comparative study resulted in the development of ONO structuresdescribing low oxide/near interface/interface defects and high reliability of the devices even at high temperature.

  • 47. Esteve, Romain
    et al.
    Schoner, A.
    Reshanov, S. A.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Nagasawa, H.
    Advanced oxidation process combining oxide deposition and short postoxidation step for N-type 3C- and 4H-SiC2009In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 106, no 4Article in journal (Refereed)
    Abstract [en]

    The electrical properties of oxides fabricated on n-type 3C-SiC (001) and 4H-SiC (0001) epilayers using an advanced oxidation process combining plasma enhanced deposition and rapid postoxidation steps have been investigated. Three gas atmospheres have been studied for the postoxidation steps: N2O, dry, and wet oxygen (H2O). In comparison, additional oxides using postannealing in pure N-2 have been fabricated. The implementation of wet oxygen resulted. in a significant decrease in the interface traps density, in a reduction of oxide fixed charges and in the increased breakdown field in the case of 3C-SiC. In the case of 4H-SiC the postoxidation in N2O is a superior postprocessing step.

  • 48. Esteve, Romain
    et al.
    Schoner, A.
    Reshanov, S. A.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Nagasawa, H.
    Comparative study of thermally grown oxides on n-type free standing 3C-SiC (001)2009In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 106, no 4Article in journal (Refereed)
    Abstract [en]

    Alternative ways to improve the oxidation process of free standing 3C-SiC (001) are developed and tested with the aim to reduce the fixed and mobile charges in the oxide and at the SiO2/3C-SiC interface. The postoxidation annealing step in wet oxygen (O-2+H-2) is demonstrated to be beneficial for n-type 3C-SiC metal-oxide-semi conductor capacitors resulting in significant reduction in flat band voltage shift, effective oxide charge density, and density of interface traps. The inefficiency of nitridation for the improvement of the oxide quality on 3C-SiC is discussed.

  • 49.
    Esteve, Romain
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Schöner, A.
    Reshanov, S.A.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Comparative study of thermal oxides and post-oxidized depositedoxides on n-type free standing 3C-SiC2010In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 645-648, p. 829-832Article in journal (Refereed)
    Abstract [en]

    The electrical properties of oxides fabricated on n-type 3C-SiC (001) using wet oxidationand an advanced oxidation process combining SiO 2 deposition with rapid post oxidation steps havebeen compared. Two alternative SiO 2 deposition techniques have been studied: the plasmaenhanced chemical vapor deposition (PECVD) and the low pressure chemical vapor deposition(LPCVD). The post-oxidized PECVD oxide is been demonstrated to be beneficial in terms ofinterface traps density and reliability.

  • 50.
    Esteve, Romain
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Schöner, A.
    Reshanov, S.A.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Optimization of Poly-Silicon Process for 3C-SiC Based MOS Devices2010In: Material Research Society Symposium Proceedings, 2010, p. 115-Conference paper (Refereed)
12345 1 - 50 of 205
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