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  • 1.
    Andersson, Helene
    et al.
    KTH, Superseded Departments (pre-2005), Biotechnology.
    van der Wijngaart, Wouter
    KTH, Superseded Departments (pre-2005), Signals, Sensors and Systems.
    Griss, P.
    Niklaus, Frank
    KTH, Superseded Departments (pre-2005), Signals, Sensors and Systems.
    Stemme, Göran
    KTH, Superseded Departments (pre-2005), Signals, Sensors and Systems.
    Hydrophobic valves of plasma deposited octafluorocyclobutane in DRIE channels2001In: Sensors and actuators. B, Chemical, ISSN 0925-4005, E-ISSN 1873-3077, Vol. 75, no 1-2, p. 136-141Article in journal (Refereed)
    Abstract [en]

    The suitability of using octafluorocyclobutane (C4F8) patches as hydrophobic valves in microfluidic biochemical applications has been shown. A technique has been developed to generate lithographically defined C4F8 hydrophobic patches in deep reactive ion-etched silicon channels. Some of the advantages of this process are that no specific cleaning of the substrate is required, C4F8 is deposited on the sidewalls and the bottom of the channels, a standard photoresist mask can be used to define the patches, and that it is a fast and convenient dry chemical process performed by a standard inductively coupled plasma etcher using the Bosch process. Different patch lengths (200-1000 mum) of C4F8 were deposited in 50 mum wide channels to evaluate which size is most suitable for microfluidic biochemical applications. The valve function of the hydrophobic patches was tested for the following liquids: DD water, acetone, propanol, bead solution and a mixture used for pyrosequencing of DNA. Patch lengths of 200 mum of C4F8 successfully stopped each solution for at least 20 consecutive times. The C4F8 film resists water for at least 5 h. The hydrophobic valve also resists very high concentrations (25%) of surfactants (Tween 80). C4F8 shows a much higher resistance towards water and surface active solutions than previous hydrophobic patches. However, 50% Tween 80 was not stopped at all by the hydrophobic patch. An applied pressure of 760 Pa at the inlet was needed for water to over-run the hydrophobic patch.

  • 2.
    Antelius, Mikael
    et al.
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Fischer, Andreas C.
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Roxhed, Niclas
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Hermetic integration of liquids using high-speed stud bump bonding for cavity sealing at the wafer level2012In: Journal of Micromechanics and Microengineering, ISSN 0960-1317, E-ISSN 1361-6439, Vol. 22, no 4, p. 045021-Article in journal (Refereed)
    Abstract [en]

    This paper reports a novel room-temperature hermetic liquid sealing process where the access ports of liquid-filled cavities are sealed with wire-bonded stud bumps. This process enables liquids to be integrated at the fabrication stage. Evaluation cavities were manufactured and used to investigate the mechanical and hermetic properties of the seals. Measurements on the successfully sealed structures show a helium leak rate of better than 10 (10) mbarL s (1), in addition to a zero liquid loss over two months during storage near boiling temperature. The bond strength of the plugs was similar to standard wire bonds on flat surfaces.

  • 3.
    Antelius, Mikael
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Fischer, Andreas C.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Roxhed, Niclas
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Wafer-Level Vacuum Sealing by Coining of Wire Bonded Gold Bumps2013In: Journal of microelectromechanical systems, ISSN 1057-7157, E-ISSN 1941-0158, Vol. 22, no 6, p. 1347-1353Article in journal (Refereed)
    Abstract [en]

    This paper reports on the investigation of a novel room-temperature vacuum sealing method based on compressing wire bonded gold bumps which are placed to partially overlap the access ports into the cavity. The bump compression, which is done under vacuum, causes a material flow into the access ports, thereby hermetically sealing a vacuum inside the cavities. The sealed cavity pressure was measured by residual gas analysis to 8x10(-4) mbar two weeks after sealing. The residual gas content was found to be mainly argon, which indicates the source as outgassing inside the cavity and no measurable external leak. The seals are found to be mechanically robust and easily implemented by the use of standard commercial tools and processes.

  • 4.
    Antelius, Mikael
    et al.
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Fischer, Andreas
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Roxhed, Niclas
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Hermetic integration of liquids in MEMS by room temperature, high-speed plugging of liquid-filled cavities at wafer level2011In: Proceedings IEEE International Conference on Micro Electro Mechanical Systems (MEMS), IEEE , 2011, p. 356-359Conference paper (Other academic)
    Abstract [en]

    This paper reports a novel room temperature hermetic liquid sealing process based on wire bonded "plugs" over the access ports of liquid-filled cavities. The method enables liquids to be integrated already at the fabrication stage. Test vehicles were manufactured and used to investigate the mechanical and hermetic properties of the seals. A helium leak rate of better than 1E-10 mbarL/s was measured on the successfully sealed structures. The bond strength of the "plugs" were similar to standard wire bonds on flat surfaces.

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  • 5.
    Antelius, Mikael
    et al.
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Fischer, Andreas
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Roxhed, Niclas
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Room-temperature wafer-level vacuum sealing by compression of high-speed wire bonded gold bumps2011In: Proceedings IEEE International Conference on Solid-State Sensors, Actuators, and Microsystems (Transducers), IEEE , 2011, p. 1360-1363Conference paper (Other academic)
    Abstract [en]

    This paper reports experimental results of a novel room temperature vacuum sealing process based on compressing wire bonded gold “bumps”, causing a material flow into the access ports of vacuum-cavities. The leak rate out of manufactured cavities was measured over 5 days and evaluated to less than the detection limit, 6×10-12 mbarL/s, per sealed port. The cavities have been sealed at a vacuum level below 10 mbar. The method enables sealing of vacuum cavities at room temperature using standard commercial tools and processes.

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  • 6.
    Antelius, Mikael
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Lapisa, Martin
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Sohlström, Hans
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Holgado, Miguel
    Universidad Politécnica de Madrid.
    Casquel, Rafael
    Universidad Politécnica de Madrid.
    Sanza, Francisco J.
    Universidad Politécnica de Madrid.
    Griol, Amadeu
    Universidad Politécnica de Valencia.
    Bernier, Damien
    Multitel.
    Dortu, Fabian
    Multitel.
    Cáceres, Santiago
    ETRA I+D.
    Aparicio, Francisco J.
    Instituto de Ciencia de Materiales de Sevilla CSIC-Universidad de Sevilla.
    Alcaire, María
    Instituto de Ciencia de Materiales de Sevilla CSIC-Universidad de Sevilla.
    González-Elipe, Agustín R.
    Instituto de Ciencia de Materiales de Sevilla CSIC-Universidad de Sevilla.
    Barranco, Angel
    Instituto de Ciencia de Materiales de Sevilla CSIC-Universidad de Sevilla.
    A photonic dye-based sensing system on a chip produced at wafer scaleArticle in journal (Other academic)
  • 7.
    Antelius, Mikael
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Lapisa, Martin
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Sohlström, Hans
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Holgado, Miguel
    Casquel, Rafael
    Sanza, Francisco J.
    Griol, Amadeu
    Bernier, Damien
    Dortu, Fabian
    Cáceres, Santiago
    Aparicio, Francisco J.
    Alcaire, Maria
    Gonzáles-Elipe, Agustin R.
    Barranco, Angel
    A wafer-scale, dye-based, photonic sensing systemManuscript (preprint) (Other academic)
  • 8.
    Antelius, Mikael
    et al.
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Small footprint wafer-level vacuum packaging using compressible gold sealing rings2011In: Journal of Micromechanics and Microengineering, ISSN 0960-1317, E-ISSN 1361-6439, Vol. 21, no 8, p. 085011-Article in journal (Refereed)
    Abstract [en]

    A novel low-temperature wafer-level vacuum packaging process is presented. The process uses plastically deformed gold rings as sealing structures in combination with flux-free soldering to provide the bond force for a sealing wafer. This process enables the separation of the sealing and the bonding functions both spatially on the wafer and temporally in different process steps, which results in reduced areas for the sealing rings and prevents outgassing from the solder process in the cavity. This enables space savings and yields improvements. We show the experimental result of the hermetic sealing. The leak rate into the packages is determined, by measuring the package lid deformation over 10 months, to be lower than 3.5 x 10(-13) mbar l s(-1), which is suitable for most MEMS packages. The pressure inside the produced packages is measured to be lower than 10 mbar.

  • 9. Aparicio, Francisco J.
    et al.
    Alcaire, Maria
    Gonzalez-Elipe, Agustin R.
    Barranco, Angel
    Holgado, Miguel
    Casquel, Rafael
    Sanza, Francisco J.
    Griol, Amadeu
    Bernier, Damien
    Dortu, Fabian
    Caceres, Santiago
    Antelius, Mikael
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. APR Technol AB, Sweden.
    Lapisa, Martin
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. Bosch Automot Elect, Germany.
    Sohlstrom, Hans
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Dye-based photonic sensing systems2016In: Sensors and actuators. B, Chemical, ISSN 0925-4005, E-ISSN 1873-3077, Vol. 228, p. 649-657Article in journal (Refereed)
    Abstract [en]

    We report on dye-based photonic sensing systems which are fabricated and packaged at wafer scale. For the first time luminescent organic nanocomposite thin-films deposited by plasma technology are integrated in photonic sensing systems as active sensing elements. The realized dye-based photonic sensors include an environmental NO2 sensor and a sunlight ultraviolet light (UV) A+B sensor. The luminescent signal from the nanocomposite thin-films responds to changes in the environment and is selectively filtered by a photonic structure consisting of a Fabry-Perot cavity. The sensors are fabricated and packaged at wafer-scale, which makes the technology viable for volume manufacturing. Prototype photonic sensor systems have been tested in real-world scenarios. (C) 2016 Elsevier B.V. All rights reserved.

  • 10.
    Asiatici, Mikhail
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. Ecole Polytech Fed Lausanne, Switzerland.
    Fischer, Andreas C.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. Karlsruhe Inst Technol,Germany.
    Rodjegard, Henrik
    Haasl, Sjoerd
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Capacitive inertial sensing at high temperatures of up to 400 degrees C2016In: Sensors and Actuators A-Physical, ISSN 0924-4247, E-ISSN 1873-3069, Vol. 238, p. 361-368Article in journal (Refereed)
    Abstract [en]

    High-temperature-resistant inertial sensors are increasingly requested in a variety of fields such as aerospace, automotive and energy. Capacitive detection is especially suitable for sensing at high temperatures due to its low intrinsic temperature dependence. In this paper, we present high-temperature measurements utilizing a capacitive accelerometer, thereby proving the feasibility of capacitive detection at temperatures of up to 400 degrees C. We describe the observed characteristics as the temperature is increased and propose an explanation of the physical mechanisms causing the temperature dependence of the sensor, which mainly involve the temperature dependence of the Young's modulus and of the viscosity and the pressure of the gas inside the sensor cavity. Therefore a static electromechanical model and a dynamic model that takes into account squeeze film damping were developed.

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  • 11.
    Asiatici, Mikhail
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. The School of Computer and Communication Sciences, École Polytechnique Fédérale de Lausanne (EPFL), 1015 Lausanne, Switzerland.
    Laakso, Miku
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Fischer, Andreas
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. The Institute of Nanotechnology, Karlsruhe Institute of Technology (KIT), 76344 Karlsruhe, Germany.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    Through Silicon Vias With Invar Metal Conductor for High-Temperature Applications2017In: Journal of microelectromechanical systems, ISSN 1057-7157, E-ISSN 1941-0158, Vol. 26, no 1, p. 158-168Article in journal (Refereed)
    Abstract [en]

    Through silicon vias (TSVs) are key enablers of 3-D integration technologies which, by vertically stacking andinterconnecting multiple chips, achieve higher performances,lower power, and a smaller footprint. Copper is the mostcommonly used conductor to fill TSVs; however, copper hasa high thermal expansion mismatch in relation to the siliconsubstrate. This mismatch results in a large accumulation ofthermomechanical stress when TSVs are exposed to high temperaturesand/or temperature cycles, potentially resulting in devicefailure. In this paper, we demonstrate 300 μm long, 7:1 aspectratio TSVs with Invar as a conductive material. The entireTSV structure can withstand at least 100 thermal cycles from −50 °C to 190 °C and at least 1 h at 365 °C, limited bythe experimental setup. This is possible thanks to matchingcoefficients of thermal expansion of the Invar via conductor andof silicon substrate. This results in thermomechanical stressesthat are one order of magnitude smaller compared to copperTSV structures with identical geometries, according to finiteelement modeling. Our TSV structures are thus a promisingapproach enabling 2.5-D and 3-D integration platforms for hightemperatureand harsh-environment applications.

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  • 12. Ayala, Christopher L.
    et al.
    Grogg, Daniel
    Bazigos, Antonios
    Bleiker, Simon J.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Fernandez-Bolanos, Montserrat
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Hagleitner, Christoph
    Nanoelectromechanical digital logic circuits using curved cantilever switches with amorphous-carbon-coated contacts2015In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 113, p. 157-166Article in journal (Refereed)
    Abstract [en]

    Nanoelectromechanical (NEM) switches have the potential to complement or replace traditional CMOS transistors in the area of ultra-low-power digital electronics. This paper reports the demonstration of prototype circuits including the first 3-stage ring oscillator built using cell-level digital logic elements based on curved NEM switches. The ring oscillator core occupies an area of 30 mu m x 10 mu m using 6 NEM switches. Each NEM switch device has a footprint of 5 mu m x 3 mu m, an air gap of 60 mu m and is coated with amorphous carbon (a-C) for reliable operation. The ring oscillator operates at a frequency of 6.7 MHz, and confirms the simulated inverter propagation delay of 25 ns. The successful fabrication and measurement of this demonstrator are key milestones on the way towards an optimized, scaled technology with sub-nanosecond switching times, lower operating voltages and VLSI implementation.

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  • 13.
    Bleiker, Simon J.
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Dubois, Valentin J.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Gylfason, Kristinn
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Ottonello Briano, Floria
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Quellmalz, Arne
    KTH, School of Engineering Sciences (SCI), Applied Physics, Materials and Nanophysics. KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Device with a waveguide supported on a substrate and method for its fabrication2020Patent (Other (popular science, discussion, etc.))
    Abstract [en]

    ABSTRACT A device (1) and a method for fabricating such a device is described. The device (1) comprises a device layer (4), a substrate (2) defining a substrate plane (3). A device layer plane (5) is defined on the side of the device layer (4) facing the substrate (2). The device also comprises a waveguide (7) for guiding an electromagnetic wave. The waveguide (7) is supported on the substrate (2) via a support structure (6) extending from the substrate (2) to the device layer (4). The ratio of the largest distance (D1), perpendicular to the substrate plane (3), between a free surface of the waveguide (7) facing the substrate and any solid material to the height (h) of the waveguide (7) is more than 6, i.e. D1/h \textgreater 6. The ratio of the distance (D2), perpendicular to the substrate plane (3), between the device layer plane (5) and the substrate plane (3) to the height (h) of the waveguide (7) is more than 6, i.e. D2/h \textgreater 6.

  • 14.
    Bleiker, Simon J.
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Dubois, Valentin J.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Schröder, Stephan
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Ottonello Briano, Floria
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Gylfason, Kristinn B.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Adhesive Wafer Bonding for Heterogeneous System Integration2018In: ECS Meeting Abstracts / [ed] The Electrochemical Society, 2018Conference paper (Refereed)
  • 15.
    Bleiker, Simon J.
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Dubois, Valentin
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Schröder, Stephan
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Adhesive wafer bonding with ultra-thin intermediate polymer layers2017In: Sensors and Actuators A-Physical, ISSN 0924-4247, E-ISSN 1873-3069, Vol. 260, p. 16-23Article in journal (Refereed)
    Abstract [en]

    Wafer bonding methods with ultra-thin intermediate bonding layers are critically important in heterogeneous 3D integration technologies for many NEMS and photonic device applications. A promising wafer bonding approach for 3D integration is adhesive bonding. So far however, adhesive bonding processes relied on relatively thick intermediate adhesive layers. In this paper, we present an adhesive wafer bonding process using an ultra-thin intermediate adhesive layer with sub-200 nm thickness. We demonstrate adhesive bonding of silicon wafers with a near perfect bonding yield of >99% and achieve less than ±10% non-uniformity of the intermediate layer thickness across an entire 100 mm-diameter wafer. A bond strength of 4.8 MPa was measured for our polymer adhesive, which is considerably higher than previously reported for other ultra-thin film adhesives. Additionally, the adhesive polymer used in the proposed method features excellent chemical and mechanical stability. We also report on a potential strategy for mitigating the formation of micro-voids in the polymer adhesive at the bond interface. Furthermore, the polymer adhesive can be sacrificially removed by oxygen plasma etching for both isotropic and anisotropic release etching. The characteristics of the adhesive wafer bonding process and its compatibility with CMOS wafers, makes it very attractive for heterogeneous 3D integration processes targeted at CMOS-integrated NEMS and photonic devices.

  • 16.
    Bleiker, Simon J.
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Fischer, Andreas C.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. Karlsruhe Institute of Technology (KIT), Germany.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    High-speed Metal-filling of Through-Silicon Vias (TSVs) by Parallelized Magnetic Assembly of Micro-Wires2016In: 2016 IEEE 29th International Conference on Micro Electro Mechanical Systems (MEMS), Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 577-580Conference paper (Refereed)
    Abstract [en]

    This work reports a parallelized magnetic assembly method for scalable and cost-effective through-silicon via (TSV) fabrication. Our fabrication approach achieves high throughput by utilizing multiple magnets below the substrate to assemble TSV structures on many dies in parallel. Experimental results show simultaneous filling of four arrays of TSVs on a single substrate, with 100 via-holes each, in less than 20 seconds. We demonstrate that increasing the degree of parallelization by employing more assembly magnets below the substrate has no negative effect on the TSV filling speed or yield, thus enabling scaled-up TSV fabrication on full wafer-level. This method shows potential for industrial application with an estimated throughput of more than 70 wafers per hour in one single fabrication module. Such a TSV fabrication process could offer shorter processing times as well as higher obtainable aspect ratios compared to conventional TSV filling methods.

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  • 17.
    Bleiker, Simon J.
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Fischer, Andreas C.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Shah, Umer
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Somjit, Nutapong
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Haraldsson, Tommy
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Roxhed, Niclas
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Oberhammer, Joachim
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    High-Aspect-Ratio Through Silicon Vias for High-Frequency Application Fabricated by Magnetic Assembly of Gold-Coated Nickel Wires2015In: IEEE Transactions on Components, Packaging, and Manufacturing Technology, ISSN 2156-3950, E-ISSN 2156-3985, Vol. 5, no 1, p. 21-27Article in journal (Refereed)
    Abstract [en]

    In this paper, we demonstrate a novel manufacturing technology for high-aspect-ratio vertical interconnects for high-frequency applications. This novel approach is based on magnetic self-assembly of prefabricated nickel wires that are subsequently insulated with a thermosetting polymer. The high-frequency performance of the through silicon vias (TSVs) is enhanced by depositing a gold layer on the outer surface of the nickel wires and by reducing capacitive parasitics through a low-k polymer liner. As compared with conventional TSV designs, this novel concept offers a more compact design and a simpler, potentially more cost-effective manufacturing process. Moreover, this fabrication concept is very versatile and adaptable to many different applications, such as interposer, micro electromechanical systems, or millimeter wave applications. For evaluation purposes, coplanar waveguides with incorporated TSV interconnections were fabricated and characterized. The experimental results reveal a high bandwidth from dc to 86 GHz and an insertion loss of <0.53 dB per single TSV interconnection for frequencies up to 75 GHz.

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  • 18.
    Bleiker, Simon J.
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Visser Taklo, Maaike Margrete
    Department of Instrumentation, SINTEF ICT, Norway.
    Lietaer, Nicolas
    Department of Microsystems and Nanotechnology, SINTEF ICT, Norway.
    Vogl, Andreas
    Department of Microsystems and Nanotechnology, SINTEF ICT, Norway.
    Bakke, Thor
    Department of Microsystems and Nanotechnology, SINTEF ICT, Norway.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Cost-Efficient Wafer-Level Capping for MEMS and Imaging Sensors by Adhesive Wafer Bonding2016In: Micromachines, E-ISSN 2072-666X, Vol. 7, no 10, p. 192-Article in journal (Refereed)
    Abstract [en]

    Device encapsulation and packaging often constitutes a substantial part of the fabrication cost of micro electro-mechanical systems (MEMS) transducers and imaging sensor devices. In this paper, we propose a simple and cost-effective wafer-level capping method that utilizes a limited number of highly standardized process steps as well as low-cost materials. The proposed capping process is based on low-temperature adhesive wafer bonding, which ensures full complementary metal-oxide-semiconductor (CMOS) compatibility. All necessary fabrication steps for the wafer bonding, such as cavity formation and deposition of the adhesive, are performed on the capping substrate. The polymer adhesive is deposited by spray-coating on the capping wafer containing the cavities. Thus, no lithographic patterning of the polymer adhesive is needed, and material waste is minimized. Furthermore, this process does not require any additional fabrication steps on the device wafer, which lowers the process complexity and fabrication costs. We demonstrate the proposed capping method by packaging two different MEMS devices. The two MEMS devices include a vibration sensor and an acceleration switch, which employ two different electrical interconnection schemes. The experimental results show wafer-level capping with excellent bond quality due to the re-flow behavior of the polymer adhesive. No impediment to the functionality of the MEMS devices was observed, which indicates that the encapsulation does not introduce significant tensile nor compressive stresses. Thus, we present a highly versatile, robust, and cost-efficient capping method for components such as MEMS and imaging sensors.

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  • 19. Bogaerts, W.
    et al.
    Takabayashi, A. Y.
    Edinger, Pierre
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Zand, I.
    Jo, Gaehun
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Sattari, H.
    Verheyen, P.
    Jezzini, M. A.
    Antony, C.
    Talli, G.
    Saei, M.
    Kumar, S.
    Arce, C. L.
    Porcel, M. G.
    Quack, N.
    Gylfason, Kristinn
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Khan, U.
    Programmable photonic circuits using silicon photonic MEMS2021In: Optics InfoBase Conference Papers, The Optical Society , 2021Conference paper (Refereed)
    Abstract [en]

    We present a silicon photonics technology extended with low-power MEMS scalable to large circuits. This enables us to make photonic waveguide meshes that can be reconfigured using electronics and software.

  • 20.
    Bogaerts, Wim
    et al.
    Ghent University - IMEC, Department of Information Technology (INTEC), Technologiepark-Zwijnaarde 126, 9052 Gent, BELGIUM, Technologiepark-Zwijnaarde 126.
    Nagarjun, K. P.
    Ghent University - IMEC, Department of Information Technology (INTEC), Technologiepark-Zwijnaarde 126, 9052 Gent, BELGIUM, Technologiepark-Zwijnaarde 126.
    Van Iseghem, Lukas
    Ghent University - IMEC, Department of Information Technology (INTEC), Technologiepark-Zwijnaarde 126, 9052 Gent, BELGIUM, Technologiepark-Zwijnaarde 126.
    Chen, Xiangfeng
    Ghent University - IMEC, Department of Information Technology (INTEC), Technologiepark-Zwijnaarde 126, 9052 Gent, BELGIUM, Technologiepark-Zwijnaarde 126.
    Deng, Hong
    Ghent University - IMEC, Department of Information Technology (INTEC), Technologiepark-Zwijnaarde 126, 9052 Gent, BELGIUM, Technologiepark-Zwijnaarde 126.
    Zand, Iman
    Ghent University - IMEC, Department of Information Technology (INTEC), Technologiepark-Zwijnaarde 126, 9052 Gent, BELGIUM, Technologiepark-Zwijnaarde 126.
    Zhang, Yu
    Ghent University - IMEC, Department of Information Technology (INTEC), Technologiepark-Zwijnaarde 126, 9052 Gent, BELGIUM, Technologiepark-Zwijnaarde 126.
    Liu, Yichen
    Ghent University - IMEC, Department of Information Technology (INTEC), Technologiepark-Zwijnaarde 126, 9052 Gent, BELGIUM, Technologiepark-Zwijnaarde 126.
    Takabayashi, Alain Yuji
    'Ecole Polytechnique Fédérale de Lausanne (EPFL), Lausanne, SWITZERLAND].
    Sattari, Hamed
    'Ecole Polytechnique Fédérale de Lausanne (EPFL), Lausanne, SWITZERLAND].
    Quack, Niels
    'Ecole Polytechnique Fédérale de Lausanne (EPFL), Lausanne, SWITZERLAND].
    Edinger, Pierre
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Jo, Gaehun
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Bleiker, Simon J.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Gylfason, Kristinn
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Mallik, Arun Kumar
    Tyndall National Institute, Cork, IRELAND.
    Jezzini, Moises
    Tyndall National Institute, Cork, IRELAND.
    Antony, Cleitus
    Tyndall National Institute, Cork, IRELAND.
    Talli, Giuseppe
    Tyndall National Institute, Cork, IRELAND.
    Verheyen, Peter
    IMEC vzw, 3DSIP department, Leuven, BELGIUM.
    Beeckman, Jeroen
    Ghent University, Department of Electronics and Information Systems (ELIS), Gent, BELGIUM.
    Khan, Umar
    Ghent University - IMEC, Department of Information Technology (INTEC), Technologiepark-Zwijnaarde 126, 9052 Gent, BELGIUM, Technologiepark-Zwijnaarde 126.
    Scaling programmable silicon photonics circuits2023In: Silicon Photonics XVIII, SPIE-Intl Soc Optical Eng , 2023, article id 1242601Conference paper (Refereed)
    Abstract [en]

    We give an overview the progress of our work in silicon photonic programmable circuits, covering the techn stack from the photonic chip over the driver electronics, packaging technologies all the way to the sof layers. On the photonic side, we show our recent results in large-scale silicon photonic circuits with diff tuning technologies, including heaters, MEMS and liquid crystals, and their respective electronic driving sch We look into the scaling potential of these different technologies as the number of tunable elements in a ci increases. Finally, we elaborate on the software routines for routing and filter synthesis to enable the pho programmer.

  • 21. Bogaerts, Wim
    et al.
    Sattari, Hamed
    Edinger, Pierre
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Takabayashi, Alain
    Zand, Iman
    Wang, Xiaojing
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Ribeiro, Antonio
    Jezzini, Moises
    Errando-Herranz, Carlos
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Talli, Giuseppe
    Lerma Arce, Cristina
    Kumar, Saurav
    Garcia, Marco
    Verheyen, Peter
    Abasahl, Banafsheh
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Quack, Niels
    Gylfason, Kristinn
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    O'Brien, Peter
    Khan, Umar
    MORPHIC: Programmable Photonic Circuits enabled by Silicon Photonic MEMS2020In: Proceedings Volume 11285 SPIE OPTO - 1-6 February 2020 Silicon Photonics XV, SPIE-Intl Soc Optical Eng , 2020Conference paper (Other academic)
    Abstract [en]

    In the European project MORPHIC we develop a platform for programmable silicon photonic circuits enabled by waveguide-integrated micro-electro-mechanical systems (MEMS). MEMS can add compact, and low-power phase shifters and couplers to an established silicon photonics platform with high-speed modulators and detectors. This MEMS technology is used for a new class of programmable photonic circuits, that can be reconfigured using electronics and software, consisting of large interconnected meshes of phase shifters and couplers. MORPHIC is also developing the packaging and driver electronics interfacing schemes for such large circuits, creating a supply chain for rapid prototyping new photonic chip concepts. These will be demonstrated in different applications, such as switching, beamforming and microwave photonics.

  • 22.
    Bogaerts, Wim
    et al.
    Ghent University - IMEC, Photonics Research Group, Department of Information Technology, Belgium.
    Takabayashi, Alain Yuji
    Ećole Polytechnique Fedeŕale de Lausanne (EPFL), 1015 Lausanne, Switzerland.
    Edinger, Pierre
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Jo, Gaehun
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Mallik, Arun Kumar
    Tyndall National Institute, Lee Maltings Complex Dyke Parade, Cork, T12 R5CP, Ireland.
    Antony, Cleituis
    Tyndall National Institute, Lee Maltings Complex Dyke Parade, Cork, T12 R5CP, Ireland.
    Zand, Iman
    Ghent University - IMEC, Photonics Research Group, Department of Information Technology, Belgium.
    Jonuzi, Tigers
    VLC Photonics S.L., UPV, Ed. 9B, D2, Camino de vera sn, Valencia, 46022, Spain.
    Chen, Xiangfeng
    Ghent University - IMEC, Photonics Research Group, Department of Information Technology, Belgium.
    Sattari, Hamed
    Ećole Polytechnique Fedeŕale de Lausanne (EPFL), 1015 Lausanne, Switzerland.
    Lee, Junsu
    Tyndall National Institute, Lee Maltings Complex Dyke Parade, Cork, T12 R5CP, Ireland.
    Jezzini, Moises A.
    Tyndall National Institute, Lee Maltings Complex Dyke Parade, Cork, T12 R5CP, Ireland.
    Talli, Giuseppe
    Tyndall National Institute, Lee Maltings Complex Dyke Parade, Cork, T12 R5CP, Ireland.
    Arce, Cristina Lerma
    Commscope Connectivity Belgium, Diestsesteenweg 692, Kessel LO, 3010, Belgium.
    Kumar, Saurav
    Commscope Connectivity Belgium, Diestsesteenweg 692, Kessel LO, 3010, Belgium.
    Verheyen, Peter
    Imec vzw, 3DSIP Department, Si Photonics Group, Kapeldreef 75, Leuven, 3001, Belgium.
    Quack, Niels
    Ećole Polytechnique Fedeŕale de Lausanne (EPFL), 1015 Lausanne, Switzerland.
    Gylfason, Kristinn
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Khan, Umar
    Ghent University - IMEC, Photonics Research Group, Department of Information Technology, Belgium.
    Programmable Photonic Circuits powered by Silicon Photonic MEMS Technology2022In: Photonic Networks and Devices, Networks 2022, Optica Publishing Group (formerly OSA) , 2022, article id NeM2C.3Conference paper (Refereed)
    Abstract [en]

    Programmable photonic chips allow flexible reconfiguration of on-chip optical connections, controlled through electronics and software. We will present the recent progress of such complex photonic circuits powered by silicon photonic MEMS actuators.

  • 23.
    Bogaerts, Wim
    et al.
    Univ Ghent, Dept Informat Technol, Photon Res Grp, IMEC, Technologiepk Zwijnaarde, Ghent, Belgium.;Univ Ghent, Ctr Nano & Biophoton, Ghent, Belgium..
    Takabayashi, Alain Yuji
    Ecole Polytech Fed Lausanne EPFL, CH-1015 Lausanne, Switzerland..
    Edinger, Pierre
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Jo, Gaehun
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Zand, Iman
    Univ Ghent, Dept Informat Technol, Photon Res Grp, IMEC, Technologiepk Zwijnaarde, Ghent, Belgium.;Univ Ghent, Ctr Nano & Biophoton, Ghent, Belgium..
    Verheyen, Peter
    Imec Vzw, 3DSIP Dept, Si Photon Grp, Kapeldreef 75, B-3001 Leuven, Belgium..
    Jezzini, Moises
    Tyndall Natl Inst, Lee Maltings Complex Dyke Parade, Cork T12 R5CP, Ireland..
    Sattari, Hamed
    Ecole Polytech Fed Lausanne EPFL, CH-1015 Lausanne, Switzerland..
    Talli, Giuseppe
    Tyndall Natl Inst, Lee Maltings Complex Dyke Parade, Cork T12 R5CP, Ireland..
    Antony, Cleitus
    Tyndall Natl Inst, Lee Maltings Complex Dyke Parade, Cork T12 R5CP, Ireland..
    Saei, Mehrdad
    Tyndall Natl Inst, Lee Maltings Complex Dyke Parade, Cork T12 R5CP, Ireland..
    Arce, Cristina Lerma
    Commscope Connect Belgium, Diestsesteenweg 692, B-3010 Kessel, LO, Belgium..
    Lee, Jun Su
    Tyndall Natl Inst, Lee Maltings Complex Dyke Parade, Cork T12 R5CP, Ireland..
    Mallik, Arun Kumar
    Tyndall Natl Inst, Lee Maltings Complex Dyke Parade, Cork T12 R5CP, Ireland..
    Kumar, Saurav
    Commscope Connect Belgium, Diestsesteenweg 692, B-3010 Kessel, LO, Belgium..
    Garcia, Marco
    VLC Photon SL, UPV, Ed 9B,D2,Camino Vera Sn, Valencia 46022, Spain..
    Jonuzi, Tigers
    VLC Photon SL, UPV, Ed 9B,D2,Camino Vera Sn, Valencia 46022, Spain..
    Gylfason, Kristinn
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Quack, Niels
    Ecole Polytech Fed Lausanne EPFL, CH-1015 Lausanne, Switzerland..
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Khan, Umar
    Univ Ghent, Dept Informat Technol, Photon Res Grp, IMEC, Technologiepk Zwijnaarde, Ghent, Belgium.;Univ Ghent, Ctr Nano & Biophoton, Ghent, Belgium..
    Programmable silicon photonic circuits powered by MEMS2022In: Proceedings of SPIE - The International Society for Optical Engineering / [ed] Sailing He, Laurent Vivien, SPIE-Intl Soc Optical Eng , 2022, Vol. 12005, article id 1200509Conference paper (Refereed)
    Abstract [en]

    We present our work to extend silicon photonics with MEMS actuators to enable low-power, large scale programmable photonic circuits. For this, we start from the existing iSiPP50G silicon photonics platform of IMEC, where we add free-standing movable waveguides using a few post-processing steps. This allows us to implement phase shifters and tunable couplers using electrostatically actuated MEMS, while at the same time maintaining all the original functionality of the silicon photonics platform. The MEMS devices are protected using a wafer-level sealing approach and interfaced with custom multi-channel driver and readout electronics.

  • 24. Braun, Stefan
    et al.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Fischer, Andreas C.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Henrik, Gradin
    Method for the wafer-level integration of shape memory alloy wires2013Patent (Other (popular science, discussion, etc.))
    Abstract [en]

    The present invention relates to a method to attach a shape memory alloy wire to a substrate, where the wire is mechanically attached into a 3D structure on the substrate. The present invention also relates to a device comprising a shape memory alloy wire attached to a substrate, where the wire is mechanically attached into a 3D structure on the substrate.

  • 25.
    Buchmann, Sebastian
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Enrico, Alessandro
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Holzreuter, Muriel Alexandra
    Reid, Michael S.
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Fibre- and Polymer Technology, Fibre Technology.
    Zeglio, Erica
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Herland, Anna
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Defined neuronal-astrocytic interactions enabled with a 3D printed platformManuscript (preprint) (Other academic)
  • 26.
    Buchmann, Sebastian
    et al.
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Protein Science, Nano Biotechnology.
    Enrico, Alessandro
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Holzreuter, Muriel Alexandra
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Reid, Michael S.
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Fibre- and Polymer Technology, Fibre Technology.
    Zeglio, Erica
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Protein Science, Nano Biotechnology.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Herland, Anna
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Protein Science, Nano Biotechnology.
    Probabilistic cell seeding and non-autofluorescent 3D-printed structures as scalable approach for multi-level co-culture modeling2023In: Materials Today Bio, ISSN 2590-0064, Vol. 21, p. 100706-100706, article id 100706Article in journal (Refereed)
    Abstract [en]

    To model complex biological tissue in vitro, a specific layout for the position and numbers of each cell type isnecessary. Establishing such a layout requires manual cell placement in three dimensions (3D) with micrometricprecision, which is complicated and time-consuming. Moreover, 3D printed materials used in compartmentalizedmicrofluidic models are opaque or autofluorescent, hindering parallel optical readout and forcing serial charac-terization methods, such as patch-clamp probing. To address these limitations, we introduce a multi-level co-culture model realized using a parallel cell seeding strategy of human neurons and astrocytes on 3D structuresprinted with a commercially available non-autofluorescent resin at micrometer resolution. Using a two-stepstrategy based on probabilistic cell seeding, we demonstrate a human neuronal monoculture that forms net-works on the 3D printed structure and can establish cell-projection contacts with an astrocytic-neuronal co-cultureseeded on the glass substrate. The transparent and non-autofluorescent printed platform allows fluorescence-based immunocytochemistry and calcium imaging. This approach provides facile multi-level compartmentaliza-tion of different cell types and routes for pre-designed cell projection contacts, instrumental in studying complextissue, such as the human brain.

  • 27.
    Chen, Chao
    et al.
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Fibre- and Polymer Technology.
    Enrico, Alessandro
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Pettersson, Torbjörn
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Fibre- and Polymer Technology. KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Centres, Wallenberg Wood Science Center.
    Ek, Monica
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Fibre- and Polymer Technology.
    Herland, Anna
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems. Swedish Medical Nanoscience Center, Department of Neuroscience, Karolinska Institute, Stockholm, 17177, Sweden.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Wågberg, Lars
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Fibre- and Polymer Technology. KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Centres, Wallenberg Wood Science Center.
    Bactericidal surfaces prepared by femtosecond laser patterning andlayer-by-layer polyelectrolyte coating2020In: Journal of Colloid and Interface Science, ISSN 0021-9797, E-ISSN 1095-7103, Vol. 575, p. 286-297Article in journal (Refereed)
    Abstract [en]

    Antimicrobial surfaces are important in medical, clinical, and industrial applications, where bacterial infection and biofouling may constitute a serious threat to human health. Conventional approaches against bacteria involve coating the surface with antibiotics, cytotoxic polymers, or metal particles. However, these types of functionalization have a limited lifetime and pose concerns in terms of leaching and degradation of the coating. Thus, there is a great interest in developing long-lasting and non-leaching bactericidal surfaces. To obtain a bactericidal surface, we combine micro and nanoscale patterning of borosilicate glass surfaces by ultrashort pulsed laser irradiation and a non-leaching layer-by-layer polyelectrolyte modification of the surface. The combination of surface structure and surface charge results in an enhanced bactericidal effect against both Gram-positive Staphylococcus aureus and Gram-negative Escherichia coli bacteria. The laser patterning and the layer-by-layer modification are environmentally friendly processes that are applicable to a wide variety of materials, which makes this method uniquely suited for fundamental studies of bacteria-surface interactions and paves the way for its applications in a variety of fields, such as in hygiene products and medical devices.

  • 28.
    Chen, Shiqian
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Electrical Engineering, Electronics and Embedded systems.
    Li, Zheng
    KTH, School of Electrical Engineering and Computer Science (EECS), Electrical Engineering, Electronics and Embedded systems.
    Huang, Po-Han
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Ruiz, Virginia
    CIDETEC, Basque Research and Technology Alliance (BRTA).
    Su, Yingchun
    Fu, Yujie
    KTH, School of Electrical Engineering and Computer Science (EECS), Electrical Engineering, Electronics and Embedded systems.
    Alesanco, Yolanda
    CIDETEC, Basque Research and Technology Alliance (BRTA).
    Malm, B. Gunnar
    KTH, School of Electrical Engineering and Computer Science (EECS), Electrical Engineering, Electronics and Embedded systems.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Li, Jiantong
    KTH, School of Electrical Engineering and Computer Science (EECS), Electrical Engineering, Electronics and Embedded systems.
    Ultrahigh-rate metal-free on-paper micro-supercapacitor arrays enabling direct storage of instantaneous high-voltage electricity from mechanical energy harvestersManuscript (preprint) (Other academic)
  • 29.
    Decharat, Adit
    et al.
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Boers, Marc
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Novel room-temperature wafer-to-wafer attachment and sealing of cavities using cold metal welding2007In: PROCEEDINGS OF THE IEEE TWENTIETH ANNUAL INTERNATIONAL CONFERENCE ON MICRO ELECTRO MECHANICAL SYSTEMS, 2007, p. 754-757Conference paper (Refereed)
    Abstract [en]

    In this paper we present for the first time a wafer-to-wafer attachment and sealing method for wafer level manufacturing of micro-cavities using a room temperature bonding process. The proposed attachment and sealing method is based on plastic deformation and cold welding of overlapping metal rings to create metal-to-metal bonding and sealing. We present the results from experiments using various bonding process parameters and metal sealing ring designs and their impact on the resulting bonds. Experiments are performed to evaluate the sealing properties against liquids and vapors of the different sealing ring structures.

  • 30.
    Decharat, Adit
    et al.
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Lapisa, Martin
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Forsberg, Fredrik
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    NOVEL ROOM-TEMPERATURE WAFER-TO-WAFER ATTACHMENT AND SEALING OF CAVITIES USING COLD METAL WELDING2008In: Proceedings Micro System Workshop MSW08, 2008Conference paper (Other academic)
  • 31.
    Decharat, Adit
    et al.
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Yu, Junchun
    Boers, Marc
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Room-Temperature Sealing of Microcavities by Cold Metal Welding2009In: Journal of microelectromechanical systems, ISSN 1057-7157, E-ISSN 1941-0158, Vol. 18, no 6, p. 1318-1325Article in journal (Refereed)
    Abstract [en]

    In this paper, we present a wafer-to-wafer attachment and sealing method for wafer-level manufacturing of micro-cavities using a room-temperature bonding process. The proposed attachment and sealing method is based on plastic deformation and cold welding of overlapping metal rings to create metal-to-metal bonding and sealing. We present the results from experiments using various bonding process parameters and metal sealing ring designs including their impact on the resulting bond quality. The sealing properties against liquids and vapor of different sealing ring structures have been evaluated for glass wafers that are bonded to silicon wafers. In addition, wafer-level vacuum sealing of microcavities was demonstrated when bonding a silicon wafer to another silicon wafer with the proposed room-temperature sealing and bonding technique.

  • 32.
    Dubois, Valentin J.
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Bleiker, Simon J.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Scalable Manufacturing of Nanogaps2018In: Advanced Materials, ISSN 0935-9648, E-ISSN 1521-4095, Vol. 30, no 46, article id 1801124Article, review/survey (Refereed)
    Abstract [en]

    The ability to manufacture a nanogap in between two electrodes has proven a powerful catalyst for scientific discoveries in nanoscience and molecular electronics. A wide range of bottom-up and top-down methodologies are now available to fabricate nanogaps that are less than 10 nm wide. However, most available techniques involve time-consuming serial processes that are not compatible with large-scale manufacturing of nanogap devices. The scalable manufacturing of sub-10 nm gaps remains a great technological challenge that currently hinders both experimental nanoscience and the prospects for commercial exploitation of nanogap devices. Here, available nanogap fabrication methodologies are reviewed and a detailed comparison of their merits is provided, with special focus on large-scale and reproducible manufacturing of nanogaps. The most promising approaches that could achieve a breakthrough in research and commercial applications are identified. Emerging scalable nanogap manufacturing methodologies will ultimately enable applications with high scientific and societal impact, including high-speed whole genome sequencing, electromechanical computing, and molecular electronics using nanogap electrodes.

  • 33.
    Dubois, Valentin J.
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Design and fabrication of crack-junctions2017In: MICROSYSTEMS & NANOENGINEERING, ISSN 2055-7434, Vol. 3, article id UNSP 17042Article in journal (Refereed)
    Abstract [en]

    Nanogap electrodes consist of pairs of electrically conducting tips that exhibit nanoscale gaps. They are building blocks for a variety of applications in quantum electronics, nanophotonics, plasmonics, nanopore sequencing, molecular electronics, and molecular sensing. Crack-junctions (CJs) constitute a new class of nanogap electrodes that are formed by controlled fracture of suspended bridge structures fabricated in an electrically conducting thin film under residual tensile stress. Key advantages of the CJ methodology over alternative technologies are that CJs can be fabricated with wafer-scale processes, and that the width of each individual nanogap can be precisely controlled in a range from <2 to >100 nm. While the realization of CJs has been demonstrated in initial experiments, the impact of the different design parameters on the resulting CJs has not yet been studied. Here we investigate the influence of design parameters such as the dimensions and shape of the notches, the length of the electrode-bridge and the design of the anchors, on the formation and propagation of cracks and on the resulting features of the CJs. We verify that the design criteria yields accurate prediction of crack formation in electrode-bridges featuring a beam width of 280 nm and beam lengths ranging from 1 to 1.8 mu m. We further present design as well as experimental guidelines for the fabrication of CJs and propose an approach to initiate crack formation after release etching of the suspended electrode-bridge, thereby enabling the realization of CJs with pristine electrode surfaces.

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    fulltext
  • 34.
    Dubois, Valentin J.
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Raja, Shyamprasad Natarajan
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Gehring, Pascal
    Delft Univ Technol, Kavli Inst Nanosci, Lorentzweg 1, NL-2628 CJ Delft, Netherlands..
    Caneva, Sabina
    Delft Univ Technol, Kavli Inst Nanosci, Lorentzweg 1, NL-2628 CJ Delft, Netherlands..
    van der Zant, Herre S. J.
    Delft Univ Technol, Kavli Inst Nanosci, Lorentzweg 1, NL-2628 CJ Delft, Netherlands..
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Massively parallel fabrication of crack-defined gold break junctions featuring sub-3 nm gaps for molecular devices2018In: Nature Communications, E-ISSN 2041-1723, Vol. 9, article id 3433Article in journal (Refereed)
    Abstract [en]

    Break junctions provide tip-shaped contact electrodes that are fundamental components of nano and molecular electronics. However, the fabrication of break junctions remains notoriously time-consuming and difficult to parallelize. Here we demonstrate true parallel fabrication of gold break junctions featuring sub-3 nm gaps on the wafer-scale, by relying on a novel self-breaking mechanism based on controlled crack formation in notched bridge structures. We achieve fabrication densities as high as 7 million junctions per cm(2), with fabrication yields of around 7% for obtaining crack-defined break junctions with sub-3 nm gaps of fixed gap width that exhibit electron tunneling. We also form molecular junctions using dithiol-terminated oligo(phenylene ethynylene) (OPE3) to demonstrate the feasibility of our approach for electrical probing of molecules down to liquid helium temperatures. Our technology opens a whole new range of experimental opportunities for nano and molecular electronics applications, by enabling very large-scale fabrication of solid-state break junctions.

  • 35.
    Dubois, Valentin
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Crack-defined electronic nanogaps2016In: Advanced Materials, ISSN 0935-9648, E-ISSN 1521-4095, Vol. 28, no 11, p. 2178-2182Article in journal (Refereed)
    Abstract [en]

    Achieving near-atomic-scale electronic nanogaps in a reliable and scalable manner will facilitate fundamental advances in molecular detection, plasmonics, and nanoelectronics. Here, a method is shown for realizing crack-defined nanogaps separating TiN electrodes, allowing parallel and scalable fabrication of arrays of sub-10 nm electronic nanogaps featuring individually defined gap widths.

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    Preprint CJ - Crack-defined electronic nanogaps 2016
  • 36.
    Dubois, Valentin
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Design optimization and characterization of nanogap crack-junctions2017Conference paper (Refereed)
    Abstract [en]

    A crack-junction (CJ) is a nanogap electrode pair featuring reliable and controlled nanoscale gap widths that can be produced in large numbers with high dimensional accuracy on a substrate. In this paper, we present a discussion on geometrical considerations of CJs made of titanium nitride (TiN) electrodes, which provides guidelines for reliable formation of TiN CJs with well-defined dimensions. We further provide complete electrical characterization of 40 TiN CJs designed as electron tunneling junctions.

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    fulltext
  • 37.
    Dubois, Valentin
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Massively parallel fabrication of crack-defined gold break junctions featuring sub-3 nm electrode nanogapsIn: Article in journal (Refereed)
  • 38.
    Edinger, Pierre
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Jo, Gaehun
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Nguyen, Chris Phong Van
    Takabayashi, Alain Yuji
    Errando-Herranz, Carlos
    Antony, Cleitus
    Talli, Giuseppe
    Verheyen, Peter
    Khan, Umar
    Bleiker, Simon J.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Bogaerts, Wim
    Quack, Niels
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Gylfason, Kristinn
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    A vacuum-sealed silicon photonic MEMS tunable ring resonator with independent control over coupling and phaseManuscript (preprint) (Other academic)
    Abstract [en]

    Ring resonators are a vital element for designing filters, optical delay lines, or sensors in silicon photonics. However, reconfigurable ring resonators with low-power consumption and good optical performance are not available in foundries today. We demonstrate an add-drop ring resonator with the independent tuning of coupling and round-trip phase using low-power microelectromechanical (MEMS) actuation. The MEMS rings are individually vacuum-sealed on wafer scale, enabling reliable long-term operation with low damping. On resonance, we demonstrate a modulation increase of up to 15 dB, with a voltage bias of 4V and a peak drive amplitude as low as 20mV.

  • 39.
    Edinger, Pierre
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Jo, Gaehun
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Van Nguyen, Chris Phong
    KTH.
    Takabayashi, Alain Yuji
    Ecole Polytech Fed Lausanne, CM 1 364 Ctr Midi,Stn 10, CH-1015 Lausanne, Switzerland..
    Errando-Herranz, Carlos
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Antony, Cleitus
    Tyndall Natl Inst Technol, Lee Maltings Complex Dyke Parade, Cork T12 R5CP, Ireland..
    Talli, Giuseppe
    Tyndall Natl Inst Technol, Lee Maltings Complex Dyke Parade, Cork T12 R5CP, Ireland..
    Verheyen, Peter
    Interuniv Microelect Ctr, IMEC, 1 Postbus,Kapeldreef 75, B-3001 Leuven, Belgium..
    Khan, Umar
    Interuniv Microelect Ctr, IMEC, 1 Postbus,Kapeldreef 75, B-3001 Leuven, Belgium.;Univ Ghent, Dept Informat Technol, IMEC, Technologiepark Zwijnaarde 126, B-9052 Ghent, Belgium..
    Bleiker, Simon J.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Bogaerts, Wim
    Interuniv Microelect Ctr, IMEC, 1 Postbus,Kapeldreef 75, B-3001 Leuven, Belgium.;Univ Ghent, Dept Informat Technol, IMEC, Technologiepark Zwijnaarde 126, B-9052 Ghent, Belgium..
    Quack, Niels
    Ecole Polytech Fed Lausanne, CM 1 364 Ctr Midi,Stn 10, CH-1015 Lausanne, Switzerland.;Univ Sydney, J07-90 Carillon Ave, Newtown, NSW 2042, Australia..
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Gylfason, Kristinn
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Vacuum-sealed silicon photonic MEMS tunable ring resonator with an independent control over coupling and phase2023In: Optics Express, E-ISSN 1094-4087, Vol. 31, no 4, p. 6540-6551Article in journal (Refereed)
    Abstract [en]

    Ring resonators are a vital element for filters, optical delay lines, or sensors in silicon photonics. However, reconfigurable ring resonators with low-power consumption are not available in foundries today. We demonstrate an add-drop ring resonator with the independent tuning of round-trip phase and coupling using low-power microelectromechanical (MEMS) actuation. At a wavelength of 1540 nm and for a maximum voltage of 40 V, the phase shifters provide a resonance wavelength tuning of 0.15 nm, while the tunable couplers can tune the optical resonance extinction ratio at the through port from 0 to 30 dB. The optical resonance displays a passive quality factor of 29 000, which can be increased to almost 50 000 with actuation. The MEMS rings are individually vacuum-sealed on wafer scale, enabling reliable and long-term protection from the environment. We cycled the mechanical actuators for more than 4 x 109 cycles at 100 kHz, and did not observe degradation in their response curves. On mechanical resonance, we demonstrate a modulation increase of up to 15 dB, with a voltage bias of 4 V and a peak drive amplitude as low as 20 mV.

  • 40.
    Enrico, Alessandro
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems. Synthetic Physiology lab, Department of Civil Engineering and Architecture, University of Pavia, Via Ferrata 3, Pavia, 27100 Italy.
    Buchmann, Sebastian
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Protein Science, Nano Biotechnology. KTH, Centres, Science for Life Laboratory, SciLifeLab. KTH, Centres, Center for the Advancement of Integrated Medical and Engineering Sciences, AIMES.
    De Ferrari, Fabio
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Lin, Yunfan
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Protein Science, Nano Biotechnology. KTH, Centres, Science for Life Laboratory, SciLifeLab.
    Wang, Yazhou
    Guangzhou Key Laboratory of Flexible Electronic Materials and Wearable Devices School of Materials Science and Engineering Sun Yat‐sen University Guangzhou 510275 P. R. China.
    Yue, Wan
    Key Laboratory for Polymeric Composite and Functional Materials of Ministry of Education School of Materials Science and Engineering Sun Yat‐sen University Guangzhou 510275 P. R. China.
    Mårtensson, Gustaf
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Protein Science, Nano Biotechnology. KTH, Centres, Science for Life Laboratory, SciLifeLab. Mycronic AB Nytorpsvägen 9 Täby 183 53 Sweden.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Hamedi, Mahiar
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Fibre- and Polymer Technology, Fibre Technology.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Herland, Anna
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Protein Science, Nano Biotechnology. KTH, Centres, Science for Life Laboratory, SciLifeLab. KTH, Centres, Center for the Advancement of Integrated Medical and Engineering Sciences, AIMES.
    Zeglio, Erica
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Protein Science, Nano Biotechnology. KTH, Centres, Science for Life Laboratory, SciLifeLab. KTH, Centres, Center for the Advancement of Integrated Medical and Engineering Sciences, AIMES. Wallenberg Initiative Materials Science for Sustainability, Department of Materials and Environmental Chemistry, Stockholm University, Stockholm, 114 18 Sweden.
    Cleanroom‐Free Direct Laser Micropatterning of Polymers for Organic Electrochemical Transistors in Logic Circuits and Glucose Biosensors2024In: Advanced Science, E-ISSN 2198-3844Article in journal (Refereed)
    Abstract [en]

    Organic electrochemical transistors (OECTs) are promising devices for bioelectronics, such as biosensors. However, current cleanroom-based microfabrication of OECTs hinders fast prototyping and widespread adoption of this technology for low-volume, low-cost applications. To address this limitation, a versatile and scalable approach for ultrafast laser microfabrication of OECTs is herein reported, where a femtosecond laser to pattern insulating polymers (such as parylene C or polyimide) is first used, exposing the underlying metal electrodes serving as transistor terminals (source, drain, or gate). After the first patterning step, conducting polymers, such as poly(3,4-ethylenedioxythiophene):poly(styrene sulfonate) (PEDOT:PSS), or semiconducting polymers, are spin-coated on the device surface. Another femtosecond laser patterning step subsequently defines the active polymer area contributing to the OECT performance by disconnecting the channel and gate from the surrounding spin-coated film. The effective OECT width can be defined with high resolution (down to 2 µm) in less than a second of exposure. Micropatterning the OECT channel area significantly improved the transistor switching performance in the case of PEDOT:PSS-based transistors, speeding up the devices by two orders of magnitude. The utility of this OECT manufacturing approach is demonstrated by fabricating complementary logic (inverters) and glucose biosensors, thereby showing its potential to accelerate OECT research.

  • 41.
    Enrico, Alessandro
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Dubois, Valentin J.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Manufacturing of Sub-20 NM Wide Single Nanowire Devices using Conventional Stepper Lithography2019In: Proceedings of the IEEE International Conference on Micro Electro Mechanical Systems (MEMS), IEEE conference proceedings, 2019, p. 244-247Conference paper (Refereed)
    Abstract [en]

    Single nanowires have a broad range of applications in chemical and bio-sensing, photonics, and material science, but realizing individual nanowire devices in a scalable manner remains extremely challenging. This work presents a scalable and flexible method to realize single gold nanowire devices. We use conventional optical stepper lithography to generate notched beam structures, and crack lithography to obtain sub-20-nm-wide nanogaps at the notches, thereby obtaining a suitable shadow mask to define a single nanowire device. Then a gold evaporation step through the shadow mask forms the individual gold nanowires with positional and dimensional accuracy and with electrical contacts to probing pads.

  • 42.
    Enrico, Alessandro
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Dubois, Valentin J.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Scalable Manufacturing of Single Nanowire Devices Using Crack-Defined Shadow Mask Lithography2019In: ACS Applied Materials and Interfaces, ISSN 1944-8244, E-ISSN 1944-8252, Vol. 11, no 8, p. 8217-8226Article in journal (Refereed)
    Abstract [en]

    Single nanowires (NWs) have a broad range of applications in nanoelectronics, nanomechanics, and nano photonics, but, to date, no technique can produce single sub 20 nm wide NWs with electrical connections in a scalable fashion. In this work, we combine conventional optical and crack lithographies to generate single NW devices with controllable and predictable dimensions and placement and with individual electrical contacts to the NWs. We demonstrate NWs made of gold, platinum, palladium, tungsten, tin, and metal oxides. We have used conventional i-line stepper lithography with a nominal resolution of 365 nm to define crack lithography structures in a shadow mask for large-scale manufacturing of sub-20 nm wide NWs, which is a 20-fold improvement over the resolution that is possible with the utilized stepper lithography. Overall, the proposed method represents an effective approach to generate single NW devices with useful applications in electrochemistry, photonics, and gas- and biosensing.

  • 43.
    Enrico, Alessandro
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Dubois, Valentin
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Scalable fabrication of single nanowire devices using crack-defined shadow mask lithographyIn: Article in journal (Refereed)
  • 44.
    Enrico, Alessandro
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Hartwig‬, ‪Oliver
    Dominik, Nikolas
    Quellmalz, Arne
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Gylfason, Kristinn
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Duesberg, Georg
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Ultrafast and resist-free nanopatterning of 2D materials by femtosecond laser irradiationManuscript (preprint) (Other academic)
  • 45.
    Enrico, Alessandro
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Hartwig, Oliver
    Institute of Physics, EIT 2, Faculty of Electrical Engineering and Information Technology, University of the Bundeswehr Munich & SENS Research Center, Werner-Heisenberg-Weg 39, 85577 Neubiberg, Germany, Werner-Heisenberg-Weg 39.
    Dominik, Nikolas
    Institute of Physics, EIT 2, Faculty of Electrical Engineering and Information Technology, University of the Bundeswehr Munich & SENS Research Center, Werner-Heisenberg-Weg 39, 85577 Neubiberg, Germany, Werner-Heisenberg-Weg 39.
    Quellmalz, Arne
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Gylfason, Kristinn
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Duesberg, Georg S.
    Institute of Physics, EIT 2, Faculty of Electrical Engineering and Information Technology, University of the Bundeswehr Munich & SENS Research Center, Werner-Heisenberg-Weg 39, 85577 Neubiberg, Germany, Werner-Heisenberg-Weg 39.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Ultrafast and Resist-Free Nanopatterning of 2D Materials by Femtosecond Laser Irradiation2023In: ACS Nano, ISSN 1936-0851, E-ISSN 1936-086X, Vol. 17, no 9, p. 8041-8052Article in journal (Refereed)
    Abstract [en]

    The performance of two-dimensional (2D) materials is promising for electronic, photonic, and sensing devices since they possess large surface-to-volume ratios, high mechanical strength, and broadband light sensitivity. While significant advances have been made in synthesizing and transferring 2D materials onto different substrates, there is still the need for scalable patterning of 2D materials with nanoscale precision. Conventional lithography methods require protective layers such as resist or metals that can contaminate or degrade the 2D materials and deteriorate the final device performance. Current resist-free patterning methods are limited in throughput and typically require custom-made equipment. To address these limitations, we demonstrate the noncontact and resist-free patterning of platinum diselenide (PtSe2), molybdenum disulfide (MoS2), and graphene layers with nanoscale precision at high processing speed while preserving the integrity of the surrounding material. We use a commercial, off-the-shelf two-photon 3D printer to directly write patterns in the 2D materials with features down to 100 nm at a maximum writing speed of 50 mm/s. We successfully remove a continuous film of 2D material from a 200 μm × 200 μm substrate area in less than 3 s. Since two-photon 3D printers are becoming increasingly available in research laboratories and industrial facilities, we expect this method to enable fast prototyping of devices based on 2D materials across various research areas.

  • 46.
    Enrico, Alessandro
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Voulgaris, Dimitrios
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Östmans, Rebecca
    KTH, School of Engineering Sciences in Chemistry, Biotechnology and Health (CBH), Fibre- and Polymer Technology.
    Sundaravadivel, Naveen
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Moutaux, Lucille
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Cordier, Aurélie
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Herland, Anna
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    3D Microvascularized Tissue Models by Laser-Based Cavitation Molding of Collagen2022In: Advanced Materials, ISSN 0935-9648, E-ISSN 1521-4095, Vol. 34, no 11Article in journal (Refereed)
  • 47.
    Ericsson, Per
    et al.
    Acreo AB.
    Fischer, Andreas C.
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Forsberg, Fredrik
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Roxhed, Niclas
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Samel, Björn
    Acreo AB.
    Savage, Susan
    Acreo AB.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Wissmar, Stanley
    Acreo AB.
    Öberg, Olof
    Acreo AB.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Microsystem Technology.
    Toward 17µm pitch heterogeneously integrated Si/SiGe quantum well bolometer focal plane arrays2011In: Infrared Technology and Applications XXXVII: Proc. of SPIE, Vol. 8012, SPIE - International Society for Optical Engineering, 2011, p. 801216-1-801216-9Conference paper (Refereed)
    Abstract [en]

    Most of today's commercial solutions for un-cooled IR imaging sensors are based on resistive bolometers using either Vanadium oxide (VOx) or amorphous Silicon (a-Si) as the thermistor material. Despite the long history for both concepts, market penetration outside high-end applications is still limited. By allowing actors in adjacent fields, such as those from the MEMS industry, to enter the market, this situation could change. This requires, however, that technologies fitting their tools and processes are developed. Heterogeneous integration of Si/SiGe quantum well bolometers on standard CMOS read out circuits is one approach that could easily be adopted by the MEMS industry. Due to its mono crystalline nature, the Si/SiGe thermistor material has excellent noise properties that result in a state-ofthe- art signal-to-noise ratio. The material is also stable at temperatures well above 450°C which offers great flexibility for both sensor integration and novel vacuum packaging concepts. We have previously reported on heterogeneous integration of Si/SiGe quantum well bolometers with pitches of 40μm x 40μm and 25μm x 25μm. The technology scales well to smaller pixel pitches and in this paper, we will report on our work on developing heterogeneous integration for Si/SiGe QW bolometers with a pixel pitch of 17μm x 17μm.

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    fulltext
  • 48.
    Errando-Herranz, Carlos
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Edinger, Pierre
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Colangelo, Marco
    KTH.
    Björk, Joel
    KTH.
    Ahmed, Samy
    KTH.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    Gylfason, Kristinn B.
    KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.
    New dynamic silicon photonic components enabled by MEMS technology2018In: Proceedings Volume 10537, Silicon Photonics XIII, SPIE - International Society for Optical Engineering, 2018, Vol. 10537, article id 1053711Conference paper (Refereed)
    Abstract [en]

    Silicon photonics is the study and application of integrated optical systems which use silicon as an optical medium, usually by confining light in optical waveguides etched into the surface of silicon-on-insulator (SOI) wafers. The term microelectromechanical systems (MEMS) refers to the technology of mechanics on the microscale actuated by electrostatic actuators. Due to the low power requirements of electrostatic actuation, MEMS components are very power efficient, making them well suited for dense integration and mobile operation. MEMS components are conventionally also implemented in silicon, and MEMS sensors such as accelerometers, gyros, and microphones are now standard in every smartphone. By combining these two successful technologies, new active photonic components with extremely low power consumption can be made. We discuss our recent experimental work on tunable filters, tunable fiber-to-chip couplers, and dynamic waveguide dispersion tuning, enabled by the marriage of silicon MEMS and silicon photonics.

    Download full text (pdf)
    fulltext
  • 49.
    Errando-Herranz, Carlos
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Gylfason, Kristinn B.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    A Low-power MEMS Tunable Photonic Ring Resonator for Reconfigurable Optical Networks2015In: Proceedings of The 28th IEEE International Conference on Micro Electro Mechanical Systems (MEMS) Estoril, Portugal. Jan 2015, IEEE conference proceedings, 2015, p. 53-56Conference paper (Refereed)
    Abstract [en]

    We experimentally demonstrate a low-power MEMS tunable photonic ring resonator with 10 selectable channels for wavelength selection in reconfigurable optical networks operating in the C band. The tuning is achieved by changing the geometry of the slot of a silicon slot-waveguide ring resonator, by means of vertical electrostatic parallel-plate actuation. Our device provides static power dissipation below 0.1 μW, a wavelength tuning range of 1 nm, and a narrow bandwidth of 0.1 nm, i.e. 10 nW static power dissipation per selectable channel for TE mode tuning.

    Download full text (pdf)
    Errando-Herranz15
  • 50.
    Errando-Herranz, Carlos
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Gylfason, Kristinn B.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    A MEMS tunable photonic ring resonator with small footprint and large free spectral range2015In: Solid-State Sensors, Actuators and Microsystems (TRANSDUCERS), 2015 Transducers - 2015 18th International Conference on, IEEE conference proceedings, 2015, p. 1001-1004Conference paper (Refereed)
    Abstract [en]

    We demonstrate a MEMS tunable silicon photonic ringresonator with a 20 μm radius and a 5 nm free spectral range (FSR) for wavelength selection in reconfigurable optical networks. The device shows a loaded Q of 12000, and 300 pm tuning at a wavelength of 1544 nm.

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