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  • 1.
    Asiatici, Mikhail
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. Ecole Polytech Fed Lausanne, Switzerland.
    Fischer, Andreas C.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. Karlsruhe Inst Technol,Germany.
    Rodjegard, Henrik
    Haasl, Sjoerd
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Capacitive inertial sensing at high temperatures of up to 400 degrees C2016In: Sensors and Actuators A-Physical, ISSN 0924-4247, E-ISSN 1873-3069, Vol. 238, p. 361-368Article in journal (Refereed)
    Abstract [en]

    High-temperature-resistant inertial sensors are increasingly requested in a variety of fields such as aerospace, automotive and energy. Capacitive detection is especially suitable for sensing at high temperatures due to its low intrinsic temperature dependence. In this paper, we present high-temperature measurements utilizing a capacitive accelerometer, thereby proving the feasibility of capacitive detection at temperatures of up to 400 degrees C. We describe the observed characteristics as the temperature is increased and propose an explanation of the physical mechanisms causing the temperature dependence of the sensor, which mainly involve the temperature dependence of the Young's modulus and of the viscosity and the pressure of the gas inside the sensor cavity. Therefore a static electromechanical model and a dynamic model that takes into account squeeze film damping were developed.

  • 2.
    Asiatici, Mikhail
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. The School of Computer and Communication Sciences, École Polytechnique Fédérale de Lausanne (EPFL), 1015 Lausanne, Switzerland.
    Laakso, Miku
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Fischer, Andreas
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. The Institute of Nanotechnology, Karlsruhe Institute of Technology (KIT), 76344 Karlsruhe, Germany.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Niklaus, Frank
    Through Silicon Vias With Invar Metal Conductor for High-Temperature Applications2017In: Journal of microelectromechanical systems, ISSN 1057-7157, E-ISSN 1941-0158, Vol. 26, no 1, p. 158-168Article in journal (Refereed)
    Abstract [en]

    Through silicon vias (TSVs) are key enablers of 3-D integration technologies which, by vertically stacking andinterconnecting multiple chips, achieve higher performances,lower power, and a smaller footprint. Copper is the mostcommonly used conductor to fill TSVs; however, copper hasa high thermal expansion mismatch in relation to the siliconsubstrate. This mismatch results in a large accumulation ofthermomechanical stress when TSVs are exposed to high temperaturesand/or temperature cycles, potentially resulting in devicefailure. In this paper, we demonstrate 300 μm long, 7:1 aspectratio TSVs with Invar as a conductive material. The entireTSV structure can withstand at least 100 thermal cycles from −50 °C to 190 °C and at least 1 h at 365 °C, limited bythe experimental setup. This is possible thanks to matchingcoefficients of thermal expansion of the Invar via conductor andof silicon substrate. This results in thermomechanical stressesthat are one order of magnitude smaller compared to copperTSV structures with identical geometries, according to finiteelement modeling. Our TSV structures are thus a promisingapproach enabling 2.5-D and 3-D integration platforms for hightemperatureand harsh-environment applications.

  • 3.
    Laakso, Miku
    et al.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Asiatici, Mikhail
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. École Polytechnique Fédérale de Lausanne (EPFL), Switzerland .
    Fischer, Andreas
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. Karlsruhe Institute of Technology (KIT), Germany.
    Stemme, Göran
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Frank, Niklaus
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Wide temperature range through silicon vias made of Invar and spin-on glass for interposers and MEMS2016In: 2016 IEEE 29th International Conference on Micro Electro Mechanical Systems (Mems), Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 585-588, article id 7421693Conference paper (Refereed)
    Abstract [en]

    Through silicon vias (TSVs) are used e.g. to create electrical connections through MEMS wafers or through silicon interposers used in 2.5D packaging. Currently available technologies do not address situations in which TSVs through unthinned wafers have to withstand large temperature variations. We propose using ferromagnetic Invar metal alloy for this purpose due to its low mismatch in heat induced strain in comparison to silicon. We demonstrate the suitability of a magnetic assembly process for Invar TSV fabrication and the use of spin-on glass as a TSV insulator. We demonstrate TSVs, with contact pads, that tolerate temperature cycling between -50 °C and 190 °C and can withstand elevated temperatures of at least up to 365 °C.

  • 4.
    Laakso, Miku
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Micro and Nanosystems.
    Bleiker, Simon J.
    KTH, School of Electrical Engineering and Computer Science (EECS), Micro and Nanosystems.
    Liljeholm, Jessica
    KTH, School of Electrical Engineering and Computer Science (EECS), Micro and Nanosystems. Silex Microsystems AB.
    Mårtensson, Gustaf
    Mycronic AB.
    Asiatici, Mikhail
    KTH, School of Electrical Engineering and Computer Science (EECS), Micro and Nanosystems. EPFL École polytechnique fédérale de Lausanne, Processor Architecture Laboratory.
    Fischer, Andreas C.
    KTH, School of Electrical Engineering and Computer Science (EECS), Micro and Nanosystems. Silex Microsystems AB.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Micro and Nanosystems.
    Ebefors, Thorbjörn
    Silex Microsystems AB.
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Micro and Nanosystems.
    Through-Glass Vias for MEMS Packaging2018Conference paper (Other academic)
    Abstract [en]

    Novelty / Progress Claims We have developed a new method for fabrication of through-glass vias (TGVs). The method allows rapid filling of via holes with metal rods both in thin and thick glass substrates.

    Background Vertical electrical feedthroughs in glass substrates, i.e. TGVs, are often required in wafer-scale packaging of MEMS that utilizes glass lids. The current methods of making TGVs have drawbacks that prevent the full utilization of the excellent properties of glass as a package material, e.g. low RF losses. Magnetic assembly has been used earlier to fabricate through-silicon vias (TSVs), and in this work we extend this method to realize TGVs [1].

    Methods The entire TGV fabrication process is maskless, and the processes used include: direct patterning of wafer metallization using femtosecond laser ablation, magnetic-fieldassisted self-assembly of metal wires into via holes, and solder-paste jetting of bump bonds on TGVs.

    Results We demonstrate that: (1) the magnetically assembled TGVs have a low resistance, which makes them suitable even for low-loss and high-current applications; (2) the magneticassembly process can be parallelized in order to increase the wafer-scale fabrication speed; (3) the magnetic assembly produces void-free metal filling for TGVs, which allows solder placement directly on top of the TGV for the purpose of high integration density; and (4) good thermal-expansion compatibility between TGV metals and glass substrates is possible with the right choice of materials, and several suitable metals-glass pairs are identified for possible improvement of package reliability [2].

    [1] M. Laakso et al., IEEE 30th Int. Conf. on MEMS, 2017. DOI:10.1109/MEMSYS.2017.7863517

    [2] M. Laakso et al., “Through-Glass Vias for Glass Interposers and MEMS Packaging Utilizing Magnetic Assembly of Microscale Metal Wires,” manuscript in preparatio

  • 5.
    Laakso, Miku J.
    et al.
    KTH, School of Electrical Engineering and Computer Science (EECS), Micro and Nanosystems.
    Bleiker, Simon J.
    KTH, School of Electrical Engineering and Computer Science (EECS), Micro and Nanosystems.
    Liljeholm, Jessica
    KTH, School of Electrical Engineering and Computer Science (EECS), Micro and Nanosystems.
    Mårtensson, Gustaf E.
    Mycronic AB, S-18353 Taby, Sweden..
    Asiatici, Mikhail
    KTH, School of Electrical Engineering and Computer Science (EECS), Micro and Nanosystems. Ecole Polytech Fed Lausanne, Sch Comp & Commun Sci, CH-1015 Lausanne, Switzerland..
    Fischer, Andreas C.
    KTH, School of Electrical Engineering and Computer Science (EECS), Micro and Nanosystems.
    Stemme, Göran
    KTH, School of Electrical Engineering and Computer Science (EECS), Micro and Nanosystems.
    Ebefors, Thorbjorn
    Silex Microsyst AB, S-17543 Jarfalla, Sweden.;MyVox AB, S-12938 Hagersten, Sweden..
    Niklaus, Frank
    KTH, School of Electrical Engineering and Computer Science (EECS), Micro and Nanosystems.
    Through-Glass Vias for Glass Interposers and MEMS Packaging Applications Fabricated Using Magnetic Assembly of Microscale Metal Wires2018In: IEEE Access, E-ISSN 2169-3536, Vol. 6, p. 44306-44317Article in journal (Refereed)
    Abstract [en]

    A through-glass via (TGV) provides a vertical electrical connection through a glass substrate. TGVs are used in advanced packaging solutions, such as glass interposers and wafer-level packaging of microelectromechanical systems (MEMS). However, TGVs are challenging to realize because via holes in glass typically do not have a sufficiently high-quality sidewall profile for super-conformal electroplating of metal into the via holes. To overcome this problem, we demonstrate here that the via holes can instead be filled by magnetically assembling metal wires into them. This method was used to produce TGVs with a typical resistance of 64 m Omega, which is comparable with other metal TGV types reported in the literature. In contrast to many TGV designs with a hollow center, the proposed TGVs can be more area efficient by allowing solder bump placement directly on top of the TGVs, which was demonstrated here using solder-paste jetting. The magnetic assembly process can be parallelized using an assembly robot, which was found to provide an opportunity for increased wafer-scale assembly speed. The aforementioned qualities of the magnetically assembled TGVs allow the realization of glass interposers and MEMS packages in different thicknesses without the drawbacks associated with the current TGV fabrication methods.

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