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  • 1. Aberg, J
    et al.
    Persson, S
    Hellberg, Per-Erik
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Smith, U
    Ericson, F
    Engstrom, M
    Kaplan, W
    Electrical properties of the TiSi2-Si transition region in contacts: The influence of an interposed layer of Nb2001In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 90, no 5, p. 2380-2388Article in journal (Refereed)
    Abstract [en]

    The influence of an interposed ultrathin Nb layer between Ti and Si on the silicide formation and the electrical contact between the silicide formed and the Si substrate is investigated. The presence of the Nb interlayer results in the formation of ternary alloy (Nb,Ti)Si-2 in the C40 crystallographic structure adjacent to the Si substrate. Depending on the nature of the Si substrates and/or the amount of the initial Nb, the interfacial C40 (Nb,Ti)Si-2 leads, in turn, to either epitaxial growth of a highly faulted metastable C40 TiSi2 or formation of the desired C54 TiSi2 at a lower temperature than needed for it to form in reference samples with Ti deposited directly on Si. On p-type substrates doped to various concentrations, the Nb also leads to a considerably lower specific contact resistivity than that obtained in the reference samples: a twofold to fourfold reduction in the contact resistivity is found using cross-bridge Kelvin structures in combination with two-dimensional numerical simulation. As C40 (Nb,Ti)Si-2 forms at the interface when an interfacial Nb is present, the interface characterized is likely to represent the one between (Nb,Ti)Si-2 and Si. For the reference samples, the interface studied is between TiSi2 and Si.

  • 2. Chen, C. C.
    et al.
    Lindgren, A. C.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Zhu, D. Z.
    Vantomme, A.
    Different strain relaxation mechanisms in strained Si/Si1-xGex/Si heterostructures by high dose B+ and BF2+ doping2002In: Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms, ISSN 0168-583X, E-ISSN 1872-9584, Vol. 198, no 02-jan, p. 57-63Article in journal (Refereed)
    Abstract [en]

    Strained Si/Si0.8Ge0.2/Si heterostructures are implanted at room temperature with 7.5 keV B+ and 33 keV BF2+ ions to a high dose of 2 x 10(15) ions/cm(2), respectively. The samples are subsequently subjected to three-step anneals (spacer anneal, oxidation anneal and rapid thermal anneal), which are used to simulate a real fabrication process of SiGe-based MOSFET devices. The damage induced by implantation and its recovery are characterized by 2 MeV He-4(+) RBS/ channeling spectrometry. A damage layer on the surface is induced by B+ implantation, but BF2+ ion implantation amorphizes the surface of Si/Si0.8Ge0.2/Si heterostructure. Channeling angular scans along the (110) axial direction demonstrate that the strain stored in the SiGe layer could be nearly completely retained for the B+ implantated and subsequently annealed sample. However, the strain in the BF2+ implanted/annealed SiGe layer has decreased drastically.

  • 3. d'Heurle, F. M.
    et al.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Lavoie, C.
    Gas, P.
    Cabral, C.
    Harper, J. M. E.
    Formation of C54TiSi(2): Effects of niobium additions on the apparent activation energy2001In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 90, no 12, p. 6409-6415Article in journal (Refereed)
    Abstract [en]

    The formation of C54 TiSi2 using Ti-Nb alloys deposited on polycrystalline Si substrates was studied by means of in situ x-ray diffraction and resistance measurements during temperature ramping. Alloys with Nb contents ranging from 0 to 13.6 at. % were used. The formation temperature of C54 TiSi2 was reduced in the presence of Nb. However, the addition of Nb in Ti did not cause fundamental changes in the evolution of resistance versus temperature. This latter observation suggests that the mechanism for the formation of C54 TiSi2 remained the same in spite of the enhancement effect. For alloys with up to 8 at. % of Nb, the C49 TiSi2 phase formed first, as with pure Ti. When annealing the alloy with 13.6 at. % Nb, neither C49 TiSi2 nor C54 were found in the usual temperature ranges, instead, C40 (Nb,Ti)Si-2 was observed. This phase transformed to C54 (Nb,Ti)Si-2 above 950 degreesC. The apparent activation energy associated with the formation of C54 TiSi2 was obtained by annealing the samples at four different ramp rates from 3 to 27 K/s; it decreased continuously from 3.8 to 2.5 eV with increasing Nb content from 0 to 8 at. %. The apparent activation energy for the formation of C40 (Nb,Ti)Si-2 was found to be 2.6 eV. The possible physical meaning, or lack thereof, of the high activation energies derived from experimental measurements is extensively discussed. A qualitative model is proposed whereby nucleation would be rate controlling in pure TiSi2, and interface motion in samples with 8 at. % Nb.

  • 4. Feste, S. F.
    et al.
    Zhang, M.
    Knoch, J.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Mantl, S.
    Variability in SOI Schottky barrier MOSFETs2008In: ULIS - Int. Conf. ULtim. Integr. Silicon, 2008, p. 27-30Conference paper (Refereed)
    Abstract [en]

    We study the variability of the electrical characteristics of silicon-on-insulator (SOI) SB-MOSFETs. A new method by extracting the variation of the threshold voltage from a large number of devices with different SOI thicknesses enables determining the main sources of variability and distinguishing between them. It is found that the device-to-device variability is mainly due to the inherent variation of the Schottky barrier (SB) height. An additional but smaller contribution stems from fluctuations of the SOI body thickness itself. However, scaling the SOI thickness down our measurements suggest that the SB inhomogeneity increases with decreasing tsi. Furthermore, employing dopant segregation during silicidation to realize low SB heights leads to an increase of the variability, too. Using the measured spread of ΦB we discuss on the base of simulations the influence of this variation on the on-current of SB-MOSFETs. The improved electrostatic gate control in multi-gate devices reduces the sensitivity of carrier injection on an inhomogeneous ΦB and thus suppresses the variability.

  • 5.
    Gudmundsson, Valur
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Hellström, Per-Erik
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Luo, Jun
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Lu, Jun
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Fully Depleted UTB and Trigate N-Channel MOSFETs Featuring Low-Temperature PtSi Schottky-Barrier Contacts With Dopant Segregation2009In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 30, no 5, p. 541-543Article in journal (Refereed)
    Abstract [en]

    Schottky-barrier source/drain (SB-S/D) presents a promising solution to reducing parasitic resistance for device architectures such as fully depleted UTB, trigate, or FinFET. In this letter, a low-temperature process (<= 700 degrees C) with PtSi-based S/D is examined for the fabrication of n-type UTB and trigate FETs on SOI substrate (t(si) = 30 nm). Dopant segregation with As was used to achieve the n-type behavior at implantation doses of 1 (.) 10(15) and 5. 10(15) cm(-2). Similar results were found for UTB devices with both doses, but trigate devices with the larger dose exhibited higher on currents and smaller process variation than their lower dose counterparts.

  • 6.
    Gudmundsson, Valur
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Hellström, Per-Erik
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Characterization of dopant segregated Schottky barrier source/drain contacts2009In: ULIS 2009: 10TH INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION OF SILICON / [ed] Mantl S, Lemme M, Schubert J, Albrecht W, NEW YORK: IEEE , 2009, p. 73-76Conference paper (Refereed)
    Abstract [en]

    In this paper, the gate-voltage dependent source/drain (S/D) resistance (R-SD) in dopant segregated (DS) Schottky barrier (SB) junctions is examined by experiment and simulation. The focus is placed on fully depleted UTB-SOI MOSFETs featuring PtSi S/D with As-DS realized at low temperatures. When modeling SB-S/D with DS, it is challenging to determine if the performance enhancement observed is induced by a highly doped shallow layer in Si or by an interfacial dipole causing SB height lowering. The simulation reveals that the gate-voltage dependence of R-SD is stronger for the dipole effect. For the SB-MOSFETs with DS-S/D examined in this work, the simulation gives an excellent fit to the measured data when SBH lowering is combined with high concentration shallow doping.

  • 7.
    Gudmundsson, Valur
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Hellström, Per-Erik
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Direct measurement of sidewall roughness on Si, poly-Si and poly-SiGe by AFM2008In: PROCEEDINGS OF THE 17TH INTERNATIONAL VACUUM CONGRESS/13TH INTERNATIONAL CONFERENCE ON SURFACE SCIENCE/INTERNATIONAL CONFERENCE ON NANOSCIENCE AND TECHNOLOGY / [ed] Johansson LSO, Andersen JN, Gothelid M, Helmersson U, Montelius L, Rubel M, Setina J, Wernersson LE, Bristol: IOP PUBLISHING LTD , 2008, Vol. 100Conference paper (Refereed)
    Abstract [en]

    In this paper the effect of the commonly used HBr/Cl-2 chemistry for dry etching on the line-edge roughness (LER) of photoresist patterned single crystalline Si (sc-Si), polycrystalline Si (poly-Si) and poly-Si0.2Ge0.8 sidewalls was characterized. Measurements were done by means of atomic force microscopy in combination with an elaborated sample preparation technique that allowed the LER at different depths of the sidewall to be measured. Samples were patterned by I-line lithography and etching was performed at an RF power of 200 W using HBr/Cl-2 (30/10 sccm) plasma. For sc-Si the photoresist and Si sidewalls had an LER of 0.8-1.4 nm and 1.5-2 nm, respectively. For poly-Si and poly-SiGe the photoresist sidewall roughness was, respectively, increased to 1.5-3 nm and 2-3.5 nm due to light scattering from the rough surface of the polycrystalline materials. The poly-Si film had a sidewall roughness of 3-4 nm. Poly-SiGe sidewall exhibited larger roughness with an LER of 5-12 nm which was not transferred from the photoresist. The results show that for sc-Si and poly-Si the sidewall roughness mainly originates from the photoresist process and little additional roughening is caused by the HBr/Cl-2 etching. However, for poly-Si0.2Ge0.8 the LER is considerably increased from that of the photoresist indicating that the HBr/Cl-2 etching is the main contributor to the LER.

  • 8.
    Hellberg, Per-Erik
    et al.
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Radamson, HH
    Kaplan, W
    Threshold voltage control for PMOSFETs using an undoped epitaxial Si channel and a p(+)-SixGe1-x gate2000In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 44, no 11, p. 2085-2088Article in journal (Refereed)
    Abstract [en]

    This paper examines experimentally the performance of PMOSFETs with an undoped epitaxial Si channel in combination with a p(+)-SixGe1-x gate electrode. The channel doping profiles were made using shallow As-implantation followed by selective epitaxy of undoped Si to different thicknesses of 40, 80 and 120 nm. The p(+)-SixGe1-x gate with different values of x was used to tailor the threshold voltage. The transconductance and saturation current were found to increase and the threshold voltage to decrease with increasing thickness of the undoped Si channel for the same gate material. Increasing Ge content in the p(+)-SixGe1-x gate resulted in an increased threshold voltage. Compared to the p(+)-Si gate, the threshold voltage was increased by 0.15 and 0.35 V with a p(+)-Si0.79Ge0.21 and p(+)-Si0.53Ge0.47 gate, respectively, independently of the Si channel thickness. Therefore, the use of a p(+)-SixGe1-x gate introduces an extra degree of freedom when designing the channel for high performance PMOSFETs.

  • 9. Huang, Yue
    et al.
    Gou, Hong-Yan
    Sun, Qing-Qing
    Ding, Shi-Jin
    Zhang, Wei
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Memory Effect of Metal-Oxide-Silicon Capacitors with Self-Assembly Double-Layer Au Nanocrystals Embedded in Atomic-Layer-Deposited HfO2 Dielectric2009In: Chinese Physics Letters, ISSN 0256-307X, E-ISSN 1741-3540, Vol. 26, no 10Article in journal (Refereed)
    Abstract [en]

    We report the chemical self-assembly growth of Au nanocrystals on atomic-layer-deposited HfO2 films aminosilanized by (3-Aminopropyl)-trimethoxysilane aforehand for memory applications. The resulting Au nanocrystals show a density of about 4 x 10(11) cm(-2) and a diameter range of 5-8 nm. The metal-oxide-silicon capacitor with double-layer Au nanocrystals embedded in HfO2 dielectric exhibits a large C - V hysteresis window of 11.9 V for +/- 11 V gate voltage sweeps at 1 MHz, a flat-band voltage shift of 1.5 V after the electrical stress under 7 V for 1 ms, a leakage current density of 2.9 x 10(-8) A/cm(-2) at 9 V and room temperature. Compared to single-layer Au nanocrystals, the double-layer Au nanocrystals increase the hysteresis window significantly, and the underlying mechanism is thus discussed.

  • 10.
    Hållstedt, Julius
    et al.
    KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK.
    Hellström, Per-Erik
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Zhen
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Malm, B. Gunnar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Edholm, Jonas
    Lu, J.
    Uppsala University, Ångström Laboratory.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Radamson, Henry
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    A robust spacer gate process for deca-nanometer high-frequency MOSFETs2006In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 83, no 3, p. 434-439Article in journal (Refereed)
    Abstract [en]

    This paper, presents a robust spacer technology for definition of deca-nanometer gate length MOSFETs. Conformal deposition, selective anisotropic dry-etching and selective removal of sacrificial layers enabled patterning of an oxide hard mask with deca-nanometer lines combined with structures defined with I-line lithography on a wafer. The spacer gate technology produces negligible topographies on the hard mask and no residual particles could be detected on the wafer. The line-width roughness of 40 nm poly-Si gate lines was 4 nm and the conductance of 200 pm long lines exhibited a standard deviation of 6% across a wafer. nMOSFETs with 45 nm gate length exhibited controlled short-channel effects and the average maximum transconductance in saturation was 449 mu S/mu m with a standard deviation of 3.7% across a wafer. The devices exhibited a cut-off frequency above 100 GHz at a drain current of 315 mu A/mu m. The physical and electrical results show that the employed spacer gate technology is robust and can define deca-nanometer nMOSFETs with high yield and good uniformity.

  • 11.
    Hållstedt, Julius.
    et al.
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Parent, Arnaud
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Radamson, Henry H.
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Strain and electrical characterization of boron-doped SiGeC layers grown by chemical vapor deposition2004In: Physica Scripta, ISSN 0031-8949, E-ISSN 1402-4896, Vol. T114, p. 31-33Article in journal (Refereed)
    Abstract [en]

    Incorporation, induced strain and electrical properties of boron and carbon in Si1-x-yGexCy epitaxial layers (x = 0.23 and 0.28 with y = 0 and 0.005) grown by chemical vapour deposition (CVD) have been studied. The boron concentration in the epitaxial layers was in the range of 3 x 10(18)-1 x 10(21) cm(-3). The growth rate enhanced weakly by increasing boron partial pressure up to 0.002 mtorr ( corresponding to 2 x 10(19) cm(-3)) where a significant increase in deposition rate was observed. In SiGeC layers, the active boron concentration was obtained from the strain compensation amount. It was also found that the boron atoms have a tendency to locate at substitutional sites more preferentially compared to carbon. The incorporation of boron in SiGeC layers was clearly improved in the range 2 x 10(19)-3 x 10(20) cm(-3). These investigations also enabled an estimation of the Hall scattering factor of the SiGeC layers. A comparison between our results with the previous theoretical calculations showed a good agreement. This created the possibility to evaluate the drift mobility in our samples.

  • 12.
    Isheden, Christian
    et al.
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Hellström, Per-Erik
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Radamson, Henry H.
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    MOSFETs with recessed SiGe Source/Drain junctions formed by selective etching and growth2004In: Electrochemical and solid-state letters, ISSN 1099-0062, E-ISSN 1944-8775, Vol. 7, no 4, p. G53-G55Article in journal (Refereed)
    Abstract [en]

    A source/drain extension process that uses HCl etching followed by selective growth of in situ B-doped SiGe is demonstrated. The two key process steps, etching and growth, are integrated by performing them consecutively in the same chemical vapor deposition reactor. The technique has the potential to solve end-of-the-roadmap requirements on junction depth, junction abruptness, and active doping concentration.

  • 13.
    Isheden, Christian
    et al.
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Hellström, Per-Erik
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Radamson, Henry H.
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Selective Si etching using HCl vapor2004In: Physica Scripta, ISSN 0031-8949, E-ISSN 1402-4896, Vol. T114, p. 107-109Article in journal (Refereed)
    Abstract [en]

    Selective Si etching using HCl in a reduced pressure chemical vapor deposition reactor in the temperature range 800-1000 degrees C is investigated. At 900 degrees C, the etch process is anisotropic, exhibiting the densely packed (100), (311) and (111) surfaces. This behavior indicates that the etch process is limited by surface reaction, since the etch rate in the directions with higher atomic concentration is lower. When the temperature is decreased to 800 degrees C, etch pits occur. A more isotropic etch is obtained at 1000 degrees C, however at this temperature the masking oxide is attacked and the etch surface is rough. Thus the temperature has to be confined to a narrow window to yield desirable properties under the present process conditions.

  • 14.
    Isheden, Christian
    et al.
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Seger, Johan
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Radamson, Henry H.
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Formation of Ni mono-germanosilicide on heavily B-doped epitaxial SiGe for ultra-shallow source/drain contacts2003In: Materials Research Society Symposium Proceedings, ISSN 0272-9172, E-ISSN 1946-4274, Vol. 745, p. 117-122Article in journal (Refereed)
    Abstract [en]

    The formation of Ni germanosilicides during solid-state interaction between Ni and heavily B-doped strained epitaxial Si1-xGex films with x=0.18, 0.32 and 0.37 is studied. No NiSi2 is found in these samples even after annealing at 850 degreesC, which can be compared to the formation of NiSi2 at 750 T on Si(I 00). Resistance and diffraction studies for the Si0.82Ge0.18 sample indicate that NiSi0.82Ge0.18 forms and the NiSi0.82Ge0.18/Si0.82Ge0.18 structure is stable from 400 to 700 degreesC. For the NiSi1-uGeu formed in all Si1-xGex samples, where u can be different from x, a strong film texturing is observed. When the Ge fraction is increased from 18 at.% to 32-37 at.%, the morphological stability of the film is degraded and a substantial increase in sheet resistance occurs already at 600 degreesC. The contact resistivity for the NiSi0.8Ge0.2/Si0.8Ge0.2 interface formed at 550 T is determined as 1.2x10(-7) Omegacm(2), which satisfies the ITRS contact resistivity requirement for the 70 nm technology node.

  • 15. Jarmar, T.
    et al.
    Ericson, F.
    Smith, U.
    Seger, J.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Influence of germanium on the formation of NiSi1-xGex on (111)-oriented Si1-xGex2005In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 98, no 5Article in journal (Refereed)
    Abstract [en]

    The formation of NiSi1-xGex on Si1-xGex(111) substrates with x=0, 0.05, and 0.20 at an annealing temperature of 500 degrees C has been studied by x-ray diffraction, transmission electron microscopy, and pole-figure measurements. NiSi formed preferentially oriented on Si, with (100), (001), and (102) parallel to Si(111) and NiSi[010]parallel to Si < 211 >. In NiSi0.95Ge0.05, (001) and (102) maintained their preferential orientations, whereas NiSi0.95Ge0.05(100) was rotated by 30 degrees, so that NiSi0.95Ge0.05[010]parallel to Si0.95Ge0.05< 011 >. An epitaxial alignment in the form of a double axiotaxy, with NiSi0.95Ge0.05(2 +/- 11) as well as (20-2)parallel to Si0.95Ge0.05{220}, simultaneously with NiSi0.95Ge0.05(0 +/- 13) as well as (020)parallel to Si0.95Ge0.05{022}, caused NiSi0.95Ge0.05(100) to tilt over the range of 0 degrees-7.5 degrees. The Ge addition also enhanced the preferentially oriented structure by reinforcing NiSi0.95Ge0.05(123)parallel to Si0.95Ge0.05(111) through the axiotaxial alignments, NiSi0.95Ge0.05(211) and (-112)parallel to Si0.95Ge0.05{220}. Observed was also the presence of NiSi0.95Ge0.05(011)parallel to Si0.95Ge0.05(111), with NiSi0.95Ge0.05[100]parallel to Si0.95Ge0.05< 011 >. In the case of NiSi0.80Ge0.20, the preferential orientations were sharply reduced in favor of NiSi0.80Ge0.20(100)parallel to Si0.80Ge0.20(111), with NiSi0.80Ge0.20[010]parallel to Si0.80Ge0.20< 011 > and the 30 degrees rotation thus preserved. The observed Ge influence is shown to be consistent with a model suggested earlier for Si1-xGex(001) substrates, which is based on the nonexistence of Ni(Si1-xGex)(2) for all except the smallest values of x. High-resolution transmission electron microscopy was used to show that the surface steps typical of molecular-beam-deposited epitaxial Si1-xGex substrate films do not influence the growth of the NiSi1-xGex.

  • 16. Jarmar, T.
    et al.
    Seger, J.
    Ericson, F.
    Smith, U.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Cross-sectional transmission electron microscopy study of the influence of niobium on the formation of titanium silicide in small-feature contacts2003In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 93, no 8, p. 4480-4484Article in journal (Refereed)
    Abstract [en]

    The influence of a Nb layer between Si and Ti on the formation of TiSi2 in small-feature contacts and of the substrate doping level has been studied using transmission electron microscopy in combination with convergent-beam electron diffraction. For an As dose of 2.5x10(16) cm(-2), a mixture of C49 and partially agglomerated C54 TiSi2 grains was found in some of the 5x5 mum(2) contact windows, while only C49 existed in the 0.7x0.7 mum(2) windows. Agglomeration is shown to lead to possible C49-C54 coexistence, as well as erroneous interpretation of the C54 nucleation density. Decreasing the As dose to 5x10(15) cm(-2) leads to a thicker TiSi2 layer, but does not have a major influence on phase formation in the small windows, although only C54 TiSi2 was found in the large ones. In the presence of a thin Nb layer between Ti and poly-Si, C40 (Ti,Nb)Si-2 was consistently found in all contacts, indicating that formation does not depend on the contact size at least down to 0.5 mum(2). Surprisingly, Ti was found on both sides of the (Ti,Nb)Si-2 layer and the silicide near the interface to Si was relatively rich in Ti instead of Nb.

  • 17. Jarmar, T.
    et al.
    Seger, Johan
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Ericson, F.
    Mangelinck, D.
    Smith, U.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Morphological and phase stability of nickel-germanosilicide on Si1-xGex under thermal stress2002In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 92, no 12, p. 7193-7199Article in journal (Refereed)
    Abstract [en]

    Continuous and uniform Ni(Si,Ge) layers are formed on polycrystalline Si and Si0.42Ge0.58 substrate films at 500 degreesC by rapid thermal processing. The germanosilicide is identified as NiSi0.42Ge0.58, i.e., with the same Si-to-Ge ratio as in the substrate. The NiSi0.42Ge0.58 layer has agglomerated at 600 degrees C. This is accompanied by a diffusion of Ge out from the germanosilicide grains and the growth of a Ge-rich SiGe region in their close vicinity. These changes cause a slight variation in the atomic composition of Ni(Si,Ge) detectable for individual grains by means of energy dispersive spectroscopy. Above 600 degreesC, substantial outdiffusion of Ge from the Ni(Si,Ge) grains occurs concurrently with the migration of the grains into the substrate film away from the surface area leaving a Ge-rich SiGe region behind. These observations can be understood with reference to calculated Ni-Si-Ge ternary phase diagrams with and without the inclusion of NiSi2. When Ge is present, the Ni-based self-aligned silicide process presents a robust technique with respect to device applications.

  • 18. Jarmar, T.
    et al.
    Zhang, Zhibin
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Seger, Johan
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Ericson, F.
    Smith, U.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Germanium-induced texture and preferential orientation of NiSi1-xGex layers on Si1-xGex2004In: Physical Review B. Condensed Matter and Materials Physics, ISSN 1098-0121, E-ISSN 1550-235X, Vol. 70, no 23, p. 1-11Article in journal (Refereed)
    Abstract [en]

    NiSi1-xGex films on compressively strained as well as relaxed undoped Si1-xGex epitaxially grown substrates with x=0.06-0.30 on Si(001) wafers have been studied with respect to the relative orientation of film and substrate after annealing at temperatures in the range 400-850 degreesC. Using x-ray diffraction, transmission electron microscopy, and pole-figure measurements, it was found that only the monogermanosilicide phase formed above 450 degreesC and was the only phase still at 850 degreesC. New information regarding the effects of Ge on the silicidation of Ni was also found. Thus, the preferred plane parallel to the surface is (013). Compared to NiSi, Ge suppresses the development of the other planes parallel to the surface except (013). Within this plane, the orientations of the grains pile up in such a way that the configuration NiSi1-xGex[100]//Si1-xGex[100] is avoided, which in the pole-figures leads to broad peaks in-between the substrate [100] and [010]. In addition, peaks indicating the epitaxial alignment NiSi0.8Ge0.2(+/-21-1) or (+/-2-11)//Si0.8Ge0.2(+/-2+/-20) coupled with NiSi0.8Ge0.2(+/-100)approximate to//Si0.8Ge0.2(+/-100) or (0+/-10) were found. Fine structure in the broad peaks is found to be due to lateral epitaxial alignments between grains along their common grain boundary. Based on the nonexistence of NiGe2, the observations are interpreted in terms of Ge preventing the formation of certain Ni-Ge bonds at the interface between NiSi1-xGex and the Si1-xGex substrate.

  • 19. Lanner, Johanna T.
    et al.
    Bruton, Joseph D.
    Assefaw-Redda, Yohannes
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Andronache, Zoita
    Severa, Denise
    Zhang, Zhibin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Melzer, Werner
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Katz, Abram
    Westerblad, Hakan
    Knockdown of TRPC3 with siRNA coupled to carbon nanotubes results in decreased insulin-mediated glucose uptake in adult skeletal muscle cells2009In: The FASEB Journal, ISSN 0892-6638, E-ISSN 1530-6860, Vol. 23, no 6, p. 1728-1738Article in journal (Refereed)
    Abstract [en]

    The involvement of Ca2+ in the insulin-mediated signaling cascade, resulting in glucose uptake in skeletal muscle, is uncertain. Here, we test the hypothesis that Ca2+ influx through canonical transient receptor potential 3 (TRPC3) channels modulates insulin-mediated glucose uptake in adult skeletal muscle. Experiments were performed on adult skeletal muscle cells of wild-type (WT) and obese, insulin-resistant ob/ob mice. Application of the diacylglycerol analog 1-oleyl-2-acetyl-sn-glycerol (OAG) induced a nonselective cation current, which was inhibited by the addition of anti-TRPC3 antibody in the patch pipette and smaller in ob/ob than in WT cells. Knockdown of TRPC3, using a novel technique based on small interfering RNA (siRNA) coupled to functionalized carbon nanotubes, resulted in pronounced (similar to 70%) decreases in OAG-induced Ca2+ influx and insulin-mediated glucose uptake. TRPC3 and the insulin-sensitive glucose transporter 4 (GLUT4) coimmunoprecipitated, and immunofluorescence staining showed that they were colocalized in the proximity of the transverse tubular system, which is the predominant site of insulin-mediated glucose transport in skeletal muscle. In conclusion, our results indicate that TRPC3 interacts functionally and physically with GLUT4, and Ca2+ influx through TRPC3 modulates insulin-mediated glucose uptake. Thus, TRPC3 is a potential target for treatment of insulin-resistant conditions.-Lanner, J. T., Bruton, J. D., Assefaw-Redda, Y., Andronache, Z., Zhang, S.- J., Severa, D., Zhang, Z.- B., Melzer, W., Zhang, S.-L., Katz, A., Westerblad, H. Knockdown of TRPC3 with siRNA coupled to carbon nanotubes results in decreased insulin-mediated glucose uptake in adult skeletal muscle cells. FASEB J. 23, 1728-1738 (2009)

  • 20. Li, B.
    et al.
    Jiang, J. C.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Zhang, F.
    Low-temperature dependence of midinfrared optical constants of lead-germanium-telluride thin film2002In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 91, no 6, p. 3556-3561Article in journal (Refereed)
    Abstract [en]

    The design and manufacture of diode lasers for gas analysis or multilayer thin-film optical devices used at low-temperature require the refractive index and the temperature coefficient of IV-VI compound over a significant temperature range. In this article, the refractive index and the absorption coefficient of Pb0.94Ge0.06Te thin film have been determined from transmission spectra measured at temperature between 80 and 300 K in the spectral range of 2.5-8.5 mum by fitting based on a Lorentz-oscillator model. It is found that the maximum refractive index occurs at 150 K, which corresponds to the structural phase transition from rocksalt to rhombohedrally distorted structure and reflects an increase of lattice polarizability. The value of the index of refraction is 5.350-6.000 in the spectral range of 4.0-8.5 mum for all measured temperatures, which reveals that Pb1-xGexTe is a highly refractive infrared material. The temperature coefficient of refractive index, dn/dT, is found to be -0.006-0.002 K-1 in the spectral range of 3.0-8.5 mum for all measured temperature. An empirical formula that fits the temperature coefficient in the spectral range of 4.0-8.5 mum is presented. The dependence of the transmission and absorption spectra on decreasing temperature can be explained by the modification of the energy-band structure due to rhombohedral distortions. The conclusion can be drawn that anomalies corresponding to the ferroelectric phase transition occur in both refractive index and absorption coefficient of Pb1-xGexTe alloy.

  • 21.
    Li, Jiantong
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Unander, Tomas
    López Cabezas, Ana
    KTH, School of Information and Communication Technology (ICT), Electronic Systems. KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK.
    Shao, Botao
    KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK. KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Liu, Zhiying
    KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK. Uppsala University, Sweden.
    Feng, Yi
    KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK. KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Forsberg, Esteban Bernales
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Zhibin
    KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK.
    Jögi, Indrek
    Gao, Xindong
    Boman, Mats
    Zheng, Li-Rong
    KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK. KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Nilsson, Hans-Erik
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT). Uppsala University, Sweden.
    Ink-jet printed thin-film transistors with carbon nanotube channels shaped in long strips2011In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 109, no 8, article id 084915Article in journal (Refereed)
    Abstract [en]

    The present work reports on the development of a class of sophisticated thin-film transistors (TFTs) based on ink-jet printing of pristine single-walled carbon nanotubes (SWCNTs) for the channel formation. The transistors are manufactured on oxidized silicon wafer and flexible plastic substrates at ambient conditions. For this purpose, ink-jet printing techniques are developed aiming at high-throughput production of SWCNT thin-film channels shaped in long strips. Stable SWCNT inks with proper fluidic characteristics are formulated by polymer addition. The present work unveils, through Monte Carlo simulation and in the light of heterogeneous percolation, the underlying physics of the superiority of long-strip channels for SWCNT TFTs. It further predicts the compatibility of such a channel structure with ink-jet printing taking into account the minimum dimensions achievable by commercially available printers. The printed devices exhibit improved electrical performance and scalability, compared to previously reported ink-jet printed SWCNT TFTs. The present work demonstrates that ink-jet printed SWCNT TFTs of long-strip channels are promising building blocks for flexible electronics.

  • 22.
    Li, Jiantong
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Conductivity exponents in stick percolation2010In: Physical Review E. Statistical, Nonlinear, and Soft Matter Physics: Statistical Physics, Plasmas, Fluids, and Related Interdisciplinary Topics, ISSN 1063-651X, E-ISSN 1095-3787, Vol. 81, no 021120Article in journal (Refereed)
    Abstract [en]

    On the basis of Monte Carlo simulations, the present work systematically investigates how conductivity exponents depend on the ratio of stick-stick junction resistance to stick resistance for two-dimensional stick percolation. Simulation results suggest that the critical conductivity exponent extracted from size-dependent conductivities of systems exactly at the percolation threshold is independent of the resistance ratio and has a constant value of 1.280 +/- 0.014. In contrast, the apparent conductivity exponent extracted from density-dependent conductivities of systems well above the percolation threshold monotonically varies with the resistance ratio, following an error function, and lies in the vicinity of the critical exponent.

  • 23.
    Li, Jiantong
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Finite-size scaling in stick percolation2009In: Physical Review E. Statistical, Nonlinear, and Soft Matter Physics: Statistical Physics, Plasmas, Fluids, and Related Interdisciplinary Topics, ISSN 1063-651X, E-ISSN 1095-3787, Vol. 80, no 4Article in journal (Refereed)
    Abstract [en]

    This work presents the generalization of the concept of universal finite-size scaling functions to continuum percolation. A high-efficiency algorithm for Monte Carlo simulations is developed to investigate, with extensive realizations, the finite-size scaling behavior of stick percolation in large-size systems. The percolation threshold of high precision is determined for isotropic widthless stick systems as N(c)l(2)=5.637 26 +/- 0.000 02, with N-c as the critical density and l as the stick length. Simulation results indicate that by introducing a nonuniversal metric factor A=0.106 910 +/- 0.000 009, the spanning probability of stick percolation on square systems with free boundary conditions falls on the same universal scaling function as that for lattice percolation.

  • 24.
    Li, Jiantong
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Understanding doping effects in biosensing using carbon nanotube network field-effect transistors2009In: Physical Review B. Condensed Matter and Materials Physics, ISSN 1098-0121, E-ISSN 1550-235X, Vol. 79, no 155434Article in journal (Refereed)
    Abstract [en]

    Systematic theoretical studies based on a comprehensive heterogeneous stick percolation model are performed to gain insights into the essence of doping effects in electrical sensing of biomolecules, such as proteins and DNA fragments, using carbon nanotube network field-effect transistors (CNNFETs). The present work demonstrates that the electrical response to doping of CNNFETs is primarily caused by conductance change at the electrode-nanotube contacts, in contrast to that in the channel as assumed previously. However, the presence of intertube junctions in the channel could reduce the sensitivity of CNNFET-based biosensors and is partially responsible for the experimentally observed channel-length dependent sensitivity.

  • 25.
    Li, Jiantong
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Zhibin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Qiu, Zhijun
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Contact-electrode insensitive rectifiers based on carbon nanotube network transistors2008In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 29, no 5, p. 500-502Article in journal (Refereed)
    Abstract [en]

    This letter presents rectifiers based on the diode connection of carbon nanotube network (CNN) transistors. Despite a low density of carbon nanotubes in the CNNs, the devices can achieve excellent performance with a forward/reverse current ratio reaching 10(5). By casting nanotube suspension on oxidized Si substrates with predefined electrodes, CNN-based field-effect transistors are readily prepared. By short-circuiting the source and gate terminals, CNN-based rectifiers are realized with the rectification characteristics independent of whether Pd or Al is employed as the contact electrodes. This independence is especially attractive for applications of CNN-based transistors/rectifiers in flexible electronics with various printing techniques.

  • 26.
    Li, Jiantong
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Zhibin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Percolation in random networks of heterogeneous nanotubes2007In: Applied Physics Letters, ISSN 0003-6951, E-ISSN 1077-3118, Vol. 91, no 253127Article in journal (Refereed)
    Abstract [en]

    The electrical performance of random carbon nanotube network transistors is found by Monte Carlo simulation to strongly depend on the nature of the conduction path percolating the network. When the network is percolated only by semiconducting nanotube pathways (OSPs), the transistors can directly achieve both high on current and large on/off current ratio. Based on percolation theory, the present work predicts that there exist specific nanotube coverage domains within which OSP has the highest probability and becomes predominant. Simulation results show that the coverage domains depend on the network dimension, nanotube length, and the fraction of metallic nanotubes.

  • 27.
    Li, Jiantong
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Zhibin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Distinguishing self-gated rectification action from ordinary diode rectification in back-gated carbon nanotube devices2008In: Applied Physics Letters, ISSN 0003-6951, E-ISSN 1077-3118, Vol. 92, no 133111Article in journal (Refereed)
    Abstract [en]

    Self-gating leading to rectification action is frequently observed in two-terminal devices built from individual or networked single-walled carbon nanotubes (SWCNTs) on oxidized Si substrates. The current-voltage (I-V) curves of these SWCNT devices remain unaltered when switching the measurement probes. For ordinary diodes, the I-V curves are symmetric about the origin of the coordinates when exchanging the probes. Numerical simulations suggest that the self-gated rectification action should result from the floating semiconducting substrate which acts as a back gate. Self-gating effect is clearly not unique for SWCNT devices. As expected, it is absent for devices fabricated on insulating substrates.

  • 28.
    Li, Jiantong
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Zhibin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Improved electrical performance of carbon nanotube thin film transistors by utilizing composite networks2008In: Applied Physics Letters, ISSN 0003-6951, E-ISSN 1077-3118, Vol. 92, no 133103Article in journal (Refereed)
    Abstract [en]

    This work presents a simple scheme of using composite carbon nanotube networks (c-CNNs) to significantly improve the electrical performance of long-channel thin film transistors based on single-walled carbon nanotubes (SWCNTs). Such c-CNNs comprise two sets of SWCNTs. A primary set consists of dense arrays of perfectly aligned long SWCNTs along the transistor channel direction. A secondary set is composed of short SWCNTs either randomly orientated or perpendicularly aligned with respect to the channel. While retaining a high on/off current ratio, the drive current in such c-CNNs is much higher than that in currently studied systems with single CNNs or SWCNT arrays.

  • 29. Liao, Zhong-Wei
    et al.
    Gou, Hong-Yan
    Huang, Yue
    Sun, Qing-Qing
    Ding, Shi-Jin
    Zhang, Wei
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Robust Low Voltage Program-Erasable Cobalt-Nanocrystal Memory Capacitors with Multistacked Al2O3/HfO2/Al2O3 Tunnel Barrier2009In: Chinese Physics Letters, ISSN 0256-307X, E-ISSN 1741-3540, Vol. 26, no 8, p. 087303-Article in journal (Refereed)
    Abstract [en]

    An atomic-layer-deposited Al2O3/HfO2/Al2O3 (A/H/A) tunnel barrier is investigated for Co nanocrystal memory capacitors. Compared to a single Al2O3 tunnel barrier, the A/H/A barrier can significantly increase the hysteresis window, i. e., an increase by 9V for +/- 12V sweep range. This is attributed to a marked decrease in the energy barriers of charge injections for the A/H/A tunnel barrier. Further, the Co-nanocrystal memory capacitor with the A/H/A tunnel barrier exhibits a memory window as large as 4.1V for 100 mu s program/erase at a low voltage of +/- 7V, which is due to fast charge injection rates, i. e., about 2.4 x 10(16) cm(-2) s(-1) for electrons and 1.9 x 10(16) cm(-2) s(-1) for holes.

  • 30. Lindberg, AC
    et al.
    Hellberg, Per-Erik
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Mohadjeri, B
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Influence of interface roughness on electrical properties of pMOSFETs with a Si/Si1-xGex channel2002In: Physica Scripta, ISSN 0031-8949, E-ISSN 1402-4896, Vol. T101, p. 22-25Conference paper (Refereed)
    Abstract [en]

    The effect of epitaxial growth induced surface roughness on the electrical properties of Si/Si1-xGex channel pMOSFETs was investigated. Grown by chemical vapour deposition for selective epitaxy, the surface of the channel region was considerably rougher for the channel structures with a buried Si1-xGex layer with x = 0.16-0.20 than for those with only Si. Although the increased surface roughness, determined by means of atomic force microscopy, resulted in a doubled interface charge density the density remained low at the mid-10(10) cm(-2) eV(-1) level. Furthermore, identical transconductance values were found for the MOSFETs with and without the Si1-xGex layer. Since the inversion charge was confined predominantly within the surface Si layer, the surface roughness apparently had little effect on the transconductance. However the subthreshold slope was found to increase from 78 mV/decade for the Si-only channel MOSFEF to 105 mV/decade for the Si/Si1-xGex channel MOSFETs.

  • 31. Linder, M.
    et al.
    Ingvarson, F.
    Jeppson, K. O.
    Grahn, J. V.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Extraction of emitter and base series resistances of bipolar transistors from a single DC measurement2000In: IEEE transactions on semiconductor manufacturing, ISSN 0894-6507, E-ISSN 1558-2345, Vol. 13, no 2, p. 119-126Article in journal (Refereed)
    Abstract [en]

    A new procedure for extracting the emitter and base series resistances of bipolar junction transistors is presented. The parameters are extracted from a single measurement in the forward active region on one transistor test structure with two separate base contacts, making it a simple and attractive tool for bipolar transistor characterization. The procedure comprises two methods for extracting the emitter resistance and two for extracting the base resistance. The choice of method is governed by the amount of current crowding or conductivity modulation present in the intrinsic base region. The new extraction procedure was successfully applied to transistors fabricated in an in-house double polysilicon bipolar transistor process and a commercial 0.8-mu m single polysilicon BiCMOS process. We found that the simulated and measured Gummel characteristics are in excellent agreement and the extracted series resistances agree well with those obtained by means of HF measurements. By adding external resistors to the emitter and base and then extracting the series resistances, me verified that the two base contact test structure offers a simple means of separating the influence of emitter and base series resistances on the transistor characteristics.

  • 32. Linder, M.
    et al.
    Ingvarson, F.
    Jeppson, K. O.
    Grahn, J. V.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    On DC modeling of the base resistance in bipolar transistors2000In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 44, no 8, p. 1411-1418Article in journal (Refereed)
    Abstract [en]

    The total base resistance R-BTot constitutes a crucial parameter in modeling bipolar transistors. The significant physical effects determining R-BTot are current crowding and conductivity modulation in the base, both causing reduction of R-BTot With increasing base current I-B. In this paper, it is shown that the reduction of R-BTot(I-B) With increasing I-B is directly related to the physical effect dominating in the base. A new model for R-BTot(I-B) is presented where a parameter alpha is introduced to account for the contributions of current crowding and conductivity modulation in the base. Theoretically, alpha is equal to 0.5 when conductivity modulation is dominant and close to 1.0 when current crowding is the most significant effect. This was verified by measurements and simulations using a distributed transistor model which accounts for the lateral distribution of the base current and the stored base charge. The model proposed for R-BTot(I-B) is very suitable for compact transistor modeling since it is given in a closed form expression handling both current crowding and conductivity modulation in the base. An accurate extraction procedure of the model parameters is also presented.

  • 33. Lindgren, A. C.
    et al.
    Chen, C.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Zhang, Y.
    Zhu, D.
    Characterization of strained Si/Si1-xGex/Si heterostructures annealed in oxygen or argon2002In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 91, no 5, p. 2708-2712Article in journal (Refereed)
    Abstract [en]

    The strained Si/Si1-xGex/Si layer heterostructure heat treated from 700 degreesC to 950 degreesC in Ar (annealing) or O-2-C2H2Cl2 (oxidation) was characterized using high-resolution x-ray diffraction in combination with Rutherford backscattering. Only small changes to the structure are observed up to 800 degreesC, within the resolution limits of diffraction and backscattering. Severe strain relaxation occurs at 950 degreesC and the heterostructure tends to relax more during annealing in Ar than during oxidation in O-2-C2H2Cl2. The strain relaxation is mainly caused by interdiffusion of Si and Ge rather than formation of misfit dislocations. Diffusion of Si interstitials generated during oxidation into the heterostructure is suggested as the cause responsible for the less pronounced interdiffusion of Si and Ge in the oxidized samples.

  • 34. Lu, Jun
    et al.
    Luo, Jun
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Hultman, Lars
    Kinetics and morphology of Ni1-xPtx-silicide epitaxy on Si(001)In: Electrochemical and solid-state letters, ISSN 1099-0062, E-ISSN 1944-8775Article in journal (Other academic)
  • 35. Lu, Jun
    et al.
    Luo, Jun
    KTH, School of Information and Communication Technology (ICT), Material Physics.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Material Physics.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT).
    Hultman, Lars
    On Epitaxy of Ultrathin Ni1-xPtx Silicide Films on Si(001)2010In: Electrochemical and solid-state letters, ISSN 1099-0062, E-ISSN 1944-8775, Vol. 13, no 10, p. H360-H362Article in journal (Refereed)
    Abstract [en]

    Epitaxial Ni(Pt)Si2-y (y < 1) films readily grow upon thermal treatment of 2 nm thick Ni and Ni0.96Pt0.04 films deposited on Si(001). For annealing at 500 degrees C, the films are 5.4-5.6 nm thick with 61-70 mu cm in resistivity. At 750 degrees C, the epitaxial Ni(Pt)Si2-y films become 6.1-6.2 nm thick with a resistivity of 42-44 mu cm. Structural analysis reveals twins, facet wedges, and thickness inhomogeneities in the films grown at 500 degrees C. For higher temperature, an almost defect-free NiSi2-y film with a flat and sharp interface is formed. The presence of Pt makes the aforementioned imperfections more persistent.

  • 36. Lundqvist, N.
    et al.
    Aberg, J.
    Nygren, S.
    Bjormander, C. A.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Effects of substrate bias and temperature during titanium sputter-deposition on the phase formation in TiSi22002In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 60, no 02-jan, p. 211-220Article in journal (Refereed)
    Abstract [en]

    The formation of titanium disilicide (TiSi2,) from Ti deposited using ionized metal plasma under different deposition conditions has been investigated. It is shown that deposition at elevated substrate temperature (450degreesC) enhances the formation of the low-resistivity C54 TiSi2, especially in patterned narrow lines. Grain-boundary footprint pictures obtained by atomic force microscopy indicate a larger grain-size distribution for the films deposited at higher substrate temperature. Deposition under substrate bias resulted in reduced contact resistivity. However, the use of substrate bias results in increased probability of bridging of silicide over the isolating spacers.

  • 37.
    Luo, Jun
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Qiu, Zhi-Jun
    Deng, Jian
    Zhao, Chao
    Li, Junfeng
    Wang, Wenwu
    Chen, Dapeng
    Wu, Dongping
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Ye, Tianchun
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Effects of carbon pre-silicidation implant into Si substrate on NiSi2014In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 120, p. 178-181Article in journal (Refereed)
    Abstract [en]

    In this work, the effects of carbon pre-silicidation implant into Si(1 0 0) substrate on NiSi were investigated. NiSi films with carbon pre-silicidation implant to different doses were characterized by means of sheet resistance measurements, X-ray diffraction, scanning electron microscopy (SEM), planar view transmission electron microscopy (TEM) and second ion mass spectroscopy (SIMS). The presence of C is found to indeed significantly improve the thermal stability of NiSi as well as tends to change the preferred orientations of polycrystalline NiSi. The homogeneously distributed C at NiSi grain boundaries and C peak at NiSi/Si interface is ascribed to the improved thermal stability of NiSi. More importantly, the dose of carbon pre-silicidation implant also plays a key role in the formation of NiSi, which is suggested not to exceed a critical value about 5 x 10(15) cm(-2) in practical application in accordance with the results achieved in this work.

  • 38.
    Luo, Jun
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Qiu, Zhi-Jun
    Deng, Jian
    Zhao, Chao
    Li, Junfeng
    Wang, Wenwu
    Chen, Dapeng
    Wu, Dongping
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Ye, Tianchun
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Variation of Schottky barrier height induced by dopant segregation monitored by contact resistivity measurements2014In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 120, p. 174-177Article in journal (Refereed)
    Abstract [en]

    Change of contact resistivity (rho(c)) is monitored for evaluation of Schottky barrier height (SBH) variation induced by dopant segregation (DS). This method is particularly advantageous for metal-semiconductor contacts of small SBH, as it neither requires low-temperature measurement needed in current-voltage characterization of Schottky diodes nor is affected by reverse leakage current often troubling capacitance-voltage characterization. With PtSi contact to both n- and p-type diffusion regions, and the use of opposite or alike dopants implant into pre-formed PtSi films followed by drive-in anneal at different temperatures to induce DS at PtSi/Si interface, the formation of interfacial dipole is confirmed as the responsible cause for modification of effective SBHs thus the increase or decrease of rho(c). A tentative explanation for the change of contact resistivity based on interfacial dipole theory is provided in this work. Influences and interplay of interfacial dipole and space charge on effective SBH are also discussed.

  • 39.
    Luo, Jun
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Qiu, Zhijun
    Zha, Chaolin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Zhen
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Wu, Dongping
    Lu, Jun
    Åkerman, Johan
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Hultman, Lars
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Surface-energy triggered phase formation and epitaxy in nanometer-thick Ni1-xPtx silicide films2010In: Applied Physics Letters, ISSN 0003-6951, E-ISSN 1077-3118, Vol. 96, no 3Article in journal (Refereed)
    Abstract [en]

    The formation of ultrathin silicide films of Ni1-xPtx at 450-850 degrees C is reported. Without Pt (x=0) and for t(Ni)< 4 nm, epitaxially aligned NiSi2-y films readily grow and exhibit extraordinary morphological stability up to 800 degrees C. For t(Ni)>= 4 nm, polycrystalline NiSi films form and agglomerate at lower temperatures for thinner films. Without Ni (x=1) and for t(Pt)=1-20 nm, the annealing behavior of the resulting PtSi films follows that for the NiSi films. The results for Ni1-xPtx of other compositions support the above observations. Surface energy is discussed as the cause responsible for the distinct behavior in phase formation and morphological stability.

  • 40.
    Luo, Jun
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Qiu, Zhi-Jun
    Zhang, David Wei
    Hellström, Per-Erik
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östrling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Effect of carbon on Schottky barrier heights of NiSi modified by dopant segregation2009In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 30, no 6Article in journal (Refereed)
    Abstract [en]

    The presence of carbon at the interface between NiSi and Si has been found to participate in the process of modification of effective Schottky barrier heights using the dopant segregation (DS) method. Carbon alone results in an increased ∅bn from 0.7 to above 0.9 eV. Boron diffusion in NiSi is inhibited by carbon, and no B-DS at the NiSi/Si interface occurs below 600°C. Above this temperature, B-DS at this interface is evident thus keeping φbn high. The presence of interfacial carbon leads to an increased interfacial As concentration resulting in beneficial effects in tuning ∅bp above 1.0 eV by As-DS.

  • 41.
    Luo, Jun
    et al.
    KTH, School of Information and Communication Technology (ICT).
    Qiu, Zhi-Jun
    Zhang, David Wei
    Hellström, Per-Erik
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi-Li
    Effects of Carbon on Schottky Barrier Heights of NiSi Modified by Dopant Segregation2009In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 30, no 6, p. 608-610Article in journal (Refereed)
    Abstract [en]

    The presence of carbon at the interface between NiSi and Si has been found to participate in the process of modification of effective Schottky barrier heights using the dopant segregation (DS) method. Carbon alone results in an increased phi(bn) from 0.7 to above 0.9 eV. Boron diffusion in NiSi is inhibited by carbon, and no B-DS at the NiSi/Si interface occurs below 600 degrees C. Above this temperature, B-DS at this interface is evident thus keeping phi(bn) high. The presence of interfacial carbon leads to an increased interfacial As concentration resulting in beneficial effects in tuning phi(bn) above 1.0 eV by As-DS.

  • 42.
    Luo, Jun
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Qiu, Zhi-Jun
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Zhen
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Interaction of NiSi with dopants for metallic source/drain applications2010In: Journal of Vacuum Science & Technology B, ISSN 1071-1023, E-ISSN 1520-8567, Vol. 28, no 1, p. C1I1-C1I11Article in journal (Refereed)
    Abstract [en]

    This work has a focus on NiSi as a possible metallic contact for aggressively scaled complementary metal oxide semiconductor devices. As the bulk work function of NiSi lies close to the middle of Si bandgap, the Schottky barrier height (SBH) of NiSi is rather large for both electron (similar to 0.65 eV) and hole (similar to 0.45 eV). Different approaches have therefore been intensively investigated in the literature aiming at reducing the effective SBH: dopant segregation (DS), surface passivation (SP), and alloying, in order to improve the carrier injection into the conduction channel of a field-effect transistor. The present work explores DS using B and As for the NiSi/Si contact system. The effects of C and N implantation into Si substrate prior to the NiSi formation are examined, and it is found that the presence of C yields positive effects in helping reduce the effective SBH to 0.1-0.2 eV for both conduction polarities. A combined use of DS or SP with alloying could be considered for more effective control of effective SBH, but an examination of undesired compound formation and its probable consequences is necessary. Furthermore, an analysis of the metal silicides that have a small "intrinsic" SBH reveals that only a very small number of them are of practical interest as most of the silicides require either a high formation temperature or possess a high specific resistivity.

  • 43.
    Luo, Jun
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Wu, Dongping
    State Key Lab of ASIC and Systems, School of Microelectronics, Fudan University, Shanghai .
    Qiu, Zhijun
    State Key Lab of ASIC and Systems, School of Microelectronics, Fudan University, Shanghai .
    Lu, Jun
    Department of Physics, Chemistry and Biology, Linköping University.
    Hultman, Lars
    Department of Physics, Chemistry and Biology, Linköping University.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi-Li
    State Key Lab of ASIC and Systems, School of Microelectronics, Fudan University, Shanghai .
    On Different Process Schemes for MOSFETs With a Controllable NiSi-Based Metallic Source/Drain2011In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 58, no 7, p. 1898-1906Article in journal (Refereed)
    Abstract [en]

    This paper focuses on different silicidation schemes toward a controllable NiSi-based metallic source/drain (MSD) process with restricted lateral encroachment of NiSi. These schemes include thickness control of Ni, Ni-Pt alloying, and two-step annealing. Experimental results show that all the three process schemes can give rise to effective control of lateral encroachment during Ni silicidation. By controlling t(Ni), NiSi-based MSD metal-oxide-semiconductor field-effect transistors (MOSFETs) of gate length L-G = 55 nm are readily realized on ultrathin-body silicon-on-insulator substrates with 20-nm surface Si thickness. With the aid of dopant segregation (DS) to modifying the Schottky barrier heights of NiSi, both n- and p-type MSD MOSFETs show significant performance improvement, compared to reference devices without DS.

  • 44. Ma, P. X.
    et al.
    Linder, M.
    Sanden, M.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Chang, M. C. F.
    An analytical model for space-charge region capacitance based on practical doping profiles under any bias conditions2001In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 45, no 1, p. 159-167Article in journal (Refereed)
    Abstract [en]

    An analytical model is presented For quasi-static capacitance of the space-charge region in a p-n junction. The model is valid for realistic junction doping profiles under any bias conditions. It consists of local models in three bias regions. For the high-reverse bias region, a novel analytical model is derived. For the moderate-bias region, an empirical model commonly used in SPICE is adopted. Finally, for the high-forward bias region, the junction profiles are approximated by linearly-graded junctions. Existing analytical models are then modified appropriately to characterize both high-injection and heavy-doping effects for advanced bipolar transistors. Compared to previously developed analytical models or existing empirical models, as well as numerical simulation results, the analytical model presented here shows an improved accuracy and therefore provides a better tool For both device and circuit simulations.

  • 45. Pejnefors, J.
    et al.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Radamson, Henry H.
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Grahn, J. V.
    Östling, Mikael
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Chemical vapor deposition of undoped and in-situ boron- and arsenic-doped epitaxial and polycrystalline silicon films grown using silane at reduced pressure2000In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 88, no 3, p. 1655-1663Article in journal (Refereed)
    Abstract [en]

    A nonselective epitaxial growth process for heterojunction bipolar transistors has been studied. The difference in growth rates for epitaxial and polycrystalline films could be used to monitor the thickness of the intrinsic and extrinsic base layers. The films were grown using chemical vapor deposition on Si < 100 > (epitaxy) and on silicon dioxide (polycrystalline) at reduced pressure (20-80 Torr) for undoped and in situ B or As doping. The depositions were carried out using silane diluted in hydrogen. Diborane and arsine were used as the source gas for dopants. For the undoped Si films, the deposition of polycrystalline films had a substantially higher rate than that of epitaxial ones. The growth rate of both epitaxial and polycrystalline depositions decreased with increasing total pressure. It was, however, linearly proportional to the silane partial pressure, p(SiH4). The dependence of the growth rate on the hydrogen partial pressure was proportional to p(H2)(-0.82) for epitaxial and to p(H2)(-0.60) for polycrystalline depositions. The apparent activation energy was 2.1 and 1.6 eV for the epitaxial and polycrystalline depositions, respectively. A growth mechanism assuming the dissociative adsorption of silane on the Si surface, in combination with first-order hydrogen desorption kinetics, was employed to describe the experimental observations, including the differences in deposition rates, dependency on the hydrogen partial pressure as well as apparent activation energy. In situ B doping influenced neither the epitaxial nor polycrystalline depositions. In situ As doping, on the other hand, largely reduced the growth rate compared to the undoped films to such an extent that there was no appreciable difference in growth rate between the epitaxial and polycrystalline Si. The doping concentration in the epitaxial B and As films were of the order of 10(18) cm(-3), identical deposition conditions yielded a 5 and 20 times larger dopant incorporation in the B and As doped polycrystalline films, respectively.

  • 46. Pejnefors, J.
    et al.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Radamson, Henry H.
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Chemical vapor deposition of silicon in a lamp-heated reactor - Effects of heat absorption, emission, and conduction2002In: Journal of the Electrochemical Society, ISSN 0013-4651, E-ISSN 1945-7111, Vol. 149, no 6, p. C355-C361Article in journal (Refereed)
    Abstract [en]

    Deposition of polycrystalline Si (poly-Si) on oxidized Si and silicon-on-sapphire (SOS) substrates in an ASM Epsilon-2000 reactor with a SiC-coated graphite susceptor is studied. A simple model for the poly-Si growth rate, taking into account effects of wafer emissivity and absorptivity on instantaneous wafer temperature, is used to assist assessment of the depositions. The success of poly-Si deposition on SOS in the lamp-heated single-wafer reactor with a SiC-coated graphite susceptor confirms that the substrate wafer is mainly heated by thermal conduction from the underlying susceptor. However, the poor ability for the SOS wafers to absorb radiative energies from the heating lamps results in a 6-12% reduction of growth rates of poly-Si, as compared to identical depositions on Si substrates. Hence, thermal radiation from the lamps as well as from the susceptor contributes to detail regulations of the wafer temperature. Calculation of wafer emissivity and absorptivity and measurement of susceptor temperature indicate that in response to variations in the wafer absorptivity during deposition, the lamp radiation is regulated. Since the wafer emissivity varies simultaneously during deposition, the true wafer temperature can deviate from the set-point temperature measured at the thermocouple encapsulated in the susceptor under the wafer. Our modeling of growth rates for poly-Si deposition on oxidized Si substrates qualitatively agrees with the experimentally measured data.

  • 47. Pejnefors, J.
    et al.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Radamsson, H. H.
    Östling, Mikael
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Effects of growth kinetics and surface emissivity on chemical vapor deposition of silicon in a lamp-heated single-wafer reactor2001In: Electrochemical and solid-state letters, ISSN 1099-0062, E-ISSN 1944-8775, Vol. 4, no 11, p. G98-G100Article in journal (Refereed)
    Abstract [en]

    Chemical vapor deposition of Si in a lamp-heated single-wafer reactor is studied by monitoring the growth rate of films deposited on bare S. silicon-on-insulator (SOI), and oxidized Si wafers. The growth rate is consistently higher for deposition of polycrystalline Si than for epitaxy of Si. due to different kinetics dictating the two depositions. Epitaxy of Si on SOI shows a higher overall growth rate than on hare Si. Likewise, deposition of polycrystalline Si on oxidized Si wafer with a 4000 Angstrom thick oxide has a higher growth rate than on that with 15 Angstrom oxide. These are attributed to surface emissivity variation during Si deposition. The difference in kinetics plays a more dominant role than the surface emissivity variation in affecting the growth rate for the depositions studied.

  • 48. Persson, S
    et al.
    Hellberg, Per-Erik
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    A charge sheet model for MOSFETs with an abrupt retrograde channel - Part I. Drain current and body charge2002In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 46, no 12, p. 2209-2216Article in journal (Refereed)
    Abstract [en]

    Analytical solutions to drain current, depletion and inversion charges for MOSFETs with an ideally abrupt retrograde doping profile in the channel are derived based on the charge sheet model. The validity of the analytical solutions is confirmed by comparing the modeling results with simulation data obtained using numerical calculations; the modeling and simulation results are in excellent agreement. It is shown that the inclusion of an intrinsic surface layer in the channel causes a voltage shift in the drain current, in accordance with experimental observations. For the depletion charge, an analytical expression principally identical to that for the uniformly doped body case is found with a simple replacement of the surface potential, psi(s), by the potential at the interface between the intrinsic surface layer and the doped substrate, psi(xi).

  • 49. Persson, S
    et al.
    Hellberg, Per-Erik
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    A charge sheet model for MOSFETs with an abrupt retrograde channel - Part II. Charges and intrinsic capacitances2002In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 46, no 12, p. 2217-2225Article in journal (Refereed)
    Abstract [en]

    The 16 intrinsic capacitance components related to the gate, source, drain and depletion charges are examined for MOSFETs with an ideally abrupt retrograde doping profile in the channel, based on the analytical solutions for the drain current and body charge in the preceding paper. Though lengthy and complex in their final mathematical expressions, analytical solutions for the capacitances can be obtained. The validity of the analytical solutions is confirmed by comparing the modeling results with simulation data obtained using numerical calculations. The inclusion of an intrinsic surface layer in the channel merely causes a simple voltage shift for the capacitances that are not associated with the depletion charge or body bias, similarly to the variation of the drain current shown in the preceding paper. For the capacitances that are related to the depletion charge or body bias, there is not only a parallel voltage shift with an amount commensurate to the shift in drain current as well as in the other capacitances, but also a decrease in their values. This decrease depends on the thickness of the intrinsic surface layer and it amounts to 25% for a surface layer of 30 nm thickness.

  • 50. Persson, S.
    et al.
    Wu, D.
    Hellström, Per-Erik
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Zhang, Shi-Li
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments (pre-2005), Microelectronics and Information Technology, IMIT.
    Quantifying hole mobility degradation in pMOSFETs with a strained-Si0.7Ge0.3 surface-channel under an ALD TiN/Al2O3/HfAlOx/Al2O3 gate stack2004In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 48, no 5, p. 721-729Article in journal (Refereed)
    Abstract [en]

    An appreciable mobility enhancement up to 35% is found in p-channel MOSFETs with a stramed-Si0.7Ge0.3 surface-channel under an ALD TiN/Al2O3/HfAlOchi/Al2O3 gate stack, as compared to a Si-channel reference transistor under an identical gate stack. A distorted effective mobility curve with a slow mobility roll-off at low vertical electric field is however extracted for the Si0.7Ge0.3 devices following the standard split-CV measurement procedure. A high density of interface traps on the order of 10(12) cm(-2) eV(-1) is found in these Si0.7Ge0.3 devices using charge-pumping measurements. Thus, this distortion is attributed partly to trapping of a significant fraction of the inversion carriers at the interface between the high-kappa dielectrics and the Si0.7Ge0.3 channel, thus defeating the validity of the usual formulation for mobility extraction. By taking into account the trapped carriers that are detectable by the split-CV measurement but do not contribute to the drain conductance, a corrected effective mobility curve is obtained. The distortion of the effective mobility curve is nonetheless mainly due to mobility degradation as a result of Coulomb scattering of the mobile channel carriers by the charged interface defects, i.e. charged traps or trapped carriers that remain charged.

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