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  • 1.
    Gudmundsson, Valur
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Hellström, Per-Erik
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Luo, Jun
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Lu, Jun
    Zhang, Shi-Li
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Östling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Fully Depleted UTB and Trigate N-Channel MOSFETs Featuring Low-Temperature PtSi Schottky-Barrier Contacts With Dopant Segregation2009Ingår i: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 30, nr 5, s. 541-543Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    Schottky-barrier source/drain (SB-S/D) presents a promising solution to reducing parasitic resistance for device architectures such as fully depleted UTB, trigate, or FinFET. In this letter, a low-temperature process (<= 700 degrees C) with PtSi-based S/D is examined for the fabrication of n-type UTB and trigate FETs on SOI substrate (t(si) = 30 nm). Dopant segregation with As was used to achieve the n-type behavior at implantation doses of 1 (.) 10(15) and 5. 10(15) cm(-2). Similar results were found for UTB devices with both doses, but trigate devices with the larger dose exhibited higher on currents and smaller process variation than their lower dose counterparts.

  • 2. Lu, Jun
    et al.
    Luo, Jun
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Zhang, Shi-Li
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Östling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Hultman, Lars
    Kinetics and morphology of Ni1-xPtx-silicide epitaxy on Si(001)Ingår i: Electrochemical and solid-state letters, ISSN 1099-0062, E-ISSN 1944-8775Artikel i tidskrift (Övrigt vetenskapligt)
  • 3. Lu, Jun
    et al.
    Luo, Jun
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Materialfysik.
    Zhang, Shi-Li
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Materialfysik.
    Östling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT).
    Hultman, Lars
    On Epitaxy of Ultrathin Ni1-xPtx Silicide Films on Si(001)2010Ingår i: Electrochemical and solid-state letters, ISSN 1099-0062, E-ISSN 1944-8775, Vol. 13, nr 10, s. H360-H362Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    Epitaxial Ni(Pt)Si2-y (y < 1) films readily grow upon thermal treatment of 2 nm thick Ni and Ni0.96Pt0.04 films deposited on Si(001). For annealing at 500 degrees C, the films are 5.4-5.6 nm thick with 61-70 mu cm in resistivity. At 750 degrees C, the epitaxial Ni(Pt)Si2-y films become 6.1-6.2 nm thick with a resistivity of 42-44 mu cm. Structural analysis reveals twins, facet wedges, and thickness inhomogeneities in the films grown at 500 degrees C. For higher temperature, an almost defect-free NiSi2-y film with a flat and sharp interface is formed. The presence of Pt makes the aforementioned imperfections more persistent.

  • 4.
    Luo, Jun
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Integration of metallic source/drain contacts in MOSFET technology2010Doktorsavhandling, sammanläggning (Övrigt vetenskapligt)
    Abstract [en]

    The continuous and aggressive downscaling of conventional CMOS devices has been driving the vast growth of ICs over the last few decades. As the CMOS downscaling approaches the fundamental limits, novel device architectures such as metallic source/drain Schottky barrier MOSFET (SB-MOSFET) and SB-FinFET are probably needed to further push the ultimate downscaling. The ultimate goal of this thesis is to integrate metallic Ni1-xPtx silicide (x=0~1) source/drain into SB-MOSFET and SB-FinFET, with an emphasis on both material and processing issues related to the integration of Ni1-xPtx silicides towards competitive devices.

    First, the effects of both carbon (C) and nitrogen (N) on the formation and on the Schottky barrier height (SBH) of NiSi are studied. The presence of both C and N is found to improve the poor thermal stability of NiSi significantly. The present work also explores dopant segregation (DS) using B and As for the NiSi/Si contact system. The effects of C and N implantation into the Si substrate prior to the NiSi formation are examined, and it is found that the presence of C yields positive effects in helping reduce the effective SBH to 0.1-0.2 eV for both conduction polarities. In order to unveil the mechanism of SBH tuning by DS, the variation of specific contact resistivity between silicide and Si substrates by DS is monitored. The formation of a thin interfacial dipole layer at silicide/Si interface is confirmed to be the reason of SBH modification.

    Second, a systematic experimental study is performed for Ni1-xPtx silicide (x=0~1) films aiming at the integration into SB-MOSFET. A distinct behavior is found for the formation of Ni silicide films. Epitaxially aligned NiSi2-y films readily grow and exhibit extraordinary morphological stability up to 800 oC when the thickness of deposited Ni (tNi) <4 nm. Polycrystalline NiSi films form and tend to agglomerate at lower temperatures for thinner films for tNi≥4 nm. Such a distinct annealing behavior is absent for the formation of Pt silicide films with all thicknesses of deposited Pt. The addition of Pt into Ni supports the above observations. Surface energy is discussed as the cause responsible for the distinct behavior in phase formation and morphological stability.

    Finally, three different Ni-SALICIDE schemes towards a controllable NiSi-based metallic source/drain process without severe lateral encroachment of NiSi are carried out. All of them are found to be effective in controlling the lateral encroachment. Combined with DS technology, both n- and p-types of NiSi source/drain SB-MOSFETs with excellent performance are fabricated successfully. By using the reproducible sidewall transfer lithography (STL) technology developed at KTH, PtSi source/drain SB-FinFET is also realized in this thesis. With As DS, the characteristics of PtSi source/drain SB-FinFET are transformed from p-type to n-type. This thesis work places Ni1-xPtx (x=0~1) silicides SB-MOSFETs as a competitive candidate for future CMOS technology.

  • 5.
    Luo, Jun
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Qiu, Zhi-Jun
    Deng, Jian
    Zhao, Chao
    Li, Junfeng
    Wang, Wenwu
    Chen, Dapeng
    Wu, Dongping
    Östling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Ye, Tianchun
    Zhang, Shi-Li
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Effects of carbon pre-silicidation implant into Si substrate on NiSi2014Ingår i: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 120, s. 178-181Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    In this work, the effects of carbon pre-silicidation implant into Si(1 0 0) substrate on NiSi were investigated. NiSi films with carbon pre-silicidation implant to different doses were characterized by means of sheet resistance measurements, X-ray diffraction, scanning electron microscopy (SEM), planar view transmission electron microscopy (TEM) and second ion mass spectroscopy (SIMS). The presence of C is found to indeed significantly improve the thermal stability of NiSi as well as tends to change the preferred orientations of polycrystalline NiSi. The homogeneously distributed C at NiSi grain boundaries and C peak at NiSi/Si interface is ascribed to the improved thermal stability of NiSi. More importantly, the dose of carbon pre-silicidation implant also plays a key role in the formation of NiSi, which is suggested not to exceed a critical value about 5 x 10(15) cm(-2) in practical application in accordance with the results achieved in this work.

  • 6.
    Luo, Jun
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Qiu, Zhi-Jun
    Deng, Jian
    Zhao, Chao
    Li, Junfeng
    Wang, Wenwu
    Chen, Dapeng
    Wu, Dongping
    Östling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Ye, Tianchun
    Zhang, Shi-Li
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Variation of Schottky barrier height induced by dopant segregation monitored by contact resistivity measurements2014Ingår i: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 120, s. 174-177Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    Change of contact resistivity (rho(c)) is monitored for evaluation of Schottky barrier height (SBH) variation induced by dopant segregation (DS). This method is particularly advantageous for metal-semiconductor contacts of small SBH, as it neither requires low-temperature measurement needed in current-voltage characterization of Schottky diodes nor is affected by reverse leakage current often troubling capacitance-voltage characterization. With PtSi contact to both n- and p-type diffusion regions, and the use of opposite or alike dopants implant into pre-formed PtSi films followed by drive-in anneal at different temperatures to induce DS at PtSi/Si interface, the formation of interfacial dipole is confirmed as the responsible cause for modification of effective SBHs thus the increase or decrease of rho(c). A tentative explanation for the change of contact resistivity based on interfacial dipole theory is provided in this work. Influences and interplay of interfacial dipole and space charge on effective SBH are also discussed.

  • 7.
    Luo, Jun
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Qiu, Zhijun
    Zha, Chaolin
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Zhang, Zhen
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Wu, Dongping
    Lu, Jun
    Åkerman, Johan
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Östling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Hultman, Lars
    Zhang, Shi-Li
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Surface-energy triggered phase formation and epitaxy in nanometer-thick Ni1-xPtx silicide films2010Ingår i: Applied Physics Letters, ISSN 0003-6951, E-ISSN 1077-3118, Vol. 96, nr 3Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    The formation of ultrathin silicide films of Ni1-xPtx at 450-850 degrees C is reported. Without Pt (x=0) and for t(Ni)< 4 nm, epitaxially aligned NiSi2-y films readily grow and exhibit extraordinary morphological stability up to 800 degrees C. For t(Ni)>= 4 nm, polycrystalline NiSi films form and agglomerate at lower temperatures for thinner films. Without Ni (x=1) and for t(Pt)=1-20 nm, the annealing behavior of the resulting PtSi films follows that for the NiSi films. The results for Ni1-xPtx of other compositions support the above observations. Surface energy is discussed as the cause responsible for the distinct behavior in phase formation and morphological stability.

  • 8.
    Luo, Jun
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Qiu, Zhi-Jun
    Zhang, David Wei
    Hellström, Per-Erik
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Östrling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Zhang, Shi-Li
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Effect of carbon on Schottky barrier heights of NiSi modified by dopant segregation2009Ingår i: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 30, nr 6Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    The presence of carbon at the interface between NiSi and Si has been found to participate in the process of modification of effective Schottky barrier heights using the dopant segregation (DS) method. Carbon alone results in an increased ∅bn from 0.7 to above 0.9 eV. Boron diffusion in NiSi is inhibited by carbon, and no B-DS at the NiSi/Si interface occurs below 600°C. Above this temperature, B-DS at this interface is evident thus keeping φbn high. The presence of interfacial carbon leads to an increased interfacial As concentration resulting in beneficial effects in tuning ∅bp above 1.0 eV by As-DS.

  • 9.
    Luo, Jun
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT).
    Qiu, Zhi-Jun
    Zhang, David Wei
    Hellström, Per-Erik
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Östling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Zhang, Shi-Li
    Effects of Carbon on Schottky Barrier Heights of NiSi Modified by Dopant Segregation2009Ingår i: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 30, nr 6, s. 608-610Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    The presence of carbon at the interface between NiSi and Si has been found to participate in the process of modification of effective Schottky barrier heights using the dopant segregation (DS) method. Carbon alone results in an increased phi(bn) from 0.7 to above 0.9 eV. Boron diffusion in NiSi is inhibited by carbon, and no B-DS at the NiSi/Si interface occurs below 600 degrees C. Above this temperature, B-DS at this interface is evident thus keeping phi(bn) high. The presence of interfacial carbon leads to an increased interfacial As concentration resulting in beneficial effects in tuning phi(bn) above 1.0 eV by As-DS.

  • 10.
    Luo, Jun
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Qiu, Zhi-Jun
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Zhang, Zhen
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Östling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Zhang, Shi-Li
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Interaction of NiSi with dopants for metallic source/drain applications2010Ingår i: Journal of Vacuum Science & Technology B, ISSN 1071-1023, E-ISSN 1520-8567, Vol. 28, nr 1, s. C1I1-C1I11Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    This work has a focus on NiSi as a possible metallic contact for aggressively scaled complementary metal oxide semiconductor devices. As the bulk work function of NiSi lies close to the middle of Si bandgap, the Schottky barrier height (SBH) of NiSi is rather large for both electron (similar to 0.65 eV) and hole (similar to 0.45 eV). Different approaches have therefore been intensively investigated in the literature aiming at reducing the effective SBH: dopant segregation (DS), surface passivation (SP), and alloying, in order to improve the carrier injection into the conduction channel of a field-effect transistor. The present work explores DS using B and As for the NiSi/Si contact system. The effects of C and N implantation into Si substrate prior to the NiSi formation are examined, and it is found that the presence of C yields positive effects in helping reduce the effective SBH to 0.1-0.2 eV for both conduction polarities. A combined use of DS or SP with alloying could be considered for more effective control of effective SBH, but an examination of undesired compound formation and its probable consequences is necessary. Furthermore, an analysis of the metal silicides that have a small "intrinsic" SBH reveals that only a very small number of them are of practical interest as most of the silicides require either a high formation temperature or possess a high specific resistivity.

  • 11.
    Luo, Jun
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Wu, Dongping
    State Key Lab of ASIC and Systems, School of Microelectronics, Fudan University, Shanghai .
    Qiu, Zhijun
    State Key Lab of ASIC and Systems, School of Microelectronics, Fudan University, Shanghai .
    Lu, Jun
    Department of Physics, Chemistry and Biology, Linköping University.
    Hultman, Lars
    Department of Physics, Chemistry and Biology, Linköping University.
    Östling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Zhang, Shi-Li
    State Key Lab of ASIC and Systems, School of Microelectronics, Fudan University, Shanghai .
    On Different Process Schemes for MOSFETs With a Controllable NiSi-Based Metallic Source/Drain2011Ingår i: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 58, nr 7, s. 1898-1906Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    This paper focuses on different silicidation schemes toward a controllable NiSi-based metallic source/drain (MSD) process with restricted lateral encroachment of NiSi. These schemes include thickness control of Ni, Ni-Pt alloying, and two-step annealing. Experimental results show that all the three process schemes can give rise to effective control of lateral encroachment during Ni silicidation. By controlling t(Ni), NiSi-based MSD metal-oxide-semiconductor field-effect transistors (MOSFETs) of gate length L-G = 55 nm are readily realized on ultrathin-body silicon-on-insulator substrates with 20-nm surface Si thickness. With the aid of dopant segregation (DS) to modifying the Schottky barrier heights of NiSi, both n- and p-type MSD MOSFETs show significant performance improvement, compared to reference devices without DS.

  • 12.
    Luo, Jun
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Wu, Donping
    Qiu, Zhijun
    Lu, Jun
    Hultman, Lars
    Östling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    On different process schemes for a controllable NiSi-based metallic source/drainMOSFETs with dopant segregationIngår i: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646Artikel i tidskrift (Övrigt vetenskapligt)
  • 13.
    Tian, Jie
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och tillämpad fysik, MAP.
    Yan, Wei
    Liu, Yazhao
    Luo, Jun
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och tillämpad fysik, MAP.
    Zhang, Daozhong
    Li, Zhiyuan
    Qiu, Min
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och tillämpad fysik, MAP.
    Optical Quality Improvement of Si Photonic Devices Fabricated by Focused-Ion-Beam Milling2009Ingår i: Journal of Lightwave Technology, ISSN 0733-8724, E-ISSN 1558-2213, Vol. 27, nr 19, s. 4306-4310Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    Focused-ion-beam directly milling strategy was used to fabricate photonic resonators on crystalline silicon-on-insulator substrate. In order to reduce damages such as implanting ions, amorphous layers and re-deposition process which are induced by the ions, a sacrificed silica layer was used as an etching mask and a silicon thermal oxidation process was performed. The transmission spectra of both photonic crystal cavities and micro-ring resonators were measured. The resulting data demonstrate that the Q factors are significantly improved after the oxidation treatment.

  • 14.
    Östling, Mikael
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Luo, Jun
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Gudmundsson, Valur
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Hellström, Per Erik
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Malm, Bengt Gunnar
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Integration of metallic source/drain (MSD) contacts in nanoscaled CMOS technology2010Ingår i: ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings, 2010, s. 41-45Konferensbidrag (Refereegranskat)
    Abstract [en]

    An overview of metallic source/drain (MSD) contacts in nanoscaled MOSFET technology is provided in this paper. MSD contacts offer several benefits for nanoscaled CMOS, i.e., extremely low S/D parasitic resistance, abruptly sharp junctions between S/D and channel and preferably low temperature processing. In order to achieve high performance MSD MOSFETs, many design parameters such as Schottky barrier height (SBH), S/D to gate underlap, top Si layer thickness, oxide thickness and so on should be optimized. Recently, a lot of efforts have been invested in MSD MOSFETs based on Pt- and Ni-silicide implementation and several promising results have been reported in literature. The experimental work as well as the results of Monte Carlo simulations by this research team and by other research teams is discussed in this paper. It will be shown that the present results place MSD MOSFETs as a competitive candidate for future generations of CMOS technology.

  • 15.
    Östling, Mikael
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Luo, Jun
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Gudmundsson, Valur
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Hellström, Per-Erik
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Malm, B. Gunnar
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Nanoscaling of MOSFETs and the implementation of Schottky barrier S/D contacts2010Ingår i: 2010 27th International Conference on Microelectronics, MIEL 2010 - Proceedings, 2010, s. 9-13Konferensbidrag (Refereegranskat)
    Abstract [en]

    This paper provides an overview of metallic source/drain (MSD) Schottky-barrier (SB) MOSFET technology. This technology offers several benefits for scaling CMOS, i.e., extremely low S/D series resistance, sharp junctions from S/D to channel and low temperature processing. A successful implementation of this technology needs to overcome new obstacles such as Schottky barrier height (SBH) engineering and careful control of SALICIDE process. Device design factors such as S/D to gate underlap, Si film thickness and oxide thickness affect device performance owing to their effects on the SB width. Recently, we have invested a lot of efforts on Pt- and Ni-silicide MSD SB-MOSFETs and achieved some promising results. The present work, together with the work of other groups in this field, places silicide MSD SB-MOSFETs as a competitive candidate for future generations of CMOS technology.

  • 16.
    Östling, Mikael
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Luo, Jun Hang
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Gudmundsson, Valur
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Hellström, Per-Erik
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Malm, Gunnar
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Technology challenges in silicon devices beyond the 16 nm node2011Ingår i: Proceedings of the 18th International Conference: Mixed Design of Integrated Circuits and Systems, MIXDES 2011, 2011, s. 27-31Konferensbidrag (Refereegranskat)
    Abstract [en]

    An overview of metallic source/drain (MSD) contacts in nano-scaled MOSFET technology is provided in this paper. MSD contacts offer several benefits for nano-scaled CMOS, i.e. extremely low S/D parasitic resistance, abruptly sharp junctions between S/D and channel and preferably low temperature processing. In order to achieve high performance MSD MOSFETs, many design parameters such as Schottky barrier height (SBH), S/D to gate underlap, top Si layer thickness, oxide thickness should be optimized. Recently, efforts have been invested in MSD MOSFETs based on Pt- and Ni-silicide implementation and several promising results have been reported in literature. The experimental work as well as the results of Monte Carlo simulations by several investigators, including the authors, is discussed in this paper. It will be shown that the present results place MSD MOSFETs as a competitive candidate for future generations of CMOS technology.

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