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  • 1.
    Erdal, Suvar
    et al.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Haralson, Erik
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Radamson, Henry H.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Wang, Yong-Bin
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Malm, B. Gunnar
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    High frequency performance of SiGeCHBTs with selectively & non-selectively grown collector2004In: Physica Scripta, ISSN 0031-8949, E-ISSN 1402-4896, Vol. T114, p. 138-141Article in journal (Refereed)
    Abstract [en]

    Two high-frequency heterojunction bipolar transistor (HBT) architectures based on SiGeC have been fabricated and characterized. Different collector designs were applied either by using selective epitaxial growth doped with phosphorous or by non-selective epitaxial growth doped with arsenic. Both designs have a non-selectively deposited SiGeC base doped with boron and a poly-crystalline emitter doped with phosphorous. Both HBT designs exhibit similar electrical characteristics with a peak DC current gain of around 1600 and a BVCEO of 1.8V. The cut-off frequency (f(T)) and maximum frequency of oscillation (f(max)) vary from 40-80 GHz and 15-30 GHz, respectively, depending on lateral design relations. Good high frequency performance for a device with a selectively grown collector is demonstrated for the first time.

  • 2.
    Haralson, Erik
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Suvar, E.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Malm, B. Gunnar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Radamson, Henry
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Wang, Yong-Bin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    NiSi integration in a non-selective base SiGeCHBT process2005In: Materials Science in Semiconductor Processing, ISSN 1369-8001, E-ISSN 1873-4081, Vol. 8, no 03-jan, p. 245-248Article in journal (Refereed)
    Abstract [en]

    A self-aligned nickel silicide (salicide) process is integrated into a non-selective base SiGeC HBT process. The device features a unique, fully silicided base region that grows laterally under the emitter pedestal. This Ni(SiGe) formed in this base region was found to have a resistivity of 23-24 muOmega cm. A difference in the silicide thickness between the boron-doped SiGeC extrinsic base region and the in situ phosphorous-doped emitter region is observed and further analyzed and confirmed with a blanket wafer silicide study. The silicided device exhibited a current gain of 64 and HF device performance of 39 and 32 GHz for f(t) and f(MAX), respectively.

  • 3.
    Haralson, Erik
    et al.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Suvar, Erdal
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Malm, B. Gunnar
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Radamson, Henry H.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Wang, Yong-Bin
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    The effect of C on emitter-base design for a single-polysilicon SiGe: C HBT with an IDP emitter2004In: Applied Surface Science, ISSN 0169-4332, E-ISSN 1873-5584, Vol. 224, no 1-4, p. 330-335Article in journal (Refereed)
    Abstract [en]

    A differential epitaxy SiGe:C heterojunction bipolar junction transistor (HBT) design is reported and used to study the effect of carbon on junction formation as well as the effect of lateral design parameters on ac and dc performance. The device exhibits a high current gain (beta) of 1700 and a BVCEO of 1.8 V. The peak cutoff frequency (f(T)) and maximum oscillation frequency (f(MAX)) are 73 and 17 GHz, respectively. The effect of emitter overlap on f(T) was minimal, but it had a strong impact on dc performance. LOCOS opening size strongly impacted both ac and dc performance. In addition, the effect of carbon, base cap thickness, and rapid thermal anneal (RTA) temperature on the emitter-base (E-B) junction formation was studied.

  • 4.
    Hållstedt, Julius
    et al.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Suvar, Erdal
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Menon, Cyril
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Hellström, Per-Erik
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Radamson, Henry H.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Methods to reduce the loading effect in selective and non-selective epitaxial growth of sigec layers2004In: Materials Science & Engineering: B. Solid-state Materials for Advanced Technology, ISSN 0921-5107, E-ISSN 1873-4944, Vol. 109, no 03-jan, p. 122-126Article in journal (Refereed)
    Abstract [en]

    Various methods to reduce both global and local loading effect during non-selective and selective epitaxial growth of Si1-x-yGexCy (0.09 less than or equal to x less than or equal to 0.28 and 0 less than or equal to y less than or equal to 0.01) layers have been proposed. Evaluation of the proposed solutions for issues such as defect generation and the possibility for integration in device structures have been performed. The key point in these methods is based on reduction of surface diffusion of the adsorbed species on the oxide. In non-selective epitaxy, this was achieved by introducing a thin silicon polycrystalline seed layer on the oxide prior to Si1-x-yGexCy deposition. The thickness of this seed layer had a crucial role on both the global and local loading effect, and also on the epitaxial quality. Higher carbon content (y greater than or equal to 0.006) in Si1-x-yGexCy layers had no noticeable influence on the loading effect, however, the defect density was clearly increased in these layers. In selective epitaxy case, introducing square polycrystalline Si stripes around the oxide openings acting as diffusion barriers have reduced the loading effect effectively. Meanwhile, using Si nitride stripes showed no visible effect on Si1-x-yGexCy layer profile. Further decrease in loading effect can be performed by increasing the HCl partial pressure during epitaxy. Chemical-mechanical polishing (CMP) was performed to remove the polycrystalline stripe on the oxide.

  • 5.
    Hållstedt, Julius
    et al.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Suvar, Erdal
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Persson, P. O. Å.
    Department of Physics, Thin Film Physics Division, Linköpings Universitet.
    Hultman, L.
    Department of Physics, Thin Film Physics Division, Linköpings Universitet.
    Wang, Yong-Bin
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Radamson, Henry H.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Growth of high quality epitaxial Si1-x-yGexCy layers by using chemical vapor deposition2004In: Applied Surface Science, ISSN 0169-4332, E-ISSN 1873-5584, Applied Surface Science, Vol. 224, no 1-4, p. 46-50Article in journal (Refereed)
    Abstract [en]

    The epitaxial quality of non-selective and selective deposition of Si1-x-yGexCy (0 less than or equal to x less than or equal to 0.30, 0 less than or equal to y less than or equal to 0.02) layers has been optimized by using high-resolution reciprocal lattice mapping (HRRLM). The main goal was to incorporate a high amount of substitutional carbon atoms in Si or Si1-xGex matrix without creating defects. The carbon incorporation behavior was explained by chemical and kinetic effects of the reactant gases during epitaxial process. Although high quality epitaxial Si1-yCy layers can be deposited, lower electron mobility compared to Si layers was observed.

  • 6.
    Isheden, Christian
    et al.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Radamson, Henry H.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Suvar, Erdal
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Hellström, Per-Erik
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Formation of shallow junctions by HCl-based Si etch followed by selective epitaxy of B-doped Si1-xGex in RPCVD2004In: Journal of the Electrochemical Society, ISSN 0013-4651, E-ISSN 1945-7111, Vol. 151, no 6, p. C365-C368Article in journal (Refereed)
    Abstract [en]

    Formation of shallow source/drain junctions by using HCl-based Si etch followed by selective deposition of in situ heavily B-doped SiGe in a reduced pressure chemical vapor deposition reactor is presented. The etching parameters were optimized to obtain a smooth surface prior to deposition of the SiGe layers. In the epitaxy process, SiGe layers with a resistivity of 5 x 10(-4) Omega cm were obtained by tuning the partial pressure of the B and Ge precursors. A problem with selectivity in the epitaxy step was encountered when combing the etch and growth processes, but a practical solution is presented. Integration issues such as loading effect, pile-up, and defect generation have also been investigated.

  • 7.
    Radamson, Henry
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Hållstedt, Julius
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Suvar, Erdal
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Menon, Cyril
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Improvement in epitaxial quality of selectively grown Si1-xGex layers with low pattern sensitivity for CMOS applications2005In: Materials Science in Semiconductor Processing, ISSN 1369-8001, E-ISSN 1873-4081, Vol. 8, no 03-jan, p. 25-30Article in journal (Refereed)
    Abstract [en]

    The selective growth of Si1-xGex structures (0.09<x<0.29) on patterned substrates aimed for channel layer application in metal oxide semiconductor field effect transistor (MOSFET) structures by using chemical vapor deposition (CVD) has been investigated. By optimizing the growth parameters, the surface roughness of these structures was improved and layers with better epitaxial quality was obtained. Furthermore, two methods are proposed to decrease the pattern-dependency of the epitaxy process. The key point in these methods is based on the reduction of surface diffusion of the adsorbed species on the oxide. This can be obtained by introducing square polycrystalline Si stripes around the oxide openings acting as diffusion barriers. Subsequently, chemical. mechanical polishing was performed to remove the polycrystalline stripe on the oxide. Evaluation of the proposed solution's for issues such as defect generation and the possibility for integration in device structures have also been performed.

  • 8.
    Suvar, Erdal
    et al.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Haralson, Erik
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Hållstedt, Julius
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Radamson, Henry H.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    As- or P-doped Si layers grown by RPCVD for emitter application in SiGeCHBTs2004In: Physica Scripta, ISSN 0031-8949, E-ISSN 1402-4896, Vol. T114, p. 34-36Article in journal (Refereed)
    Abstract [en]

    A new module for the emitter formation in a bipolar transistor is presented. Arsenic- or phosphorus-doped polycrystalline silicon layer for the emitter formation is deposited in a reduced pressure chemical vapor deposition reactor using silane as the silicon source gas. Characteristics such as the carrier concentration, conductivity, surface morphology, and thermal stability of the polycrystalline-silicon layer as well as the influence this layer has on a SiGeC transistor structure during the drive-in step area studied. The active carrier concentration of the as-grown sample is strongly dependent on the deposition temperature, especially arsenic doped layers which exhibit more than one order of magnitude difference. However, the carrier concentration for the As- or P-doped layer were comparable to that of a standard in-situ doped poly-crystalline layer after a dopant activation at 925 degrees C for 10s.

  • 9.
    Suvar, Erdal
    et al.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Haralson, Erik
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Radamson, Henry H.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Wang, Yong-Bin
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Grahn, Jan V.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Malm, B. Gunnar
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Characterization of leakage current related to a selectively grown collector in SiGeC heterojunction bipolar transistor structure2004In: Applied Surface Science, ISSN 0169-4332, E-ISSN 1873-5584, Vol. 224, no 1-4, p. 336-340Article in journal (Refereed)
    Abstract [en]

    Sources of base-collector and base-emitter leakage current in a SiGeC-based heterojunction bipolar transistor (HBT) with a selectively grown and chemical-mechanical polished (CMP) collector are discussed. Transmission electron microscopy and electrical measurement have been applied to investigate the leakage current. It has been demonstrated that the edge-located defects generated by selective epitaxy process are the origin of the junction leakage.

1 - 9 of 9
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