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  • 1.
    Attarzadeh Niaki, Seyed Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Mikulcak, Marcus
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Robino, Francesco
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    A Framework for Characterizing Predictable Platform Templates2014Report (Other academic)
    Abstract [en]

    The design of real-time multiprocessor systems is a very costly and time-consuming process due to the need for extensive verification efforts. Genericcorrect-by-construction system-level design flows, targeting predictable plat-forms, would help to tackle this problem. Unfortunately, because system-level design problems are formulated monolithically, existing methods areeither not powerful enough to perform efficient design space exploration,over-customized to a specific class of platforms, or do not allow to be ex-tended with new heuristics and solving methods, which makes their reusedifficult. We present a formal framework to explicitly capture and character-ize predictable platform templates that can be used to formulate a genericdesign flow for real-time streaming applications in a composable manner. Aproof-of-concept implementation of such a flow is performed and used to mapa JPEG encoder application onto an FPGA-based time-predictable platform.

  • 2.
    Attarzadeh Niaki, Seyed Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Mikulcak, Marcus
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Automatic Generation of Virtual Prototypes from Platform Templates2015In: Languages, Design Methods, and Tools for Electronic System Design: Selected Contributions from FDL 2013 / [ed] Marie-Minerve Louërat, Torsten Maehne, Switzerland: Springer, 2015, p. 147-166Chapter in book (Refereed)
    Abstract [en]

    Virtual Prototypes (VPs) provide an early development platform to embedded software designers when the hardware is not ready yet and allows them to explore the design space of a system, both from the software and architecture perspective. However, automatic generation of VPs is not straightforward because several aspects such as the validity of the generated platforms and the timing of the components needs to be considered. To address this problem, based on a framework which characterizes predictable platform templates, we propose a method for automated generation of VPs which is integrated into a combined design flow consisting of analytic and simulation based design-space exploration. Using our approach the valid TLM-2.0-based simulated VP instances with timing annotation can be generated automatically and used for further development of the system in the design flow. We have demonstrated the potential of our method by designing a JPEG encoder system.

  • 3.
    Attarzadeh Niaki, Seyed Hosein
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Mikulcak, Marcus
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Sander, Ingo
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Rapid virtual prototyping of real-time systems using predictable platform characterizations2013In: Forum on Specification Design Languages (FDL) 2013, 2013, p. 6646652-Conference paper (Refereed)
    Abstract [en]

    Virtual prototypes (VPs) provide an early development platform to embedded software designers when the hardware is not ready yet and allows them to explore the design space of a system, both from the software and architecture perspective. However, automatic generation of VPs is not straightforward because several aspects such as the validity of the generated platforms and the timing of the components needs to be considered. To address this problem, based on a framework which characterizes predictable platform templates, we propose a method for automated generation of VPs which is integrated into a combined design flow consisting of analytic and simulation based design-space exploration. Using our approach the valid TLM 2.0-based simulated VP instances with timing annotation can be generated automatically and used for further development of the system in the design flow. We have demonstrated the potential of our method by designing a JPEG encoder system.

1 - 3 of 3
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