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• 1.
KTH, School of Electrical Engineering and Computer Science (EECS), Electrical Engineering, Electronics and Embedded systems.
KTH, School of Electrical Engineering and Computer Science (EECS), Electrical Engineering, Electronics and Embedded systems, Integrated devices and circuits. KTH, School of Electrical Engineering and Computer Science (EECS), Electrical Engineering, Electronics and Embedded systems. KTH, School of Electrical Engineering and Computer Science (EECS), Electrical Engineering, Electronics and Embedded systems, Integrated devices and circuits. KTH, School of Electrical Engineering and Computer Science (EECS), Electrical Engineering, Electronics and Embedded systems, Integrated devices and circuits. KTH, School of Electrical Engineering and Computer Science (EECS), Electrical Engineering, Electronics and Embedded systems.
A Silicon Carbide 256 Pixel UV Image Sensor Array Operating at 400 degrees C2020In: IEEE Journal of the Electron Devices Society, ISSN 2168-6734, Vol. 8, no 1, p. 116-121Article in journal (Refereed)

An image sensor based on wide band gap silicon carbide (SiC) has the merits of high temperature operation and ultraviolet (UV) detection. To realize a SiC-based image sensor the challenge of opto-electronic on-chip integration of SiC photodetectors and digital electronic circuits must be addressed. Here, we demonstrate a novel SiC image sensor based on our in-house bipolar technology. The sensing part has 256 ( $16\times 16$ ) pixels. The digital circuit part for row and column selection contains two 4-to-16 decoders and one 8-bit counter. The digital circuits are designed in transistor-transistor logic (TTL). The entire circuit has 1959 transistors. It is the first demonstration of SiC opto-electronic on-chip integration. The function of the image sensor up to 400 degrees C has been verified by taking photos of the spatial patterns masked from UV light. The image sensor would play a significant role in UV photography, which has important applications in astronomy, clinics, combustion detection and art.

• 2.
KTH, School of Electrical Engineering and Computer Science (EECS), Electrical Engineering, Electronics and Embedded systems.
Applications of Si1-xGex alloys for Ge devices and monolithic 3D integration2020Doctoral thesis, comprehensive summary (Other academic)

As the semiconductor industry moves beyond the 10 nm node, power consumption constraints and reduction of the negative impact of parasitic elements become important. Silicon germanium (Si1−xGex) alloys have been used to amplify the performance of Si based devices and integrated circuits (ICs) for decades. Selective epitaxial growth of heavily doped Si and/or Si1−xGex is commonly employed to reduce the effect of parasitic resistance. Reducing the supply voltage leads to lower dynamic power consumption in complementary metal-oxide-semiconductor (CMOS) technology. Monolithic three-dimensional integration (M3D) is a technology that employs vertical stacking of the device tiers. This approach reduces the wiring length, effectively reducing interconnect delay, load capacitance and ultimately reducing the power consumption. Among the integration challenges M3D is facing, one can distinguish the available thermal budget for fabrication, the crystalline quality of the device active layer and finally the actual device or circuit performance.Germanium channel devices can benefit M3D integration. Germanium metal-oxide-semiconductor field-effect transistors (MOSFETs) can be fabricated at significantly lower temperatures than Si. In addition, they potentially can have higher performance compared to Si due to the superior electron and hole mobilities of Ge. Active layer transfer of crystalline quality layers is a key step in a M3D fabrication flow. Direct wafer bonding techniques offerthe possibility to transfer a Ge layer on a patterned wafer. This thesis studies the various applications of Si1−xGex films in M3D. An initial implementation of an in situ doped Si1−xGex film on silicon-on-insulator (SOI) and germanium substrates is first presented. A Si1−xGex film isgrown selectively on SOI substrates to be used as a contact electrode on Si nanowire biosensors. On Ge bulk substrates, in situdoped Si1−xGex is epitaxially grown to form p+-n junctions. The junction leakage current and the mechanisms at play are studied. The analysis ofthe junction performance provides insights on the junction leakage mechanisms,an important issue for the implementation of in situ doped Si1−xGex in M3D. A low temperature germanium-on-insulator (GOI) fabrication flow based on room temperature wafer bonding and etch back is presented in this work. The method suggested in the thesis produces high quality, crystalline Ge device layers with excellent uniformity. The thesis also reports on the development and integration of Si1−xGex in the GOI fabrication as an etch stop layer, enabling the stability of the layer transfer process. Finally this thesis presents Ge p-channel field-effect transistor (PFET) devices fabricated on the previously developed GOI substrates.The technologies presented in this thesis can be integrated in large scale Ge device fabrication. The low temperature GOI and Ge PFET fabrication methods are very well suited for sequential device fabrication. The processes and applications presented in this thesis meet the current thermal budget, device performance and active layer transfer demands for M3D technology.

• 3.
Inst Telecomunicacoes, Campus Univ Santiago, P-3810193 Aveiro, Portugal.;Univ Aveiro, Dept Elect Telecommun & Informat, P-3810193 Aveiro, Portugal..
Univ Aveiro, Dept Mat & Ceram Engn, CICECO, P-3810193 Aveiro, Portugal.. Ctr Univ FEI, Phys Dept, Sao Bernardo Do Campo, SP, Brazil.. Smart Diamond Technol Lda, Aveiro, Portugal.. Univ Aveiro, Dept Mat & Ceram Engn, CICECO, P-3810193 Aveiro, Portugal.. Univ Aveiro, Dept Mat & Ceram Engn, CICECO, P-3810193 Aveiro, Portugal.. Hasselt Univ, Inst Mat Res IMO, Wetenschapspk 1, B-3590 Diepenbeek, Belgium.;IMEC VZW, IMOMEC, Wetenschapspk 1, B-3590 Diepenbeek, Belgium.. Hasselt Univ, Inst Mat Res IMO, Wetenschapspk 1, B-3590 Diepenbeek, Belgium.;IMEC VZW, IMOMEC, Wetenschapspk 1, B-3590 Diepenbeek, Belgium.. KTH, School of Electrical Engineering and Computer Science (EECS), Electrical Engineering, Electronics and Embedded systems. Inst Telecomunicacoes, Campus Univ Santiago, P-3810193 Aveiro, Portugal.;Univ Aveiro, Ctr Mech Technol & Automat, P-3810193 Aveiro, Portugal..
Deposition of diamond films on single crystalline silicon carbide substrates2020In: Diamond and related materials, ISSN 0925-9635, E-ISSN 1879-0062, Vol. 101, article id 107625Article in journal (Refereed)

Silicon carbide (SiC) is a wide band gap material that is slowly but steadily asserting itself as a reliable alternative to silicon (Si) for high temperature electronics applications, in particular for the electrical vehicles industry. The passivation of SiC devices with diamond films is expected to decrease leakage currents and avoid premature breakdown of the devices, leading to more efficient devices. However, for an efficient passivation the interface between both materials needs to be virtually void free and high quality diamond films are required from the first stages of growth. In order to evaluate the impact of the deposition and seeding parameters in the properties of the deposits, diamond films were deposited on SiC substrates by hot filament chemical vapor deposition (HFCVD). Before the seeding step the substrates were exposed to diamond growth conditions (pretreatment PT) and seeding was performed with a solution of detonation nanodiamond (DND) particles and with 6-12 and 40-60 mu m grit. Diamond films were then grown at different temperatures and with different methane concentrations and the deposits were observed in a scanning electron microscope (SEM); their quality was assessed with Raman spectroscopy.

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