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  • 2751.
    Öberg, Johnny
    et al.
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    Ellervee, Peeter
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    Jantsch, Axel
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    Hemani, Ahmed
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    BABBAGE - A Rule basedtool for synthesis of hardware systems1994Ingår i: Proc. of IEEE NORCHIP’94, 1994Konferensbidrag (Refereegranskat)
  • 2752.
    Öberg, Johnny
    et al.
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    Ellervee, Peeter
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    Kumar, Anshul
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    Hemani, Ahmed
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    Comparing Conventional HLS with Grammar-Based Hardware Synthesis: A Case Study1997Ingår i: Proc. of IEEE NORCHIP, 1997Konferensbidrag (Refereegranskat)
  • 2753.
    Öberg, Johnny
    et al.
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    Kumar, Anshul
    Hemani, Ahmed
    Synthesis of Exception Handling in Grammar-based Hardware Synthesis1998Ingår i: Proceedings of APCHDL-98, 1998, s. 135-140Konferensbidrag (Refereegranskat)
  • 2754.
    Öberg, Johnny
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Mellander, Roger
    ABB Research.
    Zahrai, Said
    ABB Research.
    The ABB NoC: A Deflective Routing 2x2 Mesh NoC targeted for Xilinx FPGAs2008Ingår i: Proceedings of FPGAWorld 2008, 2008Konferensbidrag (Refereegranskat)
  • 2755.
    Öberg, Johnny
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektroniksystem.
    Robino, Francesco
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektroniksystem.
    A NoC Generator for the Sea-of-Cores Era2011Ingår i: Proceedings of FPGAWorld 2011, 2011Konferensbidrag (Refereegranskat)
  • 2756.
    Öberg, Johnny
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektroniksystem.
    Robino, Francesco
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektroniksystem.
    A NoC system generator for the Sea-of-Cores era2011Ingår i: 8th FPGAworld Conference - Academic Proceedings 2011, 2011, s. 35-40Konferensbidrag (Refereegranskat)
    Abstract [en]

    Multi-core systems are getting bigger. The number of cores is doubling every 18 months, in corollary with the reformulated Moore's law. Soon, the number of cores that can be integrated together in a system will be so large, that it is appropriate to talk about a new SoC design paradigm, the Sea-of-Cores era. This development will not end, even when CMOS cannot be made any smaller. Instead, with the development of Through-Silicon Vias (TSVs), chips will be stacked in 3D, promising continuous scaling for a very long time ahead. As systems grow, programming and debugging of them will become harder. Methods for generating the systems from higher-level specifications will be necessary to manage design complexity. Also, there will be so many processors to be programmed, that the SW also will have to be automatically generated and distributed, much in the same way as a synthesis and place & route tool is doing today for HW. In this paper, we present a NoC generator that can generate an arbitrarily large Multi-core platform from an XML configuration file, targeted for single-chip FPGA platforms. The NoC generator also generates a device driver prototype together with a small test program that can be used as a template for creating larger programs.

  • 2757.
    Öhrström, Magnus
    et al.
    KTH, Skolan för elektro- och systemteknik (EES), Elektriska energisystem.
    Geidl, M.
    Söder, Lennart
    KTH, Skolan för elektro- och systemteknik (EES), Elektriska energisystem.
    Andersson, G.
    Evaluation of travelling wave based protection schemes for implementation in medium voltage distribution systems2005Ingår i: IEE Conference Publication, 2005, Vol. 3, nr 2005-11034, s. 481-483Konferensbidrag (Refereegranskat)
    Abstract [en]

    This paper investigates travelling wave based protection schemes developed for high voltage transmission systems and their adaptation to medium voltage distribution networks in order to enable ultra high speed relaying (within a quarter of a cycle of the power frequency) on a medium voltage level. After different travelling wave algorithms are evaluated using simple test systems, they are applied to an industrial power system where fault detection within one millisecond is required. Difficulties that arise from typical characteristics of medium voltage distribution systems are outlined and requirements to measurement and signal processing systems are discussed.

  • 2758.
    Öhrström, Magnus
    et al.
    KTH, Tidigare Institutioner, Elektrotekniska system.
    Söder, Lennart
    KTH, Tidigare Institutioner.
    A comparison of two methods used for voltage dip characterization2003Ingår i: 2003 IEEE Bologna Power Tech Conference Proceedings, 2003, Vol. 4, s. 6-Konferensbidrag (Refereegranskat)
    Abstract [en]

    The quality of delivered power is a topic that has received quite a lot of attention lately. Among power quality related phenomena, voltage dips (or sags) have been identified as a great concern for especially industrial customers. In order to estimate the severity of a voltage dip, several methods for characterization has been developed. A straightforward method of voltage dip characterization is to calculate the lowest magnitude of the RMS-voltage during the dip. Another method characterizes a voltage dip by the so-called characteristic voltage. These two methods are applied to measured voltage dips at a Swedish steel factory. This study shows that the two methods give similar results. Hence, characterization of voltage dips by using RMS-voltages can be a good measure of the severity of a dip even though more sophisticated methods exist.

  • 2759.
    Öhrström, Magnus
    et al.
    KTH, Tidigare Institutioner, Elektrotekniska system.
    Söder, Lennart
    KTH, Tidigare Institutioner.
    Fast fault detection for power distribution systems2002Ingår i: Proceedings of the IASTED conference Power and Energy systems, 2002Konferensbidrag (Refereegranskat)
    Abstract [en]

    This paper discusses aspects of fault detection for power systems which require fault removal before the first peak current after the initiation of a short circuit fault. Firstly, speed of fault detection is discussed and in particular how “fast” fault detection should be interpreted in this paper. Secondly, apparatus that would benefit from fast fault de tection is described and in what kind of power systems it could be used. Finally, algorithms appropriate for use in fast fault detection are discussed and analysed in a case study with respect to fault current levels, and requirements for fault detection equipment including detection time and sampling rate.

  • 2760.
    Österlind, Magnus
    et al.
    KTH, Skolan för elektro- och systemteknik (EES), Industriella informations- och styrsystem.
    Johnson, Pontus
    KTH, Skolan för elektro- och systemteknik (EES), Industriella informations- och styrsystem.
    Karnati, Kiran
    KTH, Skolan för elektro- och systemteknik (EES), Industriella informations- och styrsystem.
    Lagerström, Robert
    KTH, Skolan för elektro- och systemteknik (EES), Industriella informations- och styrsystem.
    Välja, Margus
    KTH, Skolan för elektro- och systemteknik (EES), Industriella informations- och styrsystem.
    Enterprise Architecture Evaluation using Utility theory2013Ingår i: Proceedings 17th IEEE International Enterprise Distributed Object Computing Conference Workshops (EDOCW), IEEE Computer Society, 2013, s. 347-351Konferensbidrag (Refereegranskat)
    Abstract [en]

    With the increase in the number of quality attributes (e.g. cost, availability, reusability), that are being considered in the process of enterprise architecture analysis, the decision maker needs a systematic way to balance these attributes against each other to obtain the best possible architecture. Utility theory addresses this need by providing methods for numerical representation of preferences of a stakeholder involved in a decision-making process. In this paper utility theory key concepts are explained with examples. The process of calculating the utility metric, which reflects stake holder's set of preferences to select the most preferred architecture scenario is explained. The paper provides an explanation of how utility theory can be applied in enterprise architecture models which are meta-object facility compliant. This paper concludes by an example comparing two quality attributes on two architecture scenarios using utility theory and calculating the decision maker's overall utility metric across both quality attributes is provided. This shows the applicability of utility theory on architecture scenario analysis with multiple quality attributes.

  • 2761.
    Österlind, Magnus
    et al.
    KTH, Skolan för elektro- och systemteknik (EES), Industriella informations- och styrsystem.
    Lagerström, Robert
    KTH, Skolan för elektro- och systemteknik (EES), Industriella informations- och styrsystem.
    Rosell, Peter
    KTH, Skolan för elektro- och systemteknik (EES), Industriella informations- och styrsystem.
    Assessing modifiability in application services using enterprise architecture models - A case study2012Ingår i: Trends in Enterprise Architecture Research and Practice-Driven Research on Enterprise Transformation, 2012, s. 162-181Konferensbidrag (Refereegranskat)
    Abstract [en]

    Enterprise architecture has become an established discipline for business and IT management. Architecture models constitute the core of the approach and serve the purpose of making the complexities of the real world understandable and manageable to humans. EA ideally aids the stakeholders of the enterprise to effectively plan, design, document, and communicate IT and business related issues, i.e. they provide decision support for the stakeholders. However, few initiatives explicitly state how one can analyze the EA models in order to aid decision-making. One approach that does focus on analysis is the Enterprise Architecture Modifiability Analysis Tool. This paper suggests changes to this tool and presents a case study in which these have been tested. The results indicate that the changes improved the tool. Also, based on the outcome of the case study further improvement possibilities are suggested.

  • 2762.
    Östling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Nanoscaled SiGe based MOSETs2010Ingår i: Conference Proceedings - The 8th International Conference on Advanced Semiconductor Devices and Microsystems, ASDAM 2010, 2010, s. 1-8Konferensbidrag (Refereegranskat)
    Abstract [en]

    This paper presents an overview of the technological challenges facing the future scaling of device dimensions needed to meet the performance scaling in accordance with Moore's law. A number of performance boosters have to be introduced in order to keep up with the expected performance gain in each new technology node. The introduction of strain engineering is an important feature as well as the implementation of high-k dielectrics. From the 32 nm node and forward there is an urgent search for a fundamental breakthrough to achieve low access resistance to the drain and source areas. This paper will focus to a large extent on this latter area and discuss metallic source/drain (MSD) contacts in nanoscaled MOSFET technology. MSD contacts offer extremely low S/D parasitic resistance, abruptly sharp junctions between S/D and channel and preferably low temperature processing. Recently great efforts have been achieved on Pt- and Ni-silicide implementation. A conclusion is that MSD MOSFETs are competitive candidates for future generations of CMOS technology.

  • 2763.
    Östling, Mikael
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Domeij, Martin
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Zaring, Carina
    Konstantinov, A.
    Ghandi, Reza
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Buono, Benedotto
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Hallen, Anders
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Zetterling, Carl-Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    SiC bipolar power transistors: Design and technology issues for ultimate performance2010Ingår i: 2010 MRS Spring Meeting, 2010, Vol. 1246, s. 175-186Konferensbidrag (Refereegranskat)
    Abstract [en]

    Silicon carbide (SiC) semiconductor devices for high power are becoming more mature and are now commercially available as discrete devices. Schottky diodes have been on the market since a few years but also bipolar junction transistors (BJTs), JFETs and MOSFETs are now reaching the market. The interest is rapidly growing for these devices in high power and high temperature applications. The BJTs have low conduction losses, fast switching capability, operate in normally-off mode, have high radiation hardness, and can handle high power density.

    This paper will review the current state of the art in active switching device performance with special emphasis on BJTs. Device performance has been demonstrated over a wide temperature interval. A very important feature in high power switch applications is the low on-resistance of a device. Better material quality and epi processes suppress the amount of basal plane dislocations to avoid stacking fault formation generated during high current injection. This has long been a concern for bipolar SiC devices but several research reports and long term reliability measurements of pn-junctions show that the bipolar degradation problem can be solved by a fine-tuned epitaxial technique. A discussion on surface passivation control is included. Finally, an example of a power switching module is given also demonstrating the excellent paralleling capability of BJTs.

  • 2764.
    Östling, Mikael
    et al.
    KTH, Tidigare Institutioner, Mikroelektronik och informationsteknik, IMIT.
    Koo, Sang-Mo
    KTH, Tidigare Institutioner, Mikroelektronik och informationsteknik, IMIT.
    Lee, Sang-Kwon
    KTH, Tidigare Institutioner, Mikroelektronik och informationsteknik, IMIT.
    Zetterling, Carl Mikael
    KTH, Tidigare Institutioner, Mikroelektronik och informationsteknik, IMIT.
    Grishin, Alex
    KTH, Tidigare Institutioner, Mikroelektronik och informationsteknik, IMIT.
    Thin films in silicon carbide semiconductor devices2004Ingår i: Proceedings of SPIE, the International Society for Optical Engineering, ISSN 0277-786X, E-ISSN 1996-756X, Vol. 5774, s. 5-10Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    Silicon carbide (SiC) semiconductor devices have been established during the last decade as very useful high power, high speed and high temperature devices because of their inherent outstanding semiconductor materials properties. Due to its large band gap, SiC possesses a very high breakdown field and low intrinsic carrier concentration which according makes A high voltage and high temperature operation possible. SiC is also suitable for high frequency device applications, because of the high saturation drift velocity and low permittivity. Thin film technology for various functions in the devices has been heavily researched. Suitable thin film technologies for Ohmic and low-resistive contact formation, passivation and new functionality utilizing ferroelectric materials have been developed. In ferroelectrics, the spontaneous polarization can be switched by an externally applied electric field, and thus are attractive for non-volatile memory and sensor applications. A novel integration of Junction-MOSFETs (JMOSFETs) and Nonvolatile FETs (NVFETs) on a single 4H-SiC substrate is realized. SiC JMOSFET controls the drain current effectively from the buried junction Late thereby allowing for a constant current level at elevated temperatures. SiC NVFET has similar functions with non-volatile memory capability due to ferroelectric gate stack. which operated up to 300degreesC with memory function retained up to 200degreesC.

  • 2765.
    Östling, Mikael
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Koo, S.-M.
    Domeij, Martin
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Danielsson, Erik
    Zetterling, Carl-Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    SiC Device Technologies2005Ingår i: Encyclopedia of RF and Microwave Engineering: vol 5 / [ed] Kai Cang, Wiley-Blackwell, 2005, 1, s. 4613-Kapitel i bok, del av antologi (Refereegranskat)
  • 2766.
    Östling, Mikael
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Luo, Jun
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Gudmundsson, Valur
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Hellström, Per Erik
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Malm, Bengt Gunnar
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Integration of metallic source/drain (MSD) contacts in nanoscaled CMOS technology2010Ingår i: ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings, 2010, s. 41-45Konferensbidrag (Refereegranskat)
    Abstract [en]

    An overview of metallic source/drain (MSD) contacts in nanoscaled MOSFET technology is provided in this paper. MSD contacts offer several benefits for nanoscaled CMOS, i.e., extremely low S/D parasitic resistance, abruptly sharp junctions between S/D and channel and preferably low temperature processing. In order to achieve high performance MSD MOSFETs, many design parameters such as Schottky barrier height (SBH), S/D to gate underlap, top Si layer thickness, oxide thickness and so on should be optimized. Recently, a lot of efforts have been invested in MSD MOSFETs based on Pt- and Ni-silicide implementation and several promising results have been reported in literature. The experimental work as well as the results of Monte Carlo simulations by this research team and by other research teams is discussed in this paper. It will be shown that the present results place MSD MOSFETs as a competitive candidate for future generations of CMOS technology.

  • 2767.
    Östling, Mikael
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Luo, Jun
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Gudmundsson, Valur
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Hellström, Per-Erik
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Malm, B. Gunnar
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Nanoscaling of MOSFETs and the implementation of Schottky barrier S/D contacts2010Ingår i: 2010 27th International Conference on Microelectronics, MIEL 2010 - Proceedings, 2010, s. 9-13Konferensbidrag (Refereegranskat)
    Abstract [en]

    This paper provides an overview of metallic source/drain (MSD) Schottky-barrier (SB) MOSFET technology. This technology offers several benefits for scaling CMOS, i.e., extremely low S/D series resistance, sharp junctions from S/D to channel and low temperature processing. A successful implementation of this technology needs to overcome new obstacles such as Schottky barrier height (SBH) engineering and careful control of SALICIDE process. Device design factors such as S/D to gate underlap, Si film thickness and oxide thickness affect device performance owing to their effects on the SB width. Recently, we have invested a lot of efforts on Pt- and Ni-silicide MSD SB-MOSFETs and achieved some promising results. The present work, together with the work of other groups in this field, places silicide MSD SB-MOSFETs as a competitive candidate for future generations of CMOS technology.

  • 2768.
    Östling, Mikael
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Malm, B. Gunnar
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Von Haartman, Martin
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Hållstedt, Julius
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Hellström, Per-Erik
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Zhang, Shili
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Critical technology issues for deca-nanometer MOSFETs2007Ingår i: ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings, 2007, s. 27-30Konferensbidrag (Refereegranskat)
    Abstract [en]

    An overview of critical integration issues for future generation MOSFETs towards 10 nm gate length is presented. Novel materials and innovative structures are discussed. The need for high-K gate dielectrics and a metal gate electrode is discussed. Different techniques for strain-enhanced mobility are discussed.

  • 2769.
    Östlund, Stefan
    et al.
    KTH, Skolan för elektro- och systemteknik (EES), Elektriska maskiner och effektelektronik (stängd 20110930). KTH, Skolan för teknikvetenskap (SCI), Centra, Järnvägsgruppen, JVG.
    Gustafsson, Anders
    Buhrkall, Lars
    Skoglund, Martin
    Condition Monitoring of Pantograph Contact Strip2008Ingår i: IET Seminar Digest, 2008Konferensbidrag (Refereegranskat)
    Abstract [en]

    A common issue in electric railway operation is the wearofthepantographcontact strip. This is especially pronounced with ice or rime frost on the overhead line that causes arcing between the contact strip and the contact wire. To monitor the contact strip it is possible to utilise the fact that arcing between the contact strip and the overhead line generates a DC component in the AC locomotive current. The paper presents a method forconditionbased maintenanceofthe contact strip. The wearofthe contact strip is predicted bymonitoringthe running distanceofthepantographas well as the DC componentofthe locomotive current. To evaluate the method, measurements have been carried out on a Swedish Re locomotive during winterconditions.

  • 2770.
    Östman, Kristina
    et al.
    KTH, Skolan för elektro- och systemteknik (EES), Elektriska energisystem.
    Hesamzadeh, Mohammad
    KTH, Skolan för elektro- och systemteknik (EES), Elektriska energisystem.
    Pricing electric-power transmission: The Swedish methodology and a new approach2013Ingår i: 2013 4th IEEE/PES Innovative Smart Grid Technologies Europe (ISGT EUROPE), IEEE , 2013, s. 6695429-Konferensbidrag (Refereegranskat)
    Abstract [en]

    Electricity systems are changing rapidly worldwide, and transmission pricing needs to adapt. As renewable energy production increases, it is vital that the costs for transmission are recovered while recognising the special characteristics of different energy sources. In this paper, a new transmission pricing approach is presented and compared to the approach currently used in Sweden. By calculating nodal transmission tariffs based on marginal transmission costs and incorporating uncertainty in demand and generation, the new approach caters for a changing electricity system. To assess their impacts on renewable energy production, the two methodologies are applied to a case study mimicking the Swedish system with an increased wind power penetration. The results show that location and generation type can strongly influence the transmission tariffs, and that charging renewable energy producers less could be a least-cost option.

  • 2771.
    Östman, Kristina
    et al.
    KTH, Skolan för elektro- och systemteknik (EES), Elektriska energisystem.
    Hesamzadeh, Mohammad
    KTH, Skolan för elektro- och systemteknik (EES), Elektriska energisystem.
    The suitability of current transmission pricing systems for increased renewable energy production2013Ingår i: 2013 IEEE Power and Energy Society General Meeting (PES), IEEE , 2013, s. 6672674-Konferensbidrag (Refereegranskat)
    Abstract [en]

    As renewable electricity generation increases around the world, transmission networks are forced to adapt. The growing need for balancing services and long transmission distances lead to increased costs, which somehow need to be recovered. This paper considers the transmission pricing methodologies in four countries and assesses them against optimal pricing methodologies as defined in academic literature. The countries Australia, Spain, Great Britain and Sweden, with their different renewable energy potential and energy policies, provide a suitable snapshot of transmission pricing today. While they boast different levels of maturity, none of the methodologies fulfill all identified conditions for effective transmission prices with increased amounts of renewable electricity.

  • 2772.
    Östman, Kristina
    et al.
    KTH, Skolan för elektro- och systemteknik (EES), Elektriska energisystem.
    Hesamzadeh, Mohammad Reza
    KTH, Skolan för elektro- och systemteknik (EES), Elektriska energisystem.
    Transmission pricing in interconnected systems - A case study of the Nordic countries2014Ingår i: ENERGYCON 2014 - IEEE International Energy Conference, IEEE Computer Society, 2014, s. 1480-1486Konferensbidrag (Refereegranskat)
    Abstract [en]

    With renewable energy production increasing around the world, there is a growing need for interconnection to balance intermittent supply. This cross-border trade of electricity requires navigating in multiple regulatory regimes and market designs, not least when it comes to transmission pricing. By considering the Nordic countries as a case study, this paper investigates the impact of different transmission pricing regimes on investment decisions for renewable energy production. A generation expansion problem for wind power is simulated with the current transmission prices in Sweden, Finland, Norway, and Denmark applied, along with a baseline case with no transmission pricing differences, to achieve a quantitative comparison. The importance of coherent transmission pricing is demonstrated through the large discrepancy in wind power investments resulting from the two cases studied.

53545556 2751 - 2772 av 2772
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