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  • 51.
    Katic, Janko
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rodriguez, Saul
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Analysis of Dead Time Losses in Energy Harvesting Boost Converters for Implantable Biosensors2014Inngår i: NORCHIP, 2014, IEEE conference proceedings, 2014, s. 1-4Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Efficiency of an ultra-low power energy harvesting dc-dc converter depends on its losses and the power consumption of the control circuit. Unlike other loss mechanisms, losses related to dead times have not been thoroughly studied. Therefore, in most cases these losses are not adequately suppressed. This paper investigates dead time losses and their impact on the overall system efficiency. Simple expressions for fast estimation of dead time losses are derived. Analysis shows that in many applications where high voltage conversions are required, such as implantable biosensors, the efficiency reduction due to these losses can easily exceed 2%. The analysis is validated using an adaptive dead time circuit which minimizes the associated losses and improves the overall system efficiency according to the calculated values.

  • 52.
    Lemme, Max C.
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Vaziri, Sam
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Smith, Anderson D.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Li, Jiantong
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rodriguez, Saul
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Östling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Graphene for More Moore and More Than Moore applications2012Inngår i: IEEE Silicon Nanoelectronics Workshop, SNW, IEEE , 2012, s. 6243322-Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Graphene has caught the attention of the electronic device community as a potential future option for More Moore and More Than Moore devices and applications. This is owed to its remarkable material properties, which include ballistic conductance over several hundred nanometers or charge carrier mobilities of several 100.000 cm 2/Vs in pristine graphene. Furthermore, standard CMOS technology may be applied to graphene in order to make devices. Integrated graphene devices, however, are performance limited by scattering due to defects in the graphene and its dielectric environment [1, 2] and high contact resistance [3, 4]. In addition, graphene has no energy band gap (Figure 1) and hence graphene MOSFETs (GFETs) cannot be switched off, but instead show ambipolar behaviour [5]. This has steered interest away from logic to analog radio frequency (RF) applications [6, 7]. This talk will systematically compare the expected RF performance of realistic GFETs with current silicon CMOS technology [8]. GFETs slightly lag behind in maximum cut-off frequency F T,max (Figure 2) up to a carrier mobility of 3000 cm 2/Vs, where they can achieve similar RF performance as 65nm silicon FETs. While a strongly nonlinear voltage-dependent gate capacitance inherently limits performance, other parasitics such as contact resistance are expected to be optimized as GFET process technology improves.

  • 53.
    Leonida, Angeliki
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Mutgan, Orhan Hazar
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    A Digitally Calibrated CT Quadrature Bandpass Sigma Delta ADC for Wimax/LTE2009Inngår i: 2009 International Symposium on Signals, Circuits and Systems, ISSCS 2009, IEEE , 2009, s. 105-108Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper presents a digitally calibrated Continuous Time Quadrature Sigma Delta ADC for WiMAX/LTE narrow bands. The proposed architecture employs a 5(th) order 2-bit quadrature bandpass Sigma Delta modulator. Dithering and Adaptive Line Enhancement techniques are combined to compensate for mismatch errors in the I/Q paths. The proposed calibration technique introduces no complexity in the ADC design and can be used online. The simulation results show an improvement of 16.75dB in SINAD and 34.42dB in Image Rejection, when a +/- 30% variation in the loop active RC filter coefficients is introduced in the behavioral model.

  • 54.
    Manolopoulos, Vasileios
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Papadimitratos, Panos
    KTH, Skolan för elektro- och systemteknik (EES), Kommunikationsnät.
    Tao, Sha
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Securing smartphone based ITS2011Inngår i: ITST 2011: Proceedings of the 11th International Conference on ITS Telecommunications, 2011, 2011, s. 201-206Konferansepaper (Fagfellevurdert)
    Abstract [en]

    GPS-equipped smartphones present several advantages for data acquisition in Intelligent Transportation Systems (ITS), compared to solutions that require a new communication infrastructure. However, there are still significant challenges to meet before deployment. Traffic information and location samples must be collected in a secure manner, to not jeopardize the system operation. Equally important, users must be assured about their privacy, notably the protection of information on their whereabouts. To address this two-fold problem, we propose extending the Generic Bootstrapping Architecture (GBA) with anonymous authentication. Identity and location information are protected and separated, and location samples cannot be linked to each other and to any specific user. Thus, our scheme protects users even in the case of a compromised ITS server. Initial evaluation results indicate the feasibility of our approach with off-the-self mobile platforms.

  • 55.
    Manolopoulos, Vasileios
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rodriguez, Saul
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Security and Privacy Issues in a GPS-enabled Mobile Application for Smart Traffic2010Inngår i: Proceedings of Smart Mobility Conference, 2010, 2010Konferansepaper (Fagfellevurdert)
  • 56.
    Manolopoulos, Vasileios
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Secure and Privacy Preserving Access to Location-Based Services in 3G-4G Mobile Devices: Extended Abstract & Presentation in The 1st Security Conference - Europe2010Konferansepaper (Annet vitenskapelig)
  • 57.
    Manolopoulos, Vasileios
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Tao, Sha
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rodriguez, Saul
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    MobiTraS: a mobile application for a Smart Traffic System2010Inngår i: Proceedings of the 8th IEEE International NEWCAS Conference, IEEE , 2010, s. 365-368Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Traffic monitoring systems deployed until now, use data collected mainly through fixed sensors. Advances on the modern mobile devices have made possible the development of S mart Traffic Systems, which use the traffic information g athered by the drivers' mobile devices to provide route guidance. Our work is focused on building a Real-Time Traffic Information System based mobile devices, which are used for both acquiring traffic information data and for providing feedback and guidance to drivers. This paper presents an analysis of the system, its security risks and requirements for dynamic route guidance together with possible solutions. A key component of the system is the mobile application that gathers data in an encrypted way and displays information to the users. The developed JavaME mobile application and its security/privacy features are also described.

  • 58.
    Manolopoulos, Vasileios
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Tao, Sha
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Papadimitratos, Panagiotis
    KTH, Skolan för elektro- och systemteknik (EES), Kommunikationsnät.
    Smartphone-based Traffic Information System for Sustainable Cities2012Inngår i: Mobile Computing and Communications Review, ISSN 1559-1662, Vol. 16, nr 4, s. 30-31Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    Traffic Information Systems (TISs) can play a significant role towards creating sustainable cities through improved traffic conditions. The collection of reliable and rich information with low cost is paramount. The use of smartphones carried by individuals for future implementations of TISs present several advantages compared to traditional solutions. This demo integrates our results from previous work addressing challenges on traffic estimation for urban road networks and on security and privacy protection for such TISs.

  • 59.
    Manolopoulos, Vasileios
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Tao, Sha
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Papadimitratos, Panos
    KTH, Skolan för elektro- och systemteknik (EES), Kommunikationsnät.
    Smartphone-based Traffic Information System for Sustainable Cities2012Konferansepaper (Fagfellevurdert)
  • 60.
    Morici, Andrea
    et al.
    Universita Politecnica delle Marche.
    Rodriguez, Saul
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Turchetti, C.
    Universita Politecnica delle Marche.
    A 3.6 mW 90 nm CMOS 2.4 GHz Receiver Front-End Design for IEEE 802.15.4 WSNs2009Inngår i: ISSCS 2009: INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS, VOLS 1 AND 2, PROCEEDINGS, New York: IEEE , 2009, s. 77-80Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In this paper a low-power design of an integrated RF receiver for Wireless Sensor Networks (WSNs) in 90nm CMOS technology is proposed. The receiver is IEEE 802.15.4 physical specifications compliant. It is designed to operate in ISM band at 2.45 GHz center frequency. Target devices for this kind of transceiver are low-cost battery powered smart embedded devices and sensors. The receiver is designed to reduce the count of external components in the final system, integrating on silicon the balun for single-ended to differential conversion. The receiver is composed of an inductorless Low Noise Amplifier (LNA), a buffer stage, I and Q passive mixers and Variable Gain Amplifiers (VGAs) that also act as second order filters. A novel integration of balun into the LNA is described. The system is designed to have direct conversion from RF to 6 MHz low-IF. Voltage supply is 1.2 V with a current consumption of 3 mA including necessary biasing networks, and the total power consumption is 3.6 mW. The complete voltage gain is more than 41.5 dB with a Noise Figure (NF) of 12.6 dB. The receiver layout exhibits an area of only 0.12 mm(2). Simulations are provided, including mismatch scenarios.

  • 61. Onet, Raul
    et al.
    Neag, Marius
    Kovacs, Istvan
    Topa, Marina Dana
    Rodriguez, Saul
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Compact Variable Gain Amplifier for a Multistandard WLAN/WiMAX/LTE Receiver2014Inngår i: IEEE Transactions on Circuits and Systems Part 1: Regular Papers, ISSN 1549-8328, E-ISSN 1558-0806, Vol. 61, nr 1, s. 247-257Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    This paper presents a novel single-stage VGA architecture that employs two Gm cells, a voltage-controlled current attenuator, resistors and capacitors. The gain can be changed in three large steps by using digital controls, and continuously within these steps. The VGA bandwidth and output-related IP3 and 1dBCP are independent of the gain setting; the bandwidth can be programmed through a digitally-controlled capacitor array placed at its output. The proposed architecture was employed to realize the VGA for a WLAN/WiMAX/LTE radio receiver. Die area and power consumption were reduced by implementing the two Gm cells with one instantiation of a high-linearity Gm-core and scaled outputs; also, the current attenuator was implemented with a simple differential current steering circuit; finally, the load resistors were also used to sense the output common-mode level. The VGA was fabricated in 0.15 um standard CMOS process. Measurement results show the gain varying between 5 dB to 30 dB and the max bandwidth surpasses 60 MHz; 11.14 nV/root Hz input referred noise; O1dBCP of 8.6 dBm while taking 4.2 mA from a 1.8 V supply; it settles within 20 ns after a min-max step-change of the gain; it occupies 0.05 mm(2).

  • 62.
    Onet, Raul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT). Tech Univ Cluj Napoca, Cluj Napoca 400027, Romania..
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT).
    Rodriguez, Saul
    KTH, Skolan för informations- och kommunikationsteknik (ICT).
    High-Purity and Wide-Range Signal Generator for Bioimpedance Spectroscopy2018Inngår i: IEEE Transactions on Circuits and Systems - II - Express Briefs, ISSN 1549-7747, E-ISSN 1558-3791, Vol. 65, nr 12, s. 1884-1888Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    This brief presents an integrated high-purity current signal generator (SG), part of a bioimpedance spectroscopy system that performs measurements in the frequency range from 1 kHz to 2 MHz, and it is able to measure bioimpedance values from 100 Omega to 1 M Omega. The SG is implemented in a 0.18-mu m CMOS process, it is powered by a single 1.8 V voltage source, and occupies a total area of 1.62 mm(2). It is able to generate single-frequency signals from 1 kHz to 2 MHz in 12 steps logarithmically spaced. High signal purity is achieved by using a second-order low-pass filter, with a bandwidth that can be programmed from 4 kHz to 8 MHz, in 12 points logarithmically spaced. The SG's power consumption varies from 750 mu W, at the lowest frequencies and gain, to 2.06 mW at the highest frequencies and gain. The output current levels can be modified from 130 nA up to 10 mu A in five programmable steps (9.5 dB per step). The SG achieves a spurious-free dynamic range larger than 40 dB while covering almost three decades in frequency. Such performance enables measurements with errors below 1%, as it is required for accurate bioimpedance measurements in many medical applications.

  • 63.
    Radu, M.
    et al.
    Rose Hulman Institute of Technology.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Berry, F.
    Rose Hulman Institute of Technology.
    Brorsson, Mats
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Work in progress - graduate exchange program in microelectronics system engineering2008Inngår i: FIE: 2008 IEEE FRONTIERS IN EDUCATION CONFERENCE, VOLS 1-3, 2008, s. 563-564Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In todaypsilas world, where new technologies emerge and advance at a very fast pace every year, many professional societies are discussing moving to a Master level program as a ldquofirst professional degreerdquo, anticipating graduates with advances skills for tomorrowpsilas demanding and advanced industry. In this context, the education at the master level is becoming more and more important. Another key issue in todaypsilas world is the impact of globalization process (needs of multinational corporations). The engineering education must address the impact of global hiring. The graduates entering the global workplace must possess besides the essential technical skills, also cultural, social and communication skills, enabling them to work and interact in international environments, bringing creativity and innovative development in multi-cultural groups. In this context, exchange programs between different universities, located in different countries and continents are flourishing, the universities trying to integrate study-abroad components in their programs. This paper is presenting as a ldquoWork in Progressrdquo, the first steps related to an exchange program at the graduate level in the area of Microelectronics, between two prestigious universities located in USA (Rose Hulman Institute of Technology, Terre Haute, IN) and Sweden (Royal Institute of Technology, Stockholm). A Joint Degree or Dual Degree program at the Master Level is envisaged in the near future.

  • 64.
    Ramesh, Chithrupa
    et al.
    KTH, Skolan för elektro- och systemteknik (EES), Reglerteknik.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT).
    Skoglund, Mikael
    KTH, Skolan för elektro- och systemteknik (EES), Kommunikationsteori.
    System co-optimization in wireless receiver design with TrACS2008Inngår i: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 57, nr 1-2, s. 117-127Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    System co-optimization of the analog receiver front end circuit and the digital baseband processing could enable receiver designs with lower power budgets, as the signal processing in the digital receiver is asymmetric across circuit topologies. This paper presents a simulation tool that could assist with such co-optimized designs. TrACS (Transceiver Architecture and Channel Simulator) is an RF/DSP co-simulator, capable of providing an application-specific system-level perspective to receiver design. The simulator is especially relevant in the context of energy-constrained wireless sensor node design, where the simulator's system perspective determines the compatibility of circuit topologies, modulation techniques and synchronization methods for various wireless scenarios. A few case studies are presented, which illustrate co-optimization of a ZigBEE receiver using TrACS.

  • 65.
    Ramesh, Chithrupa
    et al.
    KTH, Skolan för elektro- och systemteknik (EES), Kommunikationsteori.
    Rusu, Ana
    KTH, Skolan för elektro- och systemteknik (EES), Kommunikationsteori.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Skoglund, Mikael
    KTH, Skolan för elektro- och systemteknik (EES), Kommunikationsteori.
    TrACS: Transceiver Architecture and Wireless Channel Simulator2007Inngår i: SBCCI2007: 20TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, NEW YORK: ASSOC COMPUTING MACHINERY , 2007, s. 128-132Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper presents the design of a system-level simulator for radio receivers, including receiver circuits, in Matlab. The system level outlook offers a better characterization of circuit design, as the signal processing in the digital receiver is asymmetric across topologies. Also, circuit models in the simulator make it more precise and realistic compared to baseband models, which assume a single-step error-free down conversion. This interpretation is especially relevant in the design of energy-constrained wireless sensor network solutions. The simulator results for binary FSK in AWGN confirm the importance of system level simulation.

  • 66.
    Razzaghpour, Milad
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rodriguez, Saul
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Alarcon, Eduard
    Tech. Univ. of Catalunya.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    A Highly-Accurate Low-Power CMOS Potentiostat for Implantable BioSensors2011Inngår i: Biomedical Circuits and Systems Conference (BioCAS), 2011 IEEE, 2011, s. 5-8Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Current-mirror-based potentiostats suffer from sys-tematic and random errors causing offset, gain and linearityerror in reading out the sensor data. In this work, a newpotentiostat topology is proposed to eliminate the systematicerror via an error-cancellation loop. The loop takes advantageof an error-tracking amplifier connected to a transimpedanceamplifier with adjustable input common-mode voltage. Due tothe enhanced loop gain, the potentiostat is able to accuratelycopy the sensor current which will then be converted into theproportional voltage. Additionally, a theoretical discussion ofthe proposed topology is given and a thorough study on theeffect of random error sources is carried out. The potentiostat isdesigned and simulated in a 150nm CMOS process. The resultsverify a highly-linear highly-accurate performance in a low-noisecondition, while consuming only 32 μW.

  • 67.
    Razzaghpour, Milad
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Analog circuit optimization via a modified Imperialist Competitive Algorithm2011Inngår i: 2011 IEEE International Symposium on Circuits and Systems (ISCAS) / [ed] IEEE, IEEE conference proceedings, 2011, s. 2273-2276Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper proposes a novel evolutionary approach based on a modified Imperialist Competitive Algorithm for analog circuit design optimization. The original Imperialist Competitive Algorithm shows a low search ability in high-dimensional search spaces which is the case in optimization of analog circuits. The proposed tool addresses this problem by introducing a society-based algorithm with novel “selection” and “movement” operators. The tool is also equipped with a “mutation” operator increasing the search ability. A multi-dimensional analog design problem along with a mathematical benchmark are used to demonstrate its capability. Moreover, a thorough comparison between the original Imperialist Competitive Algorithm, the proposed algorithm and genetic algorithm as a reference is carried out. It will be revealed that the proposed algorithm is capable of exploring the cost space more efficiently resulting in better trade-offs between design objectives to reach better cost values. Additionally, the proposed algorithm is faster than the other under-test algorithms which is a key feature in simulation-based optimization procedures.

  • 68.
    Rodriguez, S.
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Ollmar, S.
    Waqar, M.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, A.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    A Batteryless Sensor ASIC for Implantable Bio-Impedance Applications2015Inngår i: IEEE Transactions on Biomedical Circuits and Systems, ISSN 1932-4545, E-ISSN 1940-9990Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    The measurement of the biological tissue’s electrical impedance is an active research field that has attracted a lot of attention during the last decades. Bio-impedances are closely related to a large variety of physiological conditions; therefore, they are useful for diagnosis and monitoring in many medical applications. Measuring living tissues, however, is a challenging task that poses countless technical and practical problems, in particular if the tissues need to be measured under the skin. This paper presents a bio-impedance sensor ASIC targeting a battery-free, miniature size, implantable device, which performs accurate 4-point complex impedance extraction in the frequency range from 2 kHz to 2 MHz. The ASIC is fabricated in 150 nm CMOS, has a size of 1.22 mm × 1.22 mm and consumes 165 μA from a 1.8 V power supply. The ASIC is embedded in a prototype which communicates with, and is powered by an external reader device through inductive coupling. The prototype is validated by measuring the impedances of different combinations of discrete components, measuring the electrochemical impedance of physiological solution, and performing ex vivo measurements on animal organs. The proposed ASIC is able to extract complex impedances with around 1 Ω resolution; therefore enabling accurate wireless tissue measurements.

  • 69.
    Rodriguez, Saul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Atallah, Jad G.
    Notre Dame University, Lebanon.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    A 2.3-GHz to 5.8-GHz CMOS receiver front-end for WiMAX/WLAN2010Inngår i: 2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings, 2010, s. 1068-1071Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper presents a wideband, direct-conversion radio receiver front-end that targets all WiMAX/WLAN bands from 2.3-GHz to 5.8-GHz. The receiver front-end is fabricated in 0.18-μm CMOS and achieves a gain of 25 dB, noise figure of 6 dB, and IIP3 of -6 dBm while dissipating 28 mW from a 1.8-V power supply. This performance is achieved while using only two integrated inductors.

  • 70.
    Rodriguez, Saul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Atallah, Jad G.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Zheng, Li-Rong
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    ARCHER: an automated RF-IC Rx front-end circuit design tool2009Inngår i: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 58, nr 3, s. 255-270Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    This paper presents a tool capable of automatically compiling the circuit of a direct-conversion receiver at the schematics level based on system specifications that include the frequency of operation, gain, noise figure, IIP2 and IIP3 linearity. The front-end of a direct-conversion receiver is built using inductive source degeneration (LSD) LNA and double-balanced source-degenerated Gilbert Cell mixers with charge injection. The tool uses power constrained noise and linearity optimization vector-space algorithms that automatically size the transistors, passive components, and find the optimum biasing points. The solution generated by the tool is automatically read by Agilent ADS where the blocks are easily fine-tuned and validated before layout. Case studies involving WiMAX, UMTS, GSM, Bluetooth and WLAN are presented to reveal the capabilities of the tool in reducing the design time.

  • 71.
    Rodriguez, Saul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    A 6.4mW, 1-3.5GHz current-mode receiver front-end with noise cancellation2011Inngår i: ESSCIRC (ESSCIRC), 2011 Proceedings of the, 2011, s. 235-238Konferansepaper (Fagfellevurdert)
    Abstract [en]

    A wideband receiver front-end which uses current-mode and noise cancellation techniques is presented. It is shown that the output impedance of the employed transconductance LNA can be very detrimental for the noise performance. The impact of the output impedance is quantified and considered in the design of a test circuit. An ESD protected prototype is fabricated in 150nm CMOS. Measurement results show a gain of 37dB, NF of 4dB and IIP3>-15dBm over a bandwidth of 1GHz-3.5GHz. The front-end consumes only 3.55mA from a 1.8V supply and its active area occupies 0.06mm2.

  • 72.
    Rodriguez, Saul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    A 65nm CMOS current-mode receiver front-end2011Inngår i: Circuits and Systems (ISCAS), 2011 IEEE International Symposium on, 2011, s. 530-533Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper briefly analyses the noise, bandwidth andlinearity performance advantage of nanometer CMOS currentmodecircuits compared to their voltage-mode counterparts andproposes a new current-mode receiver front-end targeting lowpowerwideband wireless applications. The proposed 65nmCMOS current-mode receiver front-end comprises a currentmodeLNA, and passive mixers, and covers all WiMAX/LTEbands from 700MHz to 5.8GHz. The front-end achieves an IIP3of 5 dBm, NF of 3.7-5dB while consuming 2.8mW from a 0.9Vpower supply. The analysis and simulation results show that thecurrent-mode techniques are very good candidates for wirelessapplications in low-voltage nanometer CMOS technologies.

  • 73.
    Rodriguez, Saul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    De la Rosa, Jose Maria
    Institute de Microelectronica de Sevilla IMSE-CNM.
    Overview of Carbon-Based Circuits and Systems2015Inngår i: Overview of Carbon-Based Circuits and Systems, IEEE , 2015, s. 2912-2915Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper presents an overview of the state of the art on carbon-based circuits and systems made up of carbon nanotubes and graphene transistors. A tutorial description of the most important devices and their potential benefits and limitations is given, trying to identify their suitability to implement analog and digital circuits and systems. Main electrical models reported so far for the design of carbon-based field-effect devices are surveyed, and the main sizing parameters required to implement such devices in practical integrated circuits are analyzed. The solutions proposed by cutting-edge integrated circuits and devices are discussed, identifying current trends, challenges and opportunities for the circuits and systems community1.

  • 74.
    Rodriguez, Saul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    4G CMOS Nanometer Receivers for Mobile Systems: Challenges and Solutions2009Inngår i: ISSCS 2009: INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS, VOLS 1 AND 2, PROCEEDINGS,, NEW YORK: IEEE , 2009, s. 73-76Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper presents the design challenges and solutions for 4G nanometer radio receivers for mobile devices. The specifications for the ZERO-IF/LOW-IF 4G receiver architecture are derived. Limitations due to the use of low-voltage nanometer technologies are described and novel circuit techniques, such as wideband noise reduction, inductoreless peaking, passive mixing, and low flicker noise amplification are proposed. Finally, a 1.2-V 90nm CMOS receiver front-end for the proposed WiMAX/LTE receiver is designed employing novel circuit techniques. The front-end covers 700 MHz - 6 GHz, providing a total gain of 34 dB, noise figure of 4 dB, flicker noise corner of 10 kHz, and a third order intercept point of -10dBm/0dBm, while consuming a total power of 10.2 mW.

  • 75.
    Rodriguez, Saul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    WiMAX/LTE Receiver Front-End in 90nm CMOS2009Inngår i: ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, NEW YORK: IEEE , 2009, s. 1036-1039Konferansepaper (Fagfellevurdert)
    Abstract [en]

    RFIC design using low-voltage nanometer CMOS technologies offers both advantages and challenges. This paper describes the limitations of using these technologies in receiver front-end design and proposes circuit solutions. Several techniques such as wideband noise reduction, inductoreless peaking, passive mixing, and low flicker noise amplification are reviewed and employed. A receiver front-end that covers 700MHz-6Ghz and supports the WiMAX/LTE standards is designed based on these circuit solutions. The front-end is designed using 1.2V 90nm CMOS and consumes a total power of 10.2mW. The total gain is 32dB, noise figure is 4dB, flicker noise corner is 10kHz, and third order intercept point is -10dBm/0dBm.

  • 76.
    Rodriguez, Saul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Zheng, LiRong
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    A Novel BiST and Calibration Technique for CMOS Down-Converters2008Inngår i: Circuits and Systems for Communications, 2008. ICCSC 2008. 4th IEEE International Conference on, 2008, s. 828-832Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper presents a new digital calibration methodology that allows CMOS Gilbert cell down-converters to meet their block specifications under large process, temperature and power supply variations. The calibration method consists of a novel built-in self test for direct conversion receivers that is able to measure the gain, and the second and third order intermodulation products of the mixer. A random optimizer algorithm based on a least square error function provides digital control of the biasing circuit and the loads of the mixer. The gain and IIP3 are calibrated by regulating the current of the input differential pair and by switching the loads. IIP2 calibration is achieved by using a novel technique that consists of offset voltages cancellation in the switching pairs. The technique is validated by calibrating a 0.18um CMOS mixer in several corner conditions.

  • 77.
    Rodriguez, Saul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Zheng, Li-Rong
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    CMOS RF mixer with digitally enhanced IIP22008Inngår i: Electronics Letters, ISSN 0013-5194, E-ISSN 1350-911X, Vol. 44, nr 2, s. 121-123Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    A new method to enhance the IIP2 of a double-balanced Gilbert cell mixer through digital calibration is presented. The IIP2 calibration method consists of offset voltage cancellation in the switching pairs. The effectiveness of the method has been proven by calibrating a 0.18 mu m CMOS mixer at several combinations of worst-case mismatch conditions and corners. It has been found that the calibrated mixer can achieve its targeted IIP2 specification even at large process, temperature, and power supply variations.

  • 78.
    Rodriguez, Saul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Zheng, Li-Rong
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Digital calibration of gain and linearity in a CMOS RF mixer2008Inngår i: Proceedings - IEEE International Symposium on Circuits and Systems, 2008, s. 1288-1291Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper presents a new digital calibration technique that allows CMOS Gilbert cell down-conversion mixers to meet their block specifications under large process, temperature and power supply variations. The gain and IIP3 are calibrated by regulating the current of the input differential pair and by switching the loads. IIP2 calibration is achieved by using a novel technique that consists of offset voltages cancellation in the switching pairs. The technique is tested by calibrating a 0.18um CMOS mixer in several corner conditions. It is found that by using this calibration technique, the Gilbert cell mixer can achieve yields comparable to digital circuits, hence making it amenable to AMS SoC integration.

  • 79.
    Rodriguez, Saul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Tao, Sha
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    An IIP2 Digital Calibration Technique for Passive CMOS Down-Converters2010Inngår i: IEEE INT SYMP CIRC SYST PROC, New York: IEEE , 2010, s. 825-828Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The IIP2 requirement in fully integrated direct-conversion receivers using FDD duplexing is prohibitively high and demands the use of an external filter in order to attenuate the leakage from the transmitter. This paper presents a digital calibration technique for passive CMOS down-converters that allows a direct conversion receiver achieve the requirements without external filtering. A Least-Mean-Square optimization algorithm is used in order to reduce the low-frequency second-order intermodulation product. The algorithm controls the digital calibration structures at the biasing of the passive mixer and adapts them until the second order intermodulation drops below the noise level. The method is tested by calibrating a 1.2-V 65nm CMOS passive mixer targeting UMTS/LTE applications at several corner conditions including worst case mismatches in the switching pairs.

  • 80.
    Rodriguez, Saul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Tao, Sha
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Advances in Technologies for Implantable Bioelectronics2016Inngår i: Wireless Medical Systems and Algorithms: Design and Applications / [ed] Pietro Salvo and Miguel Hernandez-Silveira, CRC Press, 2016, s. 3-20Kapittel i bok, del av antologi (Fagfellevurdert)
  • 81.
    Rodriguez, Saul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Vaziri, Sam
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Smith, Anderson
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Fregonese, Sebastien
    Östling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Lemme, Max C.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    A Comprehensive Graphene FET Model for Circuit Design2014Inngår i: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 61, nr 4, s. 1199-1206Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    During the last years, graphene-based field-effect transistors (GFETs) have shown outstanding RF performance; therefore, they have attracted considerable attention from the electronic devices and circuits communities. At the same time, analytical models that predict the electrical characteristics of GFETs have evolved rapidly. These models, however, have a complexity level that can only be handled with the help of a circuit simulator. On the other hand, analog circuit designers require simple models that enable them to carry out fast hand calculations, i.e., to create circuits using small-signal hybrid-pi models, calculate figures of merit, estimate gains, pole-zero positions, and so on. This paper presents a comprehensive GFET model that is simple enough for being used in hand calculations during circuit design and at the same time, it is accurate enough to capture the electrical characteristics of the devices in the operating regions of interest. Closed analytical expressions are provided for the drain current I-D, small-signal transconductance gain g(m), output resistance r(o), and parasitic capacitances C-gs and C-gd. In addition, figures of merit, such as intrinsic voltage gain A(V), transconductance efficiency g(m)/I-D, and transit frequency f(T) are presented. The proposed model has been compared to a complete analytical model and also to measured data available in current literature. The results show that the proposed model follows closely to both the complete analytical model and the measured data; therefore, it can be successfully applied in the design of GFET analog circuits.

  • 82.
    Rodriguez, Saul
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Viziri, Sami
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Östling, Mikael
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Alarcon, Eduard
    KTH, Skolan för informations- och kommunikationsteknik (ICT). UPC Barcelona.
    Lemme, Max
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    RF Performance Projections of Graphene FETs vs. Silicon MOSFETs2012Inngår i: ECS Transactions, ISSN 1938-5862, E-ISSN 1938-6737, Vol. 1, nr 5, s. Q39-Q41Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    A graphene field-effect-transistor (GFET) model calibrated with extracted device parameters and a commercial 65 nm silicon MOSFET model are compared with respect to their radio frequency behavior. GFETs slightly lag behind CMOS in terms of speed despite their higher mobility. This is counterintuitive, but can be explained by the effect of a strongly nonlinear voltage-dependent gate capacitance. GFETs achieve their maximum performance only for narrow ranges of V-DS and I-DS, which must be carefully considered for circuit design. For our parameter set, GFETs require at least mu = 3000 cm(2) V-1 s(-1) to achieve the same performance as 65 nm silicon MOSFETs.

  • 83.
    Rodríguez de Llera González, Delia
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    A behavioral-based multi-agent optimization algorithm for system level radio design2009Inngår i: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 61, nr 1, s. 35-46Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    This paper introduces a multi-agent behavioral-based optimization algorithm for system level radio design. Making multi-standard wireless communication receivers that meet their specs while keeping the requirements of the individual blocks as relaxed as possible is the goal of this algorithm. In order to achieve this goal a "divide and conquer" approach is proposed. Different agents focus on different objectives that are pursued in parallel. Agents adopt different behaviors depending on the status of the environment and their interaction with other agents. Agents are cooperative by default as they try to meet their spec without making changes that affect other agents. However, more aggressive behaviors that lead to global changes can be adopted when needed. The interaction between these simple entities yields an emergent behavior able to deal smoothly with the complexity of the problem at hand.

  • 84.
    Rodríguez de Llera González, Delia
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    A frequency plan evaluation tool for multi-standard wireless transceivers2006Inngår i: Prime 2006: 2nd Conference on PH.D. Research in MicroElectronic and Electronics, 2006, s. 473-476Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper introduces a frequency plan evaluation too] for multi-hand, multi-standard wireless transceivers. The implemented algorithm allows RF engineers to systematically analyze the effects of the intermodulation products as well as the harmonic components associated with the input signals, the local oscillator and interfering signals. The effect of the out of-band blockers is also evaluated. This provides very valuable information that helps finding the best intermediate frequency and filter bandwidths to the designer. This evaluation tool is part of a suite of tools called TACT, the purpose of which is to explore the design space of multi-standard radio transceivers. Simulation results on a multi-band WCDMA system verify the validity of the implemented frequency planning scheme.

  • 85.
    Rodríguez de Llera González, Delia
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Automated design of a WCDMA/WLAN multi-standard receiver2006Inngår i: ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems: Nice: 10 December 2006 through 13 December 2006, 2006, s. 1320-1323Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In this paper we show how TACT, a recently reported [1] radio system design and optimization tool, can be used to optimize the design of a dual mode WCDMA/WLAN receiver. An overview of the underlying frequency planning and receiver budget analysis routines is discussed first. In a case study, a zero-IF WLAN/WCDMA radio receiver is then designed and optimized using the tool. TACT yields optimized design specs for each block in the chain as well as a summary of the system performance obtained. The obtained performance is shown to meet or exceed the requirements of the WCDMA/WLAN standards. As such, the case study validates the benefits of the proposed tool.

  • 86.
    Rodríguez de Llera González, Delia
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Automated receiver design and optimization for 4G wireless communication systems2006Inngår i: BMAS 2006: Proceedings of the 2006 IEEE International Behavioral Modeling and Simulation Workshop, 2006, s. 132-137Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper presents the design methodology and underlying algorithms of a tool developed for automated receiver design and optimization for fourth generation (4G) Wireless Communication Systems. An algorithm to systematically design and optimize the receiver budget for the multi-standard case is introduced. The goal of this algorithm is to find a multistandard receiver budget that meets or exceeds the specs of the addressed wireless standards while keeping the requirements of each of the receiver blocks as relaxed as possible. This tool offers RF engineers a deep insight into the receiver behavior at a very early stage of the design flow. It models the impact of some circuit non-idealities using a high level of abstraction. This reduces the number of design iterations and, thus, the time-to-market of the solution. The reuse of already available intellectual property (IP) blocks is also considered in the tool. This can result in a significant cost reduction of the receiver implementation.

  • 87.
    Rodríguez de Llera González, Delia
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    EDA for RF and analog front-ends in the 4G era: Challenges and solutions2007Inngår i: European Conference on Circuit Theory and Design 2007, ECCTD 2007, 2007, s. 24-27Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Convergence into 4G wireless communication systems pushes the design of radio receivers beyond limits unconceivable only few years ago. The complexity of RF systems has increased enormously as new communication standards have appeared in the wireless scenario. The convergence trends, enabled by the advances in fabrication technology, have driven the Software Defined Radio (SDR) more and more into the RF and analog front-end. There is a clear need for design automation and advanced simulation techniques at the different levels that go from the system idea to chip fabrication. Reducing the number of design iterations between these levels is key in meeting the increasingly tight time-to-market constraints. As of today, there is not a single tool that covers the complete design flow. Instead, there is an intricate puzzle of design and simulation tools that focus on the various steps that go from system to silicon. The amount of RF and analog EDA tools available is certainly scarce in comparison with their digital counterparts. Most of the design work still depends on the radio engineer, making the process less than optimal. This paper describes some of the challenges faced by today's radio designers and discusses some of the solutions provided by the EDA community.

  • 88.
    Rodríguez de Llera González, Delia
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Receiver design for integrated multi-standard wireless radios2006Inngår i: Radio Design in Nanometer Technologies / [ed] Ismail, Mohammed; Rodríguez De Llera González, Delia, Dordrecht: Springer , 2006, s. 145-171Kapittel i bok, del av antologi (Annet vitenskapelig)
  • 89.
    Rodríguez de Llera González, Delia
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Ismail, Mohammed
    School of Information and Communication Technology, Royal Institute of Technology, Ohio State University.
    Tackling 4G challenges with "TACT": Design and optimization of 4G radio receivers with a transceiver architecture comparison tool (TACT)2006Inngår i: IEEE Circuits & Devices, ISSN 8755-3996, E-ISSN 1558-1888, Vol. 22, nr 6, s. 16-23Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    Today, engineers are faced with the challenge of programming multistandard capabilities. Achieving digital programmability and flexibility in the analog/radio frequency (RF) components of the system is vital in order to achieve this goal. This is where electronic design automation (EDA) tools are needed. The tools facilitate the design of multiband/multimode receivers at different levels. The multistandard RF Transceiver Architecture Comparison Tool (TACT) is a tool that automates the process of design-space exploration for multistandard transceivers like 4G wireless receivers. TACT proposes an interference-oriented approach when evaluating the performance of each possible intermediate frequency to find the most suitable frequency plan. This evaluation takes into account both signals belonging to the standards as well as out-of-band interferers. TACT's objective is finding a multistandard receiver budget that meets or exceeds the specifications of the addressed wireless standards while keeping the requirements of each of the receiver blocks as relaxed as possible. EDA tools will play an important role in the design and verification of wireless systems in order to achieve the software radio paradigm using 4G radio receivers.

  • 90.
    Rodríguez de Llera González, Delia
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Tenhunen, Hannu
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    TACT: A multi-standard RF transceiver architecture comparison tool2005Inngår i: Circuits and Systems, 2005. 48th Midwest Symposium on, IEEE conference proceedings, 2005, s. 659-662Konferansepaper (Fagfellevurdert)
    Abstract [en]

    One of the main challenges posed by 4G wireless communication systems is achieving flexible, programmable multi-standard radio transceivers with maximum hardware share amongst different standards at a minimum power consumption. Evaluating the feasibility and performance of different multistandard/multi-band radio solutions at an early stage, i.e. system level, is key for succeeding in surmounting this challenge. This entails formulation of the transceiver budget for several RF architectures with different degrees of hardware reuse. This task is complicated by the fact that transceiver blocks can have different implementations that lead to different performances. The tools that are available for use at present have only budget analysis capabilities or address only one standard and/or transceiver architecture at a time. We believe that a new approach to this problem is necessary and propose a novel methodology for evaluating the performance of different multi-standard solutions. This paper introduces TACT, our multi-standard RF Transceiver Architecture Comparison Tool. It will help answering many of the challenges faced by designers when realizing a transceiver budget for multi-standard/multi-band radio transceivers.

  • 91.
    Rodríguez de Llera González, Delia
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Xu, Wangren
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    TACT as a learning tool for radio design2007Inngår i: MSE 2007: 2007 IEEE International Conference on Microelectronic Systems Education: Educating Systems Designers for the Global Economy and a Secure World, 2007, s. 71-72Konferansepaper (Fagfellevurdert)
    Abstract [en]

    TACT is an EDA tool that can be very valuable in an educational context since it can help students in electronics and communications acquiring skills that will be fundamental for their careers. TACT is suite of tools the purpose of which is to explore the design space of multi-standard radio transceivers. The use of this tool can ease and speed up the learning process related to the system level design of chipsets suitable for communication applications. The outputs from TACT can easily be combined with available commercial tools in order to provide a complete design flow from system to silicon. This paper highlights the main features that make of TACT a very useful tool in education.

  • 92.
    Rong, Liang
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Gustafsson, E. Martin I.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Rusu, Ana
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Elnaggar, Mohammed Ismail
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Systematic design of a flash ADC for UWB applications2007Inngår i: 8th International Symposium on Quality Electronic Design, ISQED 2007: San Jose, CA; 26 March 2007 through 28 March 2007, 2007, s. 108-112Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper presents the systematic design of a 5-bit, 1.2 GSPS interpolative flash ADC for multiband OFDM UWB applications. The proposed ADC architecture employs the proven capacitive interpolation, which greatly reduce the power consumption, by eliminating the need of a power hungry resistive ladder The flash ADC has been implemented in a 0.18 um CMOS process. Circuit level simulations show that the proposed architecture can achieve an SNDR of 25.3 dB, and an SFDR of 29.3 dB, with an input signal frequency of 330 MHz, at a sampling rate of 1.2 GSPS. The ADC core dissipates 130 mW from a 1.8 V supply.

  • 93.
    Rusu, Ana
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Borodenkov, A.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Tenhunen, Hannu
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    A triple-mode sigma-delta modulator for multi-standard wireless radio receivers2006Inngår i: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 47, nr 2, s. 113-124Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    A 1.8 V sigma-delta modulator with a 4 bit quantizer has been designed for GSM/WCDMA/WLAN receivers in a 0.18 um CMOS process. The modulator makes use of low-distortion sigma-delta modulator architecture and Pseudo-Data-Weighted-Averaging technique to attain high linearity over a wide bandwidth. Power dissipation is minimized by optimizing the architecture and by a careful design of analog circuitry. In GSM mode, the modulator achieves 96/104 dB peak SNR/SFDR over 100 kHz bandwidth and dissipates 18 mW at a sampling frequency of 32 MHz. The modulator achieves 92/68 dB peak SFDR and 77/54 dB peak SNR over a 2 MHz/10 MHz bandwidth and dissipates 23/39 mW at a sampling frequency of 64 MHz/160 MHz in WCDMA/WLAN.

  • 94.
    Rusu, Ana
    et al.
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    Borodenkov, Alexei
    KTH, Tidigare Institutioner, Mikroelektronik och informationsteknik, IMIT.
    Ismail, Mohammed
    KTH, Tidigare Institutioner, Mikroelektronik och informationsteknik, IMIT.
    Tenhunen, Hannu
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    Design of a power/performance efficient single-loop sigma-delta modulator for wireless receivers2004Inngår i: INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION / [ed] Macii, E; Paliouras, V; Koufopavlou, O, BERLIN: SPRINGER , 2004, Vol. 3254, s. 564-573Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In order to design high performance sigma-delta A/D converters, it is essential to estimate the Figure-Of-Merit in the design process. This paper describes the design of a power/performance efficient single-loop multibit sigma-delta modulator for wireless applications. Power dissipation is minimized by optimizing the architecture and by a careful design of analog circuitry. A 3(rd) order 4-bit Sigma-Delta modulator with feedforward path is designed in 0.18um CMOS process operating from 1.8V supply voltage. The modulator dissipates 8.6 mW and achieves a dynamic range of 84/95 dB over a bandwidth of 2000/100 kHz.

  • 95.
    Rusu, Ana
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Dong, Boxian
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Putting the flex in flexible mobile wireless radios - A wideband continuous-time bandpass sigma-delta ADC for software radios2006Inngår i: IEEE Circuits & Devices, ISSN 8755-3996, E-ISSN 1558-1888, ISSN 8755-3996, Vol. 22, nr 6, s. 24-30Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    This article has provided a brief overview of the SigmaDelta ADC conversion technologies for SDRs. The wireless receiver challenges were identified, the ADC design considerations and SigmaDelta solutions were discussed, and a low-distortion CT BP SigmaDelta modulator architecture was presented. The article has shown that the proposed CT BP SigmaDelta modulator is suitable for implementing high-IF ADC, making possible the software radio in handhelds. The major challenges in implementing such a high-IF ADC are the power dissipation and the degree of configurability, programmability, and adaptability that can be achieved by applying digital tuning and adaptive calibration.

  • 96.
    Rusu, Ana
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Elnaggar, Mohammed Ismail
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Design challenges of wireless mobile radios2007Inngår i: ISSCS 2007: International Symposium on Signals, Circuits and Systems, Vols 1 and 2, NEW YORK: IEEE , 2007, s. 133-136Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper discusses the challenges in designing modern wireless systems with focus on wireless mobile devices. It reviews the radio architectures and the design challenges imposed by the low-power specifications, small size. and low cost in mobile terminals. Finally, the reconfigurable analog-to-digital conversion architectures that could support the multi-standard radio requirements in mobile devices am discussed in the perspective of a low-power CMOS design.

  • 97.
    Rusu, Ana
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Gustafsson, E. Martin I.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Rodríguez de Llera González, Delia
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Elnaggar, Mohammed Ismail
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Flexible ADCs for wireless mobile radios2007Inngår i: 18th European Conference on Circuit Theory Design, ECCTD 2007: Univ Sevilla, Seville, SPAIN, AUG 26-30, 2007, 2007, s. 172-175Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The evolution of wireless mobile devices calls for "all-in-one-device", which support a large number of wireless standards and allows wireless connectivity and roaming. This creates the need for adaptive circuits that are able to reconfigure themselves to trade-off power dissipation for performance, depending on the wireless standard to be supported and the required Quality of Service. Therefore, the key features of such mobile devices are flexibility and adaptability. This paper presents the ADCs suitable for mobile radios, keeping focus on flexible architectures. Finally, a programmable ADCs array, which can digitize signal bands from cellular to UWB is presented.

  • 98.
    Rusu, Ana
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Ismail, Mohammed
    KTH, Skolan för datavetenskap och kommunikation (CSC), Numerisk Analys och Datalogi, NADA.
    "Analog-to-Digital Conversion Technologies for Software Defined Radios"2006Inngår i: Radio design in nanometer technologies / [ed] Mohammed Ismail and Delia Rodriguez, Springer: Springer, 2006, 1, s. 101-121Kapittel i bok, del av antologi (Fagfellevurdert)
  • 99.
    Rusu, Ana
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
    Guest editorial: advanced design techniques for wireless communications2009Inngår i: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 58, nr 3, s. 179-181Artikkel i tidsskrift (Annet vitenskapelig)
  • 100.
    Rusu, Ana
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Ismail, Mohammed
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Mikroelektronik och Informationsteknik, IMIT.
    Low-distortion bandpass Sigma-Delta modulator for wireless radio receivers2005Inngår i: Electronics Letters, ISSN 0013-5194, E-ISSN 1350-911X, Vol. 41, nr 19, s. 1044-1046Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    A low-distortion bandpass sigma-delta modulator is proposed. It was found that the key to improving linearity is to add a feedforward signal path in a double-delay resonator bandpass structure. The proposed technique improves the tonal behaviour even at low oversampling ratio and can be applied for any order of modulator. Based on the proposed architecture, a fourth-order single-bit sigma-delta modulator can achieve a dynamic range of 84 dB and a spurious free dynamic range of 98 dB at 10.71 MHz with a signal bandwidth of 200 kHz, making it ideal for a narrowband IF-sampled wireless receiver designed for compliance with GSM/GPRS standards.

123 51 - 100 of 125
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