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  • 701. Yoo, S. J. B.
    et al.
    Heritage, J. P.
    Hernandez, V. J.
    Scott, R. P.
    Cong, W.
    Fontaine, N. K.
    Broeke, R. G.
    Cao, J.
    Seo, S. W.
    Baek, J. H.
    Soares, F. M.
    Du, Y.
    Yang, C.
    Jiang, W.
    Aihara, K.
    Ding, Z.
    Kolner, B. H.
    Pham, Anh-Vu
    Lin, Shu
    Olsson, F.
    Lourdudoss, Sebastian
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Liou, K. Y.
    Chu, S. N. G.
    Hamm, R. A.
    Patel, B.
    Hobson, W. S.
    Lothian, J. R.
    Vatanapradit, S.
    Gruezke, L. A.
    Tsang, W. T.
    Shearn, M.
    Scherer, A.
    Spectral phase encoded time spread optical code division multiple access technology for next generation communication networks Invited2007In: Journal of Optical Networking, ISSN 1536-5379, Vol. 6, no 10, p. 1210-1227Article in journal (Refereed)
    Abstract [en]

    We overview and summarize the progress of the spectral phase encoded time spreading (SPECTS) optical code division multiple access (O-CDMA) technology. Recent progress included a demonstration of a 320 Gbit/s (32-user x 10 Gbit/s) all-optical passive optical network testbed based on the SPECTS O-CDMA technology and a theoretical prediction of the spectral efficiency at 100% and above. In particular, InP-based integrated photonics allows implementation of SPECTS O-CDMA transmitters and receivers monolithically integrated on a chip. The integrated InP chip technology not only allows robust and compact configurations for practical and low-cost O-CDMA network deployments but also offers code reconfigurations at rapid rates for secure communication applications.

  • 702. Yoo, S. J. B.
    et al.
    Lourdudoss, Sebastian
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    InP photonic integrated circuits for optical communciations2008Conference paper (Refereed)
    Abstract [en]

    This paper describes photonic integration circuits (PICs) realized on the InP platform including high-speed mode locked lasers, arrayed waveguide gratings (AWGs), differential Mach-Zehnder optical switches (MZI), and high-speed amplitude and phase modulators. Selected area hydride vapor phase epitaxy (HVPE) and organometallic chemical vapor deposition (OMCVD) were used to realized planarized and passivated integration including active and passive elements. The integrated chips of various configurations were investigated for 'Optical Code Division Multiple Access (O-CDMA)', in local area networks, and for 'Optical Arbitrary Waveform Generation (OAWG),' in high-speed otptical communications.

  • 703.
    Yu, Xingang
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Chung, Il-Sug
    Mork, Jesper
    Xiang, Yu
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Berggren, Jesper
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Hammar, Mattias
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Single-mode InGaAs/GaAs 1.3-mu m VCSELs Based on a Shallow Intracavity Patterning2010In: SEMICONDUCTOR LASERS AND LASER DYNAMICS IV / [ed] Panajotov, K; Sciamanna, M; Valle, AA; Michalzik, R, 2010, Vol. 7720, p. 772021-Conference paper (Refereed)
    Abstract [en]

    A high-power single-mode 1.3-mu m InGaAs/GaAs vertical-cavity surface-emitting laser (VCSEL) structure employing a novel concept of engineering the optical mode profile to match the gain profile is suggested and demonstrated experimentally and theoretically. In contrast to various singlemode VCSEL approaches reported in the literature so far, based on selective loss or anti-resonant effects to suppress higher order modes, it is due to a novel design to increase the active region size while maintaining single mode emission. The shape of the fundamental mode profile is engineered to be similar to the gain profile which resembles a doughnut shape especially in intra-cavity contacted devices. In this way, the fundamental mode with the best fit to the gain profile can reach the lasing condition earliest and consume all the optical gain, leading to a suppression of higher order modes. Notably, despite this engineered shape of the mode profile, the far field shape remains close to Gaussian. The mode shaping can be achieved by introducing a shallow intracavity patterning before depositing the top mirror. Fabricated device structures consist of a A-Si/SiN/SiO(2) top mirror, modulation-doped current spreading layers, re-grown current confinement layers, three InGaAs/GaAs quantum wells, and a GaAs/AlGaAs bottom mirror. Single mode operation is demonstrated even for devices with active region as large as 10 mu m.

  • 704.
    Yu, Yichuan
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Karlsson, Stefan
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Liu, C. P.
    Schatz, Richard
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Westergren, Urban
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Kjebon, Olle
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Chuang, C. H.
    He, Sailing
    Thylén, Lars
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Seeds, A. J.
    Krysa, A. B.
    Roberts, J. S.
    Intermodulation Distortion Suppression in a Full-Duplex Radio-over-Fibre System Employing Asymmetric Fabry-Perot Modulator/Detector2006In: 2006 European Conference on Optical Communications Proceedings, ECOC 2006, 2006Conference paper (Refereed)
    Abstract [en]

    The property of intermodulation distortion in a full-duplex radio-over-fibre system with Asymmetric Fabry-Perot Modulator/Detector was investigated. By employing the balanced RF input powers, intermodulation distortion was suppressed and a SFDR of 99dB. Hz2/3 has been achieved.

  • 705.
    Yu, Yichuan
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT. KTH, School of Information and Communication Technology (ICT), Centres, Zhejiang-KTH Joint Research Center of Photonics, JORCEP.
    Lewén, Robert
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT. KTH, School of Information and Communication Technology (ICT), Centres, Zhejiang-KTH Joint Research Center of Photonics, JORCEP.
    Irmscher, Stefan
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT. KTH, School of Information and Communication Technology (ICT), Centres, Zhejiang-KTH Joint Research Center of Photonics, JORCEP.
    Westergren, Urban
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT. KTH, School of Information and Communication Technology (ICT), Centres, Zhejiang-KTH Joint Research Center of Photonics, JORCEP.
    Thylén, Lars
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT. KTH, School of Information and Communication Technology (ICT), Centres, Zhejiang-KTH Joint Research Center of Photonics, JORCEP.
    Eriksson, U.
    Lee, W. S.
    80gb/s ETDM transmitter with a traveling-wave electroabsorption modulator2006In: OFC/NFOEC Technical Digest 2006, Optical Society of America, 2006Conference paper (Refereed)
    Abstract [en]

    We have demonstrated non-return-to-zero data transmission at 80Gb/s using an ETDM fiberoptical transmitter consisting of a segmented traveling-wave electroabsorption modulator with integrated termination resistor and a SiGe electronic multiplexer.

  • 706.
    Yu, Zhangwei
    et al.
    KTH, School of Information and Communication Technology (ICT), Centres, Zhejiang-KTH Joint Research Center of Photonics, JORCEP. KTH, School of Information and Communication Technology (ICT), Centres, Kista Photonics Research Center, KPRC.
    Margulis, Walter
    Acreo AB .
    Tarasenko, Oleksandr
    Acreo AB .
    Knape, Harald
    Acreo AB .
    Fonjallaz, Pierre-Yves
    KTH, School of Information and Communication Technology (ICT), Centres, Kista Photonics Research Center, KPRC. KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Nanosecond switching of fiber Bragg gratings2007In: Optics Express, ISSN 1094-4087, E-ISSN 1094-4087, Vol. 15, no 22, p. 14948-14953Article in journal (Refereed)
    Abstract [en]

    A FBG was written in a two-hole fiber with internal alloy electrodes. Nanosecond high current pulses cause metal expansion, increase birefringence and tune the gratings with a response time of 29 ns. This short length, low loss, all-spliced high-speed wavelength switching devices described here has potential use in Q-switching fiber laser.

  • 707.
    Yun, Sang Ho
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Dibos, A.
    Lee, Hyung-Seok
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Wu, J. Z.
    Karlsson, Ulf O.
    KTH, School of Information and Communication Technology (ICT), Material Physics, Material Physics, MF.
    Growth of boron nano-junctions2006In: Applied Surface Science, ISSN 0169-4332, E-ISSN 1873-5584, Vol. 252, no 15, p. 5587-5589Article in journal (Refereed)
    Abstract [en]

    In this work, we demonstrate the synthesis of various types of boron nanowire junctions in a self-assembled manner by simple closed-tube thermal vapor transfer method. The Y-type boron nano-junctions and lateral boron-silicon alloy nano-junctions were grown on Si substrates, based on the oxide assisted VLS growth mode at a relatively low processing temperature regime and the VLS growth mode at the high processing temperature regime, respectively.

  • 708.
    Yun, Sang Ho
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Wu, J. I.
    Dibos, A.
    Zou, X. D.
    Karlsson, Ulf O.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Self-assembled boron nanowire Y-junctions2006In: Nano letters (Print), ISSN 1530-6984, E-ISSN 1530-6992, Vol. 6, no 3, p. 385-389Article in journal (Refereed)
    Abstract [en]

    In this work, we demonstrate that boron nanowire Y-junctions can be synthesized in a self-assembled manner by fusing two individual boron nanowires grown inclined toward each other. We show that the presence of a second liquid, in addition to the liquid Au catalyst, is critical to the inclination of the boron nanowire. The structure of the BNYJ arrays that we report here may allow construction of three- or multiple-terminal nanowire devices directly on Si-based readout circuits through controlled nanowire growth.

  • 709.
    Yun, Sang Ho
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Wu, J. Z.
    Dibos, A.
    Gao, X.
    Karlsson, Ulf O.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Growth of inclined boron nanowire bundle arrays in an oxide-assisted vapor-liquid-solid process2005In: Applied Physics Letters, ISSN 0003-6951, E-ISSN 1077-3118, Vol. 87, no 11, p. 113109-Article in journal (Refereed)
    Abstract [en]

    In the vapor-liquid-solid process typically employed for semiconductor nanowire growth, nucleation and anisotropic crystal growth of single nanowires are achieved with generation of a solid/liquid alloy interface using metal catalysts. The nucleation and growth mechanism of nanowires may be greatly altered when a second liquid is introduced into the solid/liquid alloy interface. In this work, we demonstrate bundled boron nanowire (BNW) array growth on Au coated Si substrates by introducing a second liquid of B2O3 onto the solid (B)/liquid alloy (Au-B) interface. The BNWs in each bundle are straight but highly inclined with respect to the normal of the substrate. A study of BNW morphology and chemical elemental distribution using electron microscopy and energy dispersive x-ray spectroscopy suggested that the catalyst Au provided the nucleation site for BNW bundles while the liquid B2O3 modified the initiation of BNWs from each nucleation site, resulting in multiple initiation of the BNWs from each site.

  • 710.
    Yuntian, Chen
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Björk, Gunnar
    KTH, School of Information and Communication Technology (ICT).
    Generation and detection of photonic qutrits2007In: 2007 European Conference on Lasers and Electro-Optics and the International Quantum Electronics Conference, CLEO, 2007, p. 4386921-Conference paper (Refereed)
  • 711. Zamzam, D. M.
    et al.
    Abd El Ghany, M. A.
    Hofmann, K.
    Ismail, Muhammad
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Highly reliable and power efficient NOC interconnects2011In: NORCHIP, 2011Conference paper (Refereed)
    Abstract [en]

    Network on chip (NOC) architecture interconnects consume significant amount of power, have a large propagation delay and are susceptible to error due to deep sub-micron (DSM) noise. Major challenge that NOC design expected to face is related to intrinsic reliability. By incorporating error control coding schemes along the NOC interconnects, NOC architectures are able to provide correct functionality in the presence of different transient noise source. In this paper we present a novel coding scheme that increase the reliability of the NOC where the area is reduced by 19% and the consumed power by NOC interconnects is decreased by 51%. Butterfly fat tree architecture consumes the minimum power as compared to other NOC architectures.

  • 712.
    Zetterling, Carl-Mikael
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Liu, Wei
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Thermal modeling of multi-finger SiC power MESFETs2005In: 2005 International Semiconductor Device Research Symposium, 2005, Vol. 2005, p. 290-291Conference paper (Refereed)
    Abstract [en]

    The high critical electrical field of silicon carbide makes it possible to fabricate high power SiC devices, which can handle much higher power than the traditional silicon and gallium arsenide power devices1. SiC power MESFET is one of such devices available on the market for RF applications 2. Despite the high thermal conductivity of the material, the SiC devices may suffer severe self-heating when operating at very high power levels, especially if the gate pitch is small3. The self-heating phenomena of one- and multi-fingered SiC MESFETs were studied through 2D electro-thermal simulations and 2D and 3D steady-state thermal simulations. The device performance degradation caused by self-heating was observed, and is more profound for devices operating at room temperature than for devices working at elevated temperatures. The junction temperature and temperature distribution of devices fabricated on SiC substrates were estimated through both electro-thermal simulations and steady-state thermal simulations, and the results agree well (Fig. 1). Different layouts and gate pitches were investigated to optimize the trade-off between maximum operating temperature and the longest signal path, which limits the size of high-frequency devices (Fig. 2. and 3.).

  • 713.
    Zetterling, Carl-Mikael
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Lee, H.-S.
    Silicon Carbide Power Device Technology2006Conference paper (Refereed)
  • 714.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    The reaction of Ni with Si-Ge: An overview and some new considerations2005In: Proc. Electrochem. Soc., 2005, p. 597-611Conference paper (Refereed)
    Abstract [en]

    The reactive phase formation upon annealing Ni films deposited on Si-Ge alloy substrates has become an attractive research subject as a result of two parallel rapid developments in Si technology: (1) the down-scaling of CMOS technology to the sub-50 nm regime and (2) the incorporation of Ge in standard Si-MOSFET for performance enhancement. Recent publications concern the phase formation and stability of the formed Ni(Si-Ge)p (p=0.5, 1 or 2), microstructure and morphological instability of the grown Ni(Si-Ge) (p=1) layers, and electrical behavior of the transition region at the Ni(Si-Ge)/Si-Ge interface. In the present work, those aspects are further discussed. Assumptions and simplifications were made when calculating the approximate phase diagram for the Ni-Si-Ge ternary system. Several of those assumptions are discussed in greater details in this work. An attempt to estimate the solid solubility of Ge in NiSi2 is presented, which yields a value less than 1 at.%. The role of Ge in the morphological instability at the interfacial region between Ni(Si-Ge)p and Si-Ge is discussed in the light of recently published experimental data. Incorporating further elements such as Pt or C could lead to improved interface morphology. The potential consequences of such additions include increased process complexity and different kinds of instabilities. Lateral encroachment of Ni(Si-Ge)p in contact windows has been observed, which is caused by the fast Ni diffusion (faster than Si and Ge) during the growth of the monosilicide or germanosilicide. These effects can be catastrophic to the unaware and careful process design is needed to control the lateral growth. The reported large thermal expansion coefficients of NiSi could be the cause for reliability problems such as void formation between the formed NiSi and the Si channel. The fiber texture development observed in the grown NiSi1-xGex in combination with the anisotropy of the thermal expansion coefficients of NiSi are discussed as a likely engineering approach to minimizing void formation.

  • 715. Zhang, T.
    et al.
    Österberg, Patrik
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Xu, Y.
    Multicast-favorable max-min fairness: A general definition of multicast fairness2005In: Proceedings - First International Conference on Distributed Frameworks for Multimedia Applications 2005, DFMA '05, 2005, p. 239-244Conference paper (Refereed)
    Abstract [en]

    As video-streaming services are becoming more common the benefit of multicast transmission is growing, because multicast is more bandwidth efficient than unicast in scenarios where many receivers simultaneously are interested in the same data. Of the same reason the concept of multicast fairness is starting to attract attention, it might be sensible to give multicast flows higher priority and thereby create an incentive for the use of multicast transmission. Allocating link bandwidth in proportion to the logarithm of the number of receivers of a flow, which favors multicast flows without totally starving unicast flows, has been proposed in [1]. That was however just as a bandwidth-allocation policy ran on the individual routers and not a definition of multicast fairness. To our knowledge no one has yet come up with a definition of multicast fairness which prioritizes multicast flows. In this paper we present a general multicast fairness definition, named multicast-favorable max-min fairness (MFMF), which can be used together with any multicast-favorable function.

  • 716.
    Zhang, Yan
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Wireless sensor network for volcano monitoring2005Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    The monitoring of volcanoes for risk assessment has deployed single sensors for years. This kind of system requires manual supervision to monitor each sensor, which makes the monitoring work not flexible and efficient enough to adapt to variable volcano environments. With the development of wireless sensor networks, the accuracy and coverage of volcano observations can be improved by deploying networked sensors. This paper proposes a wireless sensor network prototype for volcano remote monitoring, which was built and tested in a field campaign in volcano Etna, Italy in September of 2004.Hardware design of sensors, in-depth sensor network design and software module architecture will be introduced in this paper. The experience gained from the practical work in volcano Etna will be used in an upcoming volcano monitoring project.

  • 717.
    Zhang, Zhen
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Hellström, Per-Erik
    KTH, School of Information and Communication Technology (ICT).
    Lu, Jun
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT).
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT).
    A novel self-aligned process for platinum silicide nanowires2006In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 83, no 11-12, p. 2107-2111Article in journal (Refereed)
    Abstract [en]

    Directly accessible, ultralong, uniform platinum silicide nanowires in PtSi and Pt2Si are mass-fabricated by combining a sidewall transfer lithography (STL) technology and a self-aligned silicide process. The STL technology is based on standard Si technology. The self-aligned platinum silicide (PtSix) process consists of two sequential steps in a single run: a silicidation step in N-2 to ensure a controllable silicide formation followed by an oxidation step in O-2 to form a reliable protective SiOx layer on top of the grown PtSix. The achieved nanowires are characterised by a low resistivity: 26 +/- 3 and 34 +/- 2 mu Omega cm for the Pt2Si- and PtSi-dominated nanowires.

  • 718.
    Zhang, Zheng
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Hellström, Per Erik
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shi Li
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Lu, Jun
    Uppsala University, Ångström Laboratory.
    Electrically robust ultralong nanowires of NiSi, Ni2Si and Ni31Si122006In: Applied Physics Letters, ISSN 0003-6951, E-ISSN 1077-3118, Vol. 88, no 4, p. 043104-Article in journal (Refereed)
    Abstract [en]

    Mass fabrication of directly accessible, ultralong, uniform Si nanowires is realized by employing a controllable and reproducible method based on standard Si technology. High-conductivity polycrystalline Ni-silicide nanowires around 30 nm by 30 nm in cross section, able to support extremely high currents at similar to 10(8) A/cm(2), are obtained by means of solid-state reaction of the Si nanowires with subsequently deposited Ni films. By properly adjusting the Ni film thickness, NiSi, Ni2Si, and Ni31Si12 nanowires characterized with distinct resistivity and temperature coefficient of resistance are obtained. Upon annealing, the electrical continuity of the nanowires breaks at temperatures about 0.7 times the melting points of the silicides.

  • 719.
    Zhang, Ziyang
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Dainese, Matteo
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Wosinski, Lech
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Swillo, Marcin
    PhoXtal Communications AB.
    Xiao, Sanshui
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Qiu, Min
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Experimental demonstration of 2D photonic crystal surface cavity in amorphous silicon on silica structure2007In: OFC/NFOEC 2007 - Optical Fiber Communication and the National Fiber Optic Engineers Conference 2007, 2007, p. 4348573-Conference paper (Refereed)
    Abstract [en]

    Design, fabrication, and characterization of an optical filter based on side coupling between silicon wire waveguide and photonic crystal surface mode cavity in silicon on silica structure is presented for the 1550 nm wavelength spectral region.

  • 720.
    Zhang, Ziyang
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Qiu, Min
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Compact in-plane channel drop filter design using a single cavity with two degenerate modes in 2D photonic crystal slabs2005In: Optics Express, ISSN 1094-4087, E-ISSN 1094-4087, Vol. 13, no 7, p. 2596-2604Article in journal (Refereed)
    Abstract [en]

    A compact in-plane channel drop filter design in 2D hexagonal lattice photonic crystal slabs is presented in this paper. The system consists of two photonic crystal waveguides and a single cavity with two degenerate modes. Both modes are able to confine light strongly in the vertical dimension and prove to couple equally into the waveguides. Three dimensional finite difference time domain simulations show that the quality factor is around 3,000. At resonance, power transferred to the drop waveguide is 78% and only 1.6% remains in the bus waveguide. We also show that by carefully tuning the drop waveguide boundary, light remaining in the bus can be further reduced to below 0.4% and thus the channel isolation is larger than 22dB.

  • 721.
    Zhang, Ziyang
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Qiu, Min
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Coupled mode analysis of in-plane channel drop filters with resonant mirrors2005In: Photonics and Nanostructures-Fundamentals and Applications, ISSN 1569-4410, Vol. 3, no 2-3, p. 84-89Article in journal (Refereed)
    Abstract [en]

    A channel drop filter system that consists of two waveguides and three cavities is studied. One cavity couples with both waveguides, while the other two work as resonant mirrors to reflect the selected channel back into the system. The operation of this configuration is analyzed, using coupled mode theory. The conditions to achieve 100% in-plane channel transfer are derived. A method to suppress the side lobes of reflection and backward drop is also proposed. The direct coupling between the cavities is not required. The analysis is verified by two-dimensional finite difference time domain simulations in 2D hexagonal photonic crystals.

  • 722.
    Zhang, Ziyang
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Qiu, Min
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Fabrication tolerance tests on high-Q microcavities in 2D photonic crystal slabs2005In: Conference on Lasers and Electro-Optics Europe: Technical Digest, 2005Conference paper (Refereed)
  • 723.
    Zhang, Ziyang
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Qiu, Min
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Influence of structural variations on high-Q microcavities in two-dimensional photonic crystal slabs2005In: Optics Letters, ISSN 0146-9592, E-ISSN 1539-4794, Vol. 30, no 13, p. 1713-1715Article in journal (Refereed)
    Abstract [en]

    The influence of some critical structural variations in high-Q microcavities in two-dimensional photonic crystal slabs is investigated. All the cavities studied maintain a high Q in a wide range of structural variations, while the resonant frequencies shift on a relatively large scale when the structural variations are comparable to the physical sizes of the cavities.

  • 724.
    Zhang, Ziyang
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Qui, Min
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Coupled-mode analysis of a resonant channel drop filter using waveguides with mirror boundaries2006In: Journal of the Optical Society of America. B, Optical physics, ISSN 0740-3224, E-ISSN 1520-8540, Vol. 23, no 1, p. 104-113Article in journal (Refereed)
    Abstract [en]

    The operation of resonant channel drop filters is analyzed using coupled-mode theory. The resonator is chosen to support a single standing-wave mode, and, in the ideal case, one can realize 100% in-plane channel transfer by properly applying mirror boundaries to the waveguides. The presence of the mirrors causes the resonant frequency to shift, and the system Q factor also changes accordingly. The two variables are related by a closed curve depending on the phase introduced by the reflection and wave propagation between the two ports. When one works on different regions of the curve, the system can be tuned to work at different resonant frequencies with minimum Q-factor variations or vice versa. The mirror can be frequency selective. The same single-mode cavity can be used as a resonant mirror to terminate the waveguide. The combined system is analyzed, and we find the conditions to achieve 100% channel transfer as well as to maintain a simple Lorentzian line shape of the transmission spectra. The analysis is verified by two-dimensional (2D) finite-difference time-domain simulations in 2D hexagonal photonic crystals.

  • 725.
    Zhao, Zhi
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Zhang, A. N.
    Zhou, X. Q.
    Chen, Y. A.
    Lu, C. Y.
    Karlsson, Anders
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Pan, J. W.
    Experimental realization of optimal asymmetric cloning and telecloning via partial teleportation2005In: Physical Review Letters, ISSN 0031-9007, E-ISSN 1079-7114, Vol. 95, no 3, p. 030502-Article in journal (Refereed)
    Abstract [en]

    We report an experimental realization of both optimal asymmetric cloning and telecloning of single photons by making use of partial teleportation of an unknown state. In the experiment, we demonstrate that, conditioned on the success of partial teleportation of single photons, not only the optimal asymmetric cloning can be accomplished, but also one of two outputs can be transferred to a distant location, realizing the telecloning. The experimental results represent a novel way to achieve quantum cloning and may have potential applications in the context of quantum communication.

  • 726.
    Zheng, Li-Rong
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Duo, Xinzhong
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Nejad, Majid B.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Rodriguez Duenas, Saul
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Ismail, Muhammed
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Tenhunen, Hannu
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    On-chip versus off-chip passives in radio and mixed-signal system-on-package design2006In: ESTC 2006 - 1st Electronics Systemintegration Technology Conference, New York: IEEE , 2006, p. 221-232Conference paper (Refereed)
    Abstract [en]

    Optimal total solution for new radio architecture and implementation requires accurate trade-offs for off-chip versus off-chip passives. In this paper, a complete and systematic design methodology for RF blocks in SoP (system-on-package) versus SoC (system-on-chip) is presented. This methodology explores trade-offs between Performance and cost when different on-chip or off-chip passives are used. For a better presentation, the method and design techniques are demonstrated through four multi-band/multi-standard radio design examples with various technologies and different circuit topologies. Our study reveals that, in order to obtain cost benefits in RF-SoPs, small RF chips should be merged as larger chips and the integration density of each RF chip should be high enough. Our study also indicates that in a complex chip like a multi-band radio, moving passives off chip could achieve further cost savings and significant performance improvements. These are general conclusions but, our method offers a detailed analysis which can give quantitative measurements of cost savings and performance improvements in off-chip versus off-chip passives in RF SoP design.

  • 727.
    Zheng, Li-Rong
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    Shen, Meigen
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Duo, Xinzhong
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Tenhunen, Hannu
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    Embedded smart systems for intelligent paper and packaging2005In: 55th Electronic Components & Technology Conference, Vols 1 and 2, 2005 Proceedings, 2005, p. 1776-1782Conference paper (Refereed)
    Abstract [en]

    In this paper, we present architecture, circuit implementation and integration issues of an embedded smart system for innovative, long-range interconnected identification/sensor network in warehouse and intelligent goods distribution systems. The network is interconnected via IEEE 802.11 and ultra-wideband (UWB) wireless air interfaces. A self-powered, ultra-low power UWB transceiver with BPSK modulation is designed for transponders and implemented in 0.18um CMOS technology. Low power consumption is achieved by developing innovative circuit and system architectures. Instead of pumping up energy from the Gaussian pluses emitted by the reader, a power converter draws energy from the 802.11 access point and its surrounding electromagnetic waves. Functionality of the transceiver is verified and integration issues for smart labels are investigated on thin foils of liquid crystal polymer.

  • 728. Zheying, L.
    et al.
    Chaxia, L. J. L.
    Shuo, Li
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Study on pervasive computing architecture of electronic instrument2009In: ICIEA 2009. 4th IEEE Conference on Industrial Electronics and Applications, IEEE , 2009, p. 3969-3972Conference paper (Refereed)
    Abstract [en]

    A novel model and architecture of measurement bus system and/or electronic instrument for pervasive computing network are proposed in this paper. With DFG model analysis for measurement bus system and electronic instrument, it is checked for the ability of network communication of measurement bus system and electronic instrument. As the results of model analysis, the bottleneck for data communication of the bus and the instrument is the communication architecture. To meet the requirement of pervasive computing network a communication unit is added on data acquisition subsystem in the bus system and instrument. Such a measurement bus system and/or instrument can satisfy pervasive computing network and make a strong and smart measurement and control system without increase the complexity and memory size requirement of measurement bus system and instrument.

  • 729. Zheying, L.
    et al.
    Shuo, L.
    Minjie, M.
    Li, Li
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    SFG modeling for consistency checking of mixed-signal SoC2005In: 2005 6th International Conference on ASIC Proceedings, 2005, p. 956-959Conference paper (Refereed)
    Abstract [en]

    This paper described a modeling method for consistency checking of IP blocks used in design of a mixed-signal SoC (MS SoC). The consistency includes four points in the MS SoC design to guarantee the IP blocks suitable for applications. The four points are architecture matching, parameter matching, time matching, and frequency matching. Based on the signal flow graph (SFG), the MS SoC constructed by different IP blocks can be a signal processing system including analog part and digital part. After adding two new definitions on an edge function, which is used for the description of the parameter consistency, a set of nodes and edges function becomes the base of the checking model. The checking model can describe the consistency of the architecture and the parameter including time and frequency matching.

  • 730.
    Zhu, Ning
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP. KTH, School of Information and Communication Technology (ICT), Centres, Zhejiang-KTH Joint Research Center of Photonics, JORCEP.
    Song, Jun
    KTH, School of Information and Communication Technology (ICT), Centres, Zhejiang-KTH Joint Research Center of Photonics, JORCEP.
    Wosinski, Lech
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT. KTH, School of Information and Communication Technology (ICT), Centres, Kista Photonics Research Center, KPRC.
    He, Sailing
    KTH, School of Electrical Engineering (EES), Electromagnetic Engineering. KTH, School of Information and Communication Technology (ICT), Centres, Zhejiang-KTH Joint Research Center of Photonics, JORCEP.
    Cross-Order Echelle Grating Triplexer Based on Amorphous Silicon Nanowire Platform2008In: 2008 7TH INTERNATIONAL CONFERENCE ON THE OPTICAL INTERNET (COIN), NEW YORK: IEEE , 2008, p. 37-38Conference paper (Refereed)
    Abstract [en]

    We present fabrication and measurement results of an ultracompact silicon-on-insulator-based echelle-grating triplexer, which uses different diffraction orders to cover a large spectral range from 1.3 mu m to 1.5 mu m, with a footprint of 150 mu m x 200 mu m.

  • 731. Zimmer, Heiko
    et al.
    Jantsch, Axel
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Error-tolerant Interconnect Schemes2005In: Interconnect-Centric Design for Advanced SoC and NoC / [ed] Jari Nurmi, Hannu Tenhunen, Jouni Isoaho, Axel Jantsch, Springer, 2005, p. 155-176Chapter in book (Refereed)
    Abstract [en]

    The Network-on-Chip paradigm targets future Systems-on-Chip built of a large number of reusable, independent Intellectual-Property-blocks (IPs). A typical approach is to align these IPs as tiles in a regular manner, each associated with a wrapper providing access to the on-chip network. The network itself is a regular structure composed of switches/routers and the interconnecting links. The objective of implementing a Network-on-Chip is to decouple computation from communication by offering a uniform, reliable, and versatile communication platform for all the inter-IP communication required by a typical SoC application. Thus, the need for custom wiring to build an application-specific communication infrastructure is overcome. Furthermore, placement and routing are simplified for the whole NoC because both the IPs and the network components are encapsulated from one another except for a defined network interface providing network access in terms of services usable by the IP for all communication it requires with its surroundings. To fully exploit the advantages this approach offers, the network must provide defined, reliable communication services to the resources attached to it. This problem is far from trivial since the network links will most likely not be error-free in future deep submicron technology generations. While much work is done to develop robust transmission schemes, it is expected that especially crosstalk will seriously affect interconnect reliability. When the physical layer of an on-chip network fails despite all preventive measures taken, the effect should be controlled. This is what the error-tolerant interconnect schemes provide: They increase the network reliability and hide imperfections from the applications which use the communication services offered. Reliable network services are of great importance since applications have demands on communication that must be fulfilled to achieve correct application behaviour. In a classical approach, the communication infrastructure of a SoC is a combination of shared buses and custom designed interconnect to meet specific requirements. However, when all communication should be transported over a common medium, the on-chip network, it must be taken into account that the demands are different for different applications and may include bandwidth guarantees, integrity requirements or deadlines for completion of a specific task in real-time applications. Typically, an application running on a SoC is comprised of multiple processes associated to different NoC-resources. Naturally, the characteristics of data transport within one application are not uniform since different traffic types such as control messages, audio signals and video streams have to coexist. Even seemingly regular data streams become irregular during processing. For instance video streams are usually encoded such that only the delta between frames are transmitted, which makes the communicated data volume higly dependent on the video content. Closing the gap between the hardware platform's possibilities and the applications' requirements is the demanding task of error-tolerant interconnect schemes. Their aim is to provide a network with defined properties to the application. In the ideal case, what the applications see is an error-free communication medium fulfilling all their communication needs. Furthermore, this idea hides the physical implementation details of a specific technology. By providing defined services, the border between platform design (technology, layout, error-tolerant interconnect scheme) and application design (using communication at defined QoS-levels) is clear. Whichmeasures are taken to implement an error-tolerant interconnect scheme depends on the specific applications' requirements and the constraints imposed by the selected platform/architecture. Therefore, we give a general overview before focusing on one specific example.

  • 732. Zimmermann, J.
    et al.
    Saravanan, B. K.
    Marz, R.
    Kamp, M.
    Forchel, A.
    Anand, Srinivasan
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Large dispersion in photonic crystal waveguide resonator2005In: Electronics Letters, ISSN 0013-5194, E-ISSN 1350-911X, Vol. 41, no 7, p. 414-415Article in journal (Refereed)
    Abstract [en]

    Group delay and chromatic dispersion of a Fabry-Perot resonator embedded in a photonic crystal waveguide have been directly measured at 1.55 mu m avelength using the phase-shift technique. The photonic crystal waveguide resonator was fabricated in an InGaAsP/InP heterostructure and was designed to show a channel spacing of 100 GHz. Group velocity dispersion up to 250 ps/nm was observed.

  • 733. Zurauskiene, N.
    et al.
    Marcinkevicius, Saulius
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Janssen, G.
    Goovaerts, E.
    Notzel, R.
    Koenraad, P. M.
    Wolter, J. H.
    Optically detected microwave resonance and carrier dynamics in InAs/GaAs quantum dots2005In: Acta Physica Polonica. A, ISSN 0587-4246, E-ISSN 1898-794X, Vol. 107, no 2, p. 435-439Article in journal (Refereed)
    Abstract [en]

    The properties of small-sized high density InAs/GaAs quantum dots (emitting at 1.25 eV) are studied by means of optically detected microwave resonance spectroscopy and time resolved photoluminescence techniques. The results are discussed in terms of trapping and thermal escape of the carriers as well as their relaxation and recombination in quantum dots. The data are compared with those recently obtained on shallowly formed InAs quantum dot structures.

  • 734.
    Åkermark, Torbjörn
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Doremus, R. H.
    Comment on "oxidation of alloys containing aluminum and diffusion in Al2 O3 " [J. Appl. Phys. 95, 3217 (2004)]2005In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 97, no 11, p. 116109-Article in journal (Refereed)
    Abstract [en]

    The introduction of AlO as the diffusing species can be seen as an attempt to bridge the gap between the two scientific communities: those working on the oxidation of metals and those working on the oxidation of silicon. The attempt is, however, not successful and would have been more successful if the Wagner theory [O. Wagner, Z. Phys. Chem. Abt. B 21, 25 (1993)] would have been used to evaluate the mechanisms. There is also a lack of agreement with the two-stage oxidation experiment, oxidation first in O-16 and then in O-18. The experimental O-18 profile in the oxides formed cannot be explained by the diffusion of AlO, so it is unlikely that AlO is the diffusing species during oxidation.

  • 735.
    Åman, Erik
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    A Distributed Cachefor Very Large Objects2001Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Within a few years’ time, the Internet is expected to be used to transfer highquality video material and other bandwidth-demanding objects to a much larger extent than today. Users would prefer to be able to access such very large objects at an arbitrary point in time without any kind of preparation or advance planning. Offering such services on a large scale puts high demands on the network.

    Using a caching Web proxy server may increase the bandwidth and reliability perceived by the users while reducing the load on the network. This can be done transparently to the users.

    This thesis presents the principles for a caching Web proxy server better adapted to this expected traffic pattern. The bandwidth usage and transfer rate can be improved by taking advantage of the longer persistence of connections and by assuming that comparatively few objects will be popular at any given time. An experimental implementation has been developed in order to test the main principles. The new server is designed to operate in a distributed fashion by employing several cooperating servers at strategic points in the network. The system optimizes reliability and throughput by dynamically selecting from where to download objects based on current traffic and previous statistics.

  • 736.
    Öberg, Johnny
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Plosila, Juha
    Ellervee, Peeter
    Automatic synthesis of asynchronous circuits from synchronous RTL descriptions2005In: Norchip 2005, Proceedings, 2005, p. 200-205Conference paper (Refereed)
    Abstract [en]

    As the dimensions of ASICs shrink down to the nanometer regime, the variability of the process parameters will increase. This variability threatens to make it extremely difficult to distribute a synchronous clock. all over the chip. Another option would be to replace critical synchronous parts with asynchronous counterparts with the same functionality. The main problems are, first, there is no established tool-flow that makes it easy for a designer to design an asynchronous circuits, and, second, there are no established design automation tools, except a few experimental ones. In addition, most designers today are trained to design synchronous circuits and have to be retrained. In this paper we present a method that solves all three of these problems, i.e., it allows a designer to start in the synchronous domain, and then automatically transform the synchronous representation of the circuit into an asynchronous one.

  • 737.
    Ögren, Niklas
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Selecting/realization of Virtual Private Networks with Multiprotocol Label Switching or Virtual Local Area Networks2002Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Many reports have been written about the techniques behind Virtual Private Networks (VPN) and Multi Protocol Label Switching (MPLS). They usually deal with the low level design of the software implementing a specific technique. The initial products are usually not mature enough to run in a large network or have to be adjusted in some way to fit.

    This report investigates the different ways of implementing strict layer 2 Virtual Private Networks in an existing nation-wide Gigabit Ethernet. The infrastructure in use, as well as the hardware, has to be used without major changes. Since 1998/1999, when MPLS first started in the laboratories, development has continued. Today it is possible to introduce MPLS or tunneled national virtual local area network into an existing network. This requires high speed, fault tolerant, and stable hardware and software.

    Going beyond the separation of traffic at layer 3 using Virtual Private Networks, i.e., IPSec, we can tunnel layer 2 traffic through a network. Although the first layer 3 VPN products are already in use, layer 2 VPNs still need to be evaluated and brought into regular use. There are currently two ways of tunneling VLANs in a core network: tunneled VLANs (or as Extreme Networks calls them, VMANs) and MPLS.

    This project showed that it is possible to start with a VLAN-only solution, and then upgrade to MPLS to solve scalability issues. The VMAN solution can not be used at Arrowhead, since there are too many disadvantages in the way Extreme Networks has implemented it. However, a mix of tunneling VMAN in a VLAN core is possible, and enables customer tagging of VLANs in a Layer 2 VPN. Furthermore, the testing of EAPS and per-VLAN Spanning Tree Protocol turned out well, and showed that EAPS should not be used when there is more than one loop.

  • 738.
    Östling, Mikael
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Malm, B. Gunnar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Von Haartman, Martin
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Hållstedt, Julius
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Hellström, Per-Erik
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shili
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Critical technology issues for deca-nanometer MOSFETs2007In: ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings, 2007, p. 27-30Conference paper (Refereed)
    Abstract [en]

    An overview of critical integration issues for future generation MOSFETs towards 10 nm gate length is presented. Novel materials and innovative structures are discussed. The need for high-K gate dielectrics and a metal gate electrode is discussed. Different techniques for strain-enhanced mobility are discussed.

  • 739.
    Östling, Mikael
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Malm, B. Gunnar
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    von Haartman, Martin
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Hållstedt, Julius
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Zhang, Zhen
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Hellstrom, Per-Erik
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zhang, Shili
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Device integration issues towards 10 nm MOSFETs2006In: 2006 25TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS, VOLS 1 AND 2, PROCEEDINGS, NEW YORK, NY: IEEE , 2006, p. 25-30Conference paper (Refereed)
    Abstract [en]

    An overview of critical integration issues for future generation MOSFETs towards 10 nm gate length is presented. Novel materials and innovative structures are discussed. Implementation of high K gate dielectrics is presented and device performance is demonstrated for TiN metal gate surface channel SiGe MOSFETs with a gate stack based on ALD-formed HfO(2)/Al(2)O(3). Low frequency noise properties for those devices are also analyzed. A selective SiGe epitaxy process for low resistivity source/drain contacts has been developed and implemented in pMOSFETs. A spacer pattering technology using optical lithography to fabricate sub 50 nm high-frequency MOSFETs and nanowires is demonstrated, Finally ultra thin body Sol devices with high mobility SiGe channels are demonstrated.

  • 740.
    Östling, Mikael
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Malm, Bengt Gunnar
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Hellström, Per-Erik
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Radamson, Henry H.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Isheden, Christian
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Seger, Johan
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Von Haartman, Martin
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Zhang, Shi-Li
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Novel integration concepts for sige-based rf-MOSFETs2005In: Proc. Electrochem. Soc., 2005, p. 270-284Conference paper (Refereed)
    Abstract [en]

    An overview of critical integration issues for future generation rf-MOSFETs is presented. The process requirements and implementation of selective epitaxy for the source and drain regions is given. In-situ doping of highly boron doped recessed SiGe S/D is demonstrated. Channel region engineering is discussed and 50 nm strained SiGe pMOSFETs are demonstrated. Implementation of high-κ gate dielectrics is presented and device performance is demonstrated for surface channel MOSFETs with a gate stack based on ALD-formed HfO2/Al 2O3. Low frequency noise properties for those devices are analyzed. Contact metallization issues are critical for ultra scaled devices and here the implementation of NiSi on SiGe(C) regions as well as on ultra thin body SOI MOSFETs are presented. Finally, a spacer pattering technology using optical lithography to fabricate sub-50 nm high-frequency MOSFETs is demonstrated.

  • 741.
    Östman, Fredrik
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Automated Interface Switching for Wireless PDAs2001Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Mobility has become one of the major driving forces behind the Internet research effort for the last couple of years. Many large computer companies have begun to shift their focus and are trying to converge into the telecommunications and computing market. With the huge potential market of mobile/cellular phones to build on, hybrids between cellular phones and computers are a very lucrative and relatively new area. Recent efforts to bring traditional telecommunications closer to an IP based environment (for example the development and deployment of GPRS) have created new possibilities for the future of mobile systems. Personal Digital Assistants (PDAs) have been around for a couple of years, and they are getting ever more advanced and powerful. Considering how it will soon be very easy to connect these PDAs to the Internet (or any inter-, intranet), using faster and less expensive carriers and technology than ever before, and the new services that can be offered as a result, the market for - and usage of - PDAs have the potential to grow even more rapidly than before.

    This Master of Science Thesis will investigate the current and near future development of wireless PDAs, give an analysis of the most suitable technologies and discuss the new capabilities they can provide to consumers. Software for Microsoft Windows CE will be developed which manages the network interface selection for a PDA. The software, which will be integrated with Microsoft Windows CE, will automatically select the best interface for internetworking when two or more networks are available.

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