The junction termination extension (JTE) structures for ultrahigh-voltage (UHV) devices consumes a considerable part of the semiconductor chip area. The JTE area is closely related to chip performance, process yield and ultimately device cost. The JTE lengths for UHV devices (i.e., > 30 kV) are still unknown, not visible in the scientific literature and have therefore been predicted in this study by means of two-dimensional numerical simulations using the Sentaurus based technology computer-aided design (TCAD) tool. A previously reported space-modulated, two-zone JTE (SM-JTE) structure has been used as an input to set up a suitable TCAD model, which is further scaled to JTE lengths required for 40 kV class and 50 kV class SiC PiN diodes. The simulation results indicate that the SM-JTE requires an 1800 μm one-sided JTE length with 27 guard rings for a 40 kV theoretical PiN diode and 2700 μm with 36 guard rings for a 50 kV device, resulting in breakdown voltages of 41.4 kV and 51.7 kV, respectively. Moreover, the design considerations of different JTE categories are discussed with focus on the adaptability of the termination structures in ultrahigh-voltage devices, e.g., V B > 30 kV, which results in a comparison of the SM-JTE structure with other high-voltage JTE designs.

Recent advancements in silicon carbide (SiC) power semiconductor technology enable developments in the high-power sector, e.g., high-voltage-direct-current (HVdc) converters for transmission, where today silicon (Si) devices are state-of-the-art. New submodule (SM) topologies for modular multilevel converters offer benefits in combination with these new SiC semiconductors. This article reviews developments in both fields, SiC power semiconductor devices and SM topologies, and evaluates their combined performance in relation to core requirements for HVdc converters: grid code compliance, reliability, and cost. A detailed comparison of SM topologies regarding their structural properties, design and control complexity, voltage capability, losses, and fault handling is given. Alternatives to state-of-the-art SMs with Si insulated-gate bipolar transistors (IGBTs) are proposed, and several promising design approaches are discussed. Most advantages can be gained from three technology features. First, SM bipolar capability enables dc fault handling and reduced the energy storage requirements. Second, SM topologies with parallel conduction paths in combination with SiC metal-oxide-semiconductor field-effect transistors offer reduced losses. Third, a higher SM voltage enabled by a higher blocking voltage of SiC devices results in a reduced converter complexity. For the latter, ultrahigh-voltage bipolar devices, such as SiC IGBTs and SiC gate turn-off thyristors, are envisioned.

Dynamic avalanche (DA) phenomena and current filament (CF) formation are two extreme conditions observed in high-power devices, setting the maximum limit on turn-on/off current capability and di/dt in Silicon-based bipolar devices. The properties of the Silicon Carbide (SiC) material enable devices with increased resilience for DA and CF compared to Si counterparts, and thus the SOA limits may be extended. In this study, the limit of DA and CF in SiC-based semiconductor structures are investigated by numerical TCAD simulations, for different current levels, di/dt, and temperatures for high-voltage devices (e.g., 20 kV class). DA is first indicated for di/dt beyond 105 kA/μs for current densities in the range of 50–1000 A/cm2, at 448 K. Similarly, stray inductance induced avalanche conditions are initiated above 33 kA/μs, while CF is initiated for di/dt starting from 83 kA/μs for current densities in the range of 8.3 kA/cm2. Moreover, the effects of the stray inductance in the main circuit loop are studied which may cause critical voltage transients during certain operating conditions. The outcome of the study may be useful to determine safe-operating-area limits and to be used as input for power electronic converter design as well as gate driver design for high-power electronic systems.

Technology-based computer-aided design (TCAD) models have been used to predict the static and dynamic performance of ultrahigh-voltage (UHV) 4H-Silicon Carbide (SiC) PiN diodes, insulated-gate bipolar transistors (IGBTs), and gate turn-off (GTO) thyristors designed for 2050 kV blocking voltage capability. The simulated forward voltage drops of 2050 kV device designs range between 3.15.6 V for PiN diodes, 4.210.0 V for IGBTs, and 3.47.8 V for GTO thyristors at 20 A/cm2 for room temperature operation. Moreover, with a low switching frequency application (i.e., 150 Hz) in mind, the switching energy losses using an 30 kV SiC GTO thyristor design are approximately EON/EOFF_GTO = 268/640 mJ, EON/EOFF_FWD = 388/6 mJ diode recovery losses, and EON/EOFF_SNUB = 954/22 mJ snubber component losses. The corresponding values for a SiC IGBT design are EON/EOFF_IGBT = 983/748 mJ, both operated at 448 K, A = 20 s, and with 30 A/cm2. The simulation output is used in a benchmark evaluation for a 1 GW, 640 kV application case, employing modular multilevel high-power converter legs comprising series-connected UHV SiC devices and state-of-the-art 4.5 kV Si bi-mode insulated-gate transistors (BiGTs). It is concluded that the high-voltage SiC power electronic building blocks present promising alternatives to existing high-voltage Si device counterparts in terms of system compactness and efficiency.

The performance of theoretical ultra-high-voltagepower semiconductor devices has been predicted by means ofnumerical simulations using the Sentaurus technology computeraideddesign tool. A general silicon carbide punch-throughinsulated-gate bipolar transistor (IGBT) structure has beenimplemented with suitable physics-based models and parametersto reflect the device characteristics in a wide range of deviceblocking voltages from 20 to 50 kV. The models for 20 kV classIGBTs have been implicitly validated by means of publishedexperimental results. Mixed-mode simulations were performedthat predicted total switching energy loss densities of 335, 629,906 and 999 mJ/cm2 for 20, 30, 40 and 50 kV class devicesrespectively, at 25ºC, JC = 20 A/cm2 and an ambipolar carrierlifetime of 20 μs. While the IGBT on-state forward voltage dropreduces, the switching losses increase with higher charge-carrierlifetime for a given current density (e.g., 20 A/cm2). The largespan of simulation results will be used as an input support to thedesign of future high-power converters.

The increased awareness of the on-going climate change accelerates the electric energy system transformation from fossil-fueled power sources towards systems with larger portions of renewable energy sources. Moreover, the grid infrastructure requires reinforcements to cope with increasing electrical energy demand. Flexible AC transmission systems (FACTS) and high-voltage DC (HVDC) transmission systems allow higher grid capacity, efficient transmission over long distances and sub-sea electrical energy transfer. Efficient sub-sea transmission is required for off-shore wind- and intercontinental grid connections. It is predicted that basic power electronic building blocks (PEBB) utilizing SiC-based semiconductor devices will provide converter system benefits (e.g., reduced number of series connected devices, less complex system, lower energy losses, lower cooling requirements and smaller station footprint), in comparison to systems employing Si-based semiconductor devices. The main objective of this thesis is to design, evaluate and identify the performance, requirements, and limitations of high-voltage SiC devices suitable for high-power applications. The SiC semiconductor device characteristics have been investigated by two-dimensional numerical simulations and experiments to assess the suitability in high-power applications. A calibrated set of technology computer-aided design (TCAD) simulation models are used as foundation for estimating the performance of SiC PiN diodes, SiC insulated-gate bipolar transistors (IGBTs) and SiC gate turn-off (GTO) thyristors with blocking voltage capabilities in the range of 20–50 kV. The static and dynamic device performances are assessed along with related gate driver requirements and snubber design requirements. The devices characteristic are studied using physical parameters of device layer structures, device processing parameters, and varying circuit parameters using mixed-mode simulations that results in a wide range of data for device performance predictability. Moreover, the experimental characterization of 10 kV, 100 A SiC metal-oxide semiconductorfield-effect transistor (MOSFET) power modules are demonstrated and compared to Si counterparts. The junction termination extension (JTE) design aspects for 20, 30, 40, and 50 kV devices are investigated where the results are used to predict the active area ratio for each blocking voltage class. In addition, the limit of critical operating conditions such as dynamic avalanche and current filamentation are derived by TCAD simulations, which indicates that the critical operation points are significantly higher than that of Si-based counterparts. The wide-range simulation data have been used in benchmarking SiC-based devices with Si counterparts in an application case of a 1 GW, 640 kV, modular multilevel converter (MMC)-based HVDC system. The analytical benchmark model indicates an energy loss reduction to approximately half by employing SiC device configurations compared to state-of-the-art Si bi-mode insulated gate transistors (BiGTs). The low energy losses along with the benefits by reduction of system complexity, control hardware, cables, and fibers (due to a lower amount of PEBBs), the SiC converter design presents a promising alternative to existing Si-based high-power modular multilevel converters.

In this paper, a technology computer-aided design (TCAD) model of a silicon carbide (SiC) insulated-gate bipolar transistor (IGBT) has been calibrated against previously reported experimental data. The calibrated TCAD model has been used to predict the static performance of theoretical SiC IGBTs with ultra-high blocking voltage capabilities in the range of 20-50 kV. The simulation results of transfer characteristics, IC-VGE, forward characteristics, IC-VCE, and blocking voltage characteristics are studied. The threshold voltage is approximately 5 V, and the forward voltage drop is ranging from VF = 4.2-10.0 V at IC = 20 A, using a charge carrier lifetime of τA = 20 μs. Furthermore, the forward voltage drop impact for different process dependent parameters (i.e., carrier lifetimes, mobility/scattering and trap related defects) and junction temperature are investigated in a parametric sensitivity analysis. The wide-range simulation results may be used as an input to facilitate high power converter design and evaluation. In this case, the TCAD simulated static characteristics of SiC IGBTs is compared to silicon (Si) IGBTs in a modular multilevel converter in a general highpower application. The results indicate several benefits and lower conduction energy losses using ultra-high voltage SiC IGBTs compared to Si IGBTs.

In this project, a Technology CAD (TCAD) model has been calibrated and verified against experimental data of a 15 kV silicon carbide (SiC) bipolar junction transistor (BJT). The device structure of the high voltage BJT has been implemented in the Synopsys Sentaurus TCAD simulation platform and design of experiment simulations have been performed to  extract and fine-tune device parameters and 4H-SiC material parameters to accurately reflect the 15 kV SiC BJT experimental results. The set of calibrated TCAD parameters may serve as a base for further investigations of various SiC device design and device operation in electrical circuits.

This paper presents a thorough characterization of 10 kV SiC MOSFET power modules, equipped with third-generation MOSFET chips and without external free-wheeling diodes, using the inherent SiC MOSFET body-diode instead. The static performance (e.g., IDS-VDS, IDS-VGS, C-V characteristics, leakage current, body-diode characteristics) is addressed by measurements at various temperatures. Moreover, the power module is tested in a simple chopper circuit with inductive load to assess the dynamic characteristics up to 7 kV and 120 A. The SiC MOSFET power module exhibits an on-state resistance of 40 m Omega at room-temperature and leakage current in the range of 100 nA, approximately one order of magnitude lower than that of a 6.5 kV Si-IGBT. The power module shows fast switching characteristics with the turn-on (turn-on loss) and turn-off (turn-off loss) times of 130 ns (89 mJ) and 145 ns (33 mJ), respectively, at 6.0 kV supply voltage and 100 A current. Furthermore, a peak short-circuit current of 900 A and a short-circuit survivability time of 3.5 mu s were observed. The extracted characterization results could serve as input for power electronic converter design and may support topology evaluation with realistic system performance predictability, using SiC MOSFET power modules in the energy transmission and distribution networks.

This paper investigates the benefits of using high-voltage converter cells for transmission applications. These cells employ ultrahigh-voltage SiC bipolar power semiconductors, which are optimized for low conduction losses. The Modular Multilevel Converter with half-bridge cells is used as a test case. The results indicate a reduction of converter volume and complexity, while maintaining low losses and harmonic performance.

A simple analytical PSpice model has been developed and verified for a 4H–SiC based MOSFET power module with voltage and current ratings of 1200 V and 120 A. The analytical simulation model is a temperature dependent silicon carbide (SiC) MOSFET model that covers static and dynamic behavior, leakage current and breakdown voltage characteristics. The technology dependent MOSFET modeling parameters are extracted from characterization measurements, datasheets and PSpice simulations at various temperatures. The SiC MOSFET model is implemented in the PSpice circuit simulation platform using PSpice standard components and analog behavior modeling (ABM) blocks. The MOSFET switching performance is investigated under influence of different circuit elements, such as stray inductance, gate resistance and temperature, in order to study and estimate on-state and switching losses pre-requisite for design of various converter and inverter topologies. The performance of the SiC MOSFET model is fairly accurate and correlates well with the measured results over a wide temperature range.

A simple analytical Spice-type model has been developed and verified for the first time for 4H-SiC-based bipolar junction transistor (BJT) power module with voltage and current rating of 1200 V and 800 A. The simulation model is based on a temperature-dependent silicon carbide (SiC) Gummel-Poon model for high-power applications. PSpice simulations are performed to extract technology-dependent modeling parameters coupled with static and dynamic characteristics of BJTs at different temperatures and validated against the measured data. Influence of various circuit elements, for instance, stray inductance and base resistance and internal device modeling parameters, carrier life time, and emitter doping, on switching losses has been studied. The performance of the SiC BJT model is fairly accurate and correlates well with the measured results over a wide temperature range.

The surge current capability of the body-diode of SiC MOSFETs is experimentally analyzed in order to investigate the possibility of using SiC MOSFETs for HVDC applications. SiC MOSFET discrete devices and modules have been tested with surge currents up to 10 times the rated current and for durations up to 2 ms. Although the presence of stacking faults cannot be excluded, the experiments reveal that the failure may occur due to the latch-up of the parasitic n-p-n transistor located in the SiC MOSFET.

In this paper, the theoretical performance of ultra-high voltage Silicon Carbide (SiC) based devices are investigated. The SiC semiconductor device conduction power loss and switching power loss are predicted and compared with different modeling approaches, for SiC metal-oxide semiconductor field-effect transistors (MOSFETs) up to 20 kV and SiC gate turn-off (GTO) thyristors and SiC insulated-gate bipolar transistors (IGBTs) up to 50 kV. A parameter sensitivity analysis has been performed to observe the device power loss under various operating conditions, for instance current density, temperature and charge carrier lifetime. Also, the maximum allowed current density and maximum switching frequency for a maximum chip power dissipation limit of 300 W/cm(2) are investigated. The simulation results indicate that the SiC MOSFET has the highest current capability up to approximately 15 kV, while the SiC IGBT is suitable in the range of 15 kV to 35 kV, and thereafter the SiC GTO thyristor supersedes the loss performance from 35 kV to 50 kV.

In this paper, a circuit level simulation model for SiC MOSFET power modules has been assessed. The static and dynamic characteristics of a 1.2 kV 800 A SiC MOSFET power module has been measured, simulated and verified in the PSpice circuit simulation platform. The SiC MOSFET power module is evaluated in two case studies, first where the power module is treated as a single device (simulated with one sub-module) and secondly where the performance of the power module is simulated as multiple MOSFET chips in parallel (multiple sub-modules). Here, the bond-wires between the chips are also included as inductive elements. The simulated static characteristics of the SiC MOSFET power module are well aligned with the measured data. In the first case, the simulation model in PSpice shows accurate dynamic performance overall, with exceptions from high-frequency oscillations that arises during turn-on and turn-off. The second case study shows that the oscillations can be captured by introducing multiple MOSFET chips in parallel and where the bond-wires in between are represented by inductors. A slight increase of high-frequency oscillations is noticed but on the cost of reduced simulation robustness (e.g. convergence issues) due to a more complex simulation circuit. Finally, it is concluded that the simulation model performance is overall accurate, both for static and dynamic performance. Further, the model is capable to estimate on-state loss and switching loss in a satisfactory manner and is utilized to evaluate and optimize power electronic converter cell parameters, for instance stray inductance, gate resistance and temperature, and their impact on converter energy loss.

In this paper, the static and dynamic characteristics of a 1200 V and 120 A silicon carbide (SiC) MOSFET power module has been measured, simulated and verified in the PSpice circuit simulation platform. Experimental measurements and PSpice simulations are performed to extract the technology dependent modeling parameters. The model is implemented in the PSpice circuit simulation platform using both standard components and analog behavior modeling (ABM) blocks. The simulation results of the model is fairly accurate and correlates well with the measured results over a wide temperature range. The developed model is used to facilitate converter design at cell level and hence predict and optimize the cell performance (i.e., energy losses) with varying circuit parameters (e.g., stray inductances, temperatures, gate resistances etc.,).

The characteristics of a 1200 V and 800 A bipolar junction transistor (BJT) power module has been measured, simulated and verified for the first time in the PSPICE platform. The simulation model is based on a silicon carbide (SiC) Gummel-Poon model for high power applications. The implemented model has been extended with temperature dependent equations in order to extend the BJT operating temperature range. PSPICE simulations are performed to extract technology dependent modeling parameters coupled with static and dynamic characteristics of BJTs at different temperatures and validated against the measured data. The performance of the SiC BJT model is fairly accurate and correlates well with the measured results over a wide temperature range.

Recent advancements in silicon carbide (SiC) powersemiconductor technology enable developments in the high-powersector, e.g., high-voltage direct current (HVdc) converters fortransmission, where today silicon (Si) devices are state-of-the-art. New submodule (SM) topologies for modular multilevelconverters (MMCs) offer benefits in combination with these newSiC semiconductors. This paper reviews developments in bothfields, SiC power semiconductor devices and SM topologies, andevaluates their combined performance in relation to core require-ments for HVdc converters: grid code compliance, reliability, andcost.A detailed comparison of SM topologies regarding theirstructural properties, design and control complexity, voltagecapability, losses, and fault handling is given. Alternatives tostate-of-the-art SMs with Si insulated-gate bipolar transistors(IGBTs) are proposed, and several promising design approachesare discussed. Most advantages can be gained from three tech-nology features. Firstly, SM bipolar capability enables dc faulthandling and reduced energy storage requirements. Secondly, SMtopologies with parallel conduction paths in combination with SiCmetal-oxide-semiconductor field effect transistors (MOSFETs)offer reduced losses. Thirdly, a higher SM voltage enabledby higher blocking voltage of SiC devices results in reducedconverter complexity. For the latter, ultra-high-voltage (UHV)bipolar devices, such as SiC IGBTs and SiC gate turn-offthyristors (GTOs), are envisioned