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  • 1.
    A. M. Naiini, Maziar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Horizontal Slot Waveguides for Silicon Photonics Back-End Integration2014Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    This thesis presents the development of integrated silicon photonic devices. These devices are compatible with the present and near future CMOS technology. High-khorizontal grating couplers and waveguides are proposed. This work consists of simulations and device design, as well as the layout for the fabrication process, device fabrication, process development, characterization instrument development and electro-optical characterizations.

    The work demonstrates an alternative solution to costly silicon-on-insulator photonics. The proposed solution uses bulk silicon wafers and thin film deposited waveguides. Back-end deposited horizontal slot grating couplers and waveguides are realized by multi-layers of amorphous silicon and high-k materials.

    The achievements of this work include: A theoretical study of fully etched slot grating couplers with Al2O3, HfO2 and AIN, an optical study of the high-k films with spectroscopic ellipsometry, an experimental demonstration of fully etched SiO2 single slot grating couplers and double slot Al2O3 grating couplers, a practical demonstration of horizontal double slot high-k waveguides, partially etched Al2O3 single slot grating couplers, a study of a scheme for integration of the double slot Al2O3  waveguides with selectively grown germanium PIN photodetectors, realization of test chips for the integrated germanium photodetectors, and study of integration with graphene photodetectors through embedding the graphene into a high-k slot layer.

    From an application point of view, these high-k slot waveguides add more functionality to the current silicon photonics. The presented devices can be used for low cost photonics applications. Also alternative optical materials can be used in the context of this photonics platform.

    With the robust design, the grating couplers result in improved yield and a more cost effective solution is realized for integration of the waveguides with the germanium and graphene photodetectors.

     

     

     

     

  • 2. Abadal, Sergi
    et al.
    Alarcon, Eduard
    Cabellos-Aparicio, Albert
    Lemme, Max C.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Nemirovsky, Mario
    Graphene-Enabled Wireless Communication for Massive Multicore Architectures2013In: IEEE Communications Magazine, ISSN 0163-6804, E-ISSN 1558-1896, Vol. 51, no 11, p. 137-143Article in journal (Refereed)
    Abstract [en]

    Current trends in microprocessor architecture design are leading towards a dramatic increase of core-level parallelization, wherein a given number of independent processors or cores are interconnected. Since the main bottleneck is foreseen to migrate from computation to communication, efficient and scalable means of inter-core communication are crucial for guaranteeing steady performance improvements in many-core processors. As the number of cores grows, it remains unclear whether initial proposals, such as the Network-on-Chip (NoC) paradigm, will meet the stringent requirements of this scenario. This position paper presents a new research area where massive multicore architectures have wireless communication capabilities at the core level. This goal is feasible by using graphene-based planar antennas, which can radiate signals at the Terahertz band while utilizing lower chip area than its metallic counterparts. To the best of our knowledge, this is the first work that discusses the utilization of graphene-enabled wireless communication for massive multicore processors. Such wireless systems enable broadcasting, multicasting, all-to-all communication, as well as significantly reduce many of the issues present in massively multicore environments, such as data coherency, consistency, synchronization and communication problems. Several open research challenges are pointed out related to implementation, communications and multicore architectures, which pave the way for future research in this multidisciplinary area.

  • 3. Abd El Ghany, M. A.
    et al.
    El-Moursy, M. A.
    Korzec, D.
    Ismail, Mohammed
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits. Ohio State University, Columbus, OH, United States .
    Asynchronous BFT for low power networks on chip2010In: ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, IEEE , 2010, p. 3240-3243Conference paper (Refereed)
    Abstract [en]

    Asynchronous Butterfly Fat Tree (BFT) architecture is proposed to achieve low power Network on Chip (NoC). Asynchronous design could reduce the power dissipation of the network if the activity factor of the data transfer between two switches (αdata satisfies a certain condition. The area of Asynchronous BFT switch is increased by 25% as compared to Synchronous switch. However, the power dissipation of the Asynchronous architecture could be decreased by up to 33% as compared to the power dissipation of the conventional Synchronous architecture when the αdata equals 0.2 and the activity factor of the control signals is equal to 1/64 of the αdata. The total metal resources required to implement Asynchronous design is decreased by 12%.

  • 4. Abd El Ghany, M. A.
    et al.
    El-Moursy, M. A.
    Korzec, D.
    Ismail, Mohammed
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits. Ohio State University, Columbus, OH, United States .
    Power characteristics of networks on chip2010In: ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, IEEE , 2010, p. 3721-3724Conference paper (Refereed)
    Abstract [en]

    Power characteristics of different Network on Chip (NoC) topologies are developed. Among different NoC topologies, the Butterfly Fat Tree (BFT) dissipates the minimum power. With the advance in technology, the relative power consumption of the interconnects and the associate repeaters of the BFT decreases as compared to the power consumption of the network switches. The power dissipation of interswitch links and repeaters for BFT represents only 1% of the total power dissipation of the network. In addition of providing high throughput, the BFT is a power efficient topology for NoCs.

  • 5. Abd El Ghany, M. A.
    et al.
    El-Moursy, M. A.
    Korzec, D.
    Ismail, Mohammed
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Power efficient networks on chip2009In: 2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009, 2009, p. 105-108Conference paper (Refereed)
    Abstract [en]

    a low power switch design is proposed to achieve power-efficient Network on Chip (NoC). The proposed NoC switch reduce. The power consumption oy the Butterfly Fat Tree (BFT) architecture by 28 % as compared to the conventional BFT switch. Moreover. The power reduction technique is applied to different NoC architectures. The technique reduce. The power consumption oy the network by up to 41%. Whe. The power consumption oy the whole network includin. The interswich links and repeaters is taken into account. The overall power consumption is decreased by up to 33% at the maximum operating frequency oy the switch. The BFT architecture consume. The minimum power as compared to other NoC architectures.

  • 6. Abd Elghany, M. A.
    et al.
    El-Moursy, M. A.
    Korzec, D.
    Ismail, Mohammed
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits. Ohio State University, United States .
    High throughput architecture for OCTAGON network on chip2009In: 2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009, IEEE , 2009, p. 101-104Conference paper (Refereed)
    Abstract [en]

    High Throughput Octagon architecture to achieve high performance Networks on Chip (NoC) is proposed. The architecture increase. The throughput oy the network by 17% while preservin. The average latency. The area of High Throughput OCTAGON switch is decreased by 18% as compared to OCTAGON switch. The total metal resources required to implement High Throughput OCTAGON design is increased by 8% as compared to the total metal resources required to implement OCTAGON design. The extra power consumption required to achiev. The proposed architecture is 2% oy the total power consumption oy the OCTAGON architecture.

  • 7.
    Abedin, Ahmad
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Asadollahi, Ali
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Garidis, Konstantinos
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Hellström, Per-Erik
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics.
    Epitaxial growth of Ge strain relaxed buffer on Si with low threading dislocation density2016In: ECS Transactions, Electrochemical Society, 2016, no 8, p. 615-621Conference paper (Refereed)
    Abstract [en]

    Epitaxial Ge with low dislocation density is grown on a low temperature grown Ge seed layer on Si substrate by reduced pressure chemical vapor deposition. The surface topography measured by AFM shows that the strain relaxation occurred through pit formation which resulted in freezing the defects at Ge/Si interface. Moreover a lower threading dislocation density compared to conventional strain relaxed Ge buffers on Si was observed. We show that by growing the first layer at temperatures below 300 °C a surface roughness below 1 nm can be achieved together with carrier mobility enhancement. The different defects densities revealed from SECCO and Iodine etching shows that the defects types have been changed and SECCO is not always trustable.

  • 8.
    Abedin, Ahmad
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Moeen, Mahdi
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Cappetta, Carmine
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Radamson, Henry H.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Sensitivity of the crystal quality of SiGe layers grown at low temperatures by trisilane and germane2016In: Thin Solid Films, ISSN 0040-6090, E-ISSN 1879-2731, Vol. 613, p. 38-42Article in journal (Refereed)
    Abstract [en]

    This work investigates the crystal quality of SiGe layers grown at low temperatures using trisilane, and germane precursors. The crystal quality sensitivity was monitored for hydrogen chloride and/or minor oxygen amount during SiGe epitaxy or at the interface of SiGe/Si layers. The quality of the epi-layerswas examined by quantifying noise parameter, K-1/f obtained from the power spectral density vs. 1/f curves. The results indicate that while it is difficult to detect small defect densities in SiGe layers by physical material characterization, the noise measurement could reveal the effects of oxygen contamination as low as 0.16mPa inside and in the interface of the layers.

  • 9.
    Abedin, Ahmad
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Noroozi, Mohammad
    KTH, School of Information and Communication Technology (ICT), Materials- and Nano Physics, Functional Materials, FNM.
    Primetzhofer, Daniel
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Radamson, Henry.H
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    GeSnSi CVD Epitaxy using Silane, Germane, Digermane, and Tin tetrachlorideArticle in journal (Refereed)
    Abstract [en]

    In this study, strain relaxed and compressive strained Ge1-x-ySnxSiy (0.015≤x≤0.15 and 0≤y≤0.15) layers were epitaxially grown on Si substrate in a chemical vapor deposition reactor at atmospheric pressure. Digermane (Ge2H6) and germane (GeH4) were used as Ge precursors and tin tetrachloride (SnCl4) was used as Sn precursor. The growth temperature was kept below 400ᵒC to suppress Sn out diffusion. The layers crystal quality and strain were characterized using XRD, high resolution reciprocal lattice mapping and transmission electron microscopy and the surface morphology was investigated by atomic force microscopy (AFM). Furthermore, the low temperature epitaxial growth up to 15% Si atoms incorporation in Ge0.94Sn0.06 was demonstrated by adding silane (SiH4) as Si precursor. Sn contents calculated from high resolution XRD patterns were confirmed by Rutherford backscattering spectroscopy which shows that Sn atoms are mostly positioned in substitutional sites. AFM analysis showed below 1nm surface roughness for both strained and strain relaxed GeSn layers which make the promising materials for photonics and electronics applications.

  • 10. Akbar, F.
    et al.
    Kolahdouz, M.
    Larimian, Sh.
    Radfar, B.
    Radamson, Henry
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Graphene synthesis, characterization and its applications in nanophotonics, nanoelectronics, and nanosensing2015In: Journal of materials science. Materials in electronics, ISSN 0957-4522, E-ISSN 1573-482X, Vol. 26, no 7, p. 4347-4379Article in journal (Refereed)
    Abstract [en]

    In the last decade, as semiconductor industry was approaching the end of the exponential Moore's roadmap for device downscaling, the necessity of finding new candidate materials has forced many research groups to explore many different types of non-conventional materials. Among them, graphene, CNTs and organic conductors are the most successful alternatives. Finding a material with metallic properties combined with field effect characteristics on nanoscale level has been always a dream to continue the ever-shrinking road of the nanoelectronics. Due to its fantastic features such as high mobility, optical transparency, room temperature quantum Hall effect, mechanical stiffness, etc. the atomically thin carbon layer, graphene, has attracted the industry's attention not only in the micro-, nano-, and opto-electronics but also in biotechnology. This paper reviews the basics and previous works on graphene technology and its developments. Compatibility of this material with Si processing technology is its crucial characteristic for mass production. This study also reviews the physical and electrical properties of graphene as a building block for other carbon allotropes. Different growth methods and a wide range of graphene's applications will be discussed and compared. A brief comparison on the performance result of different types of devices has also been presented. Until now, the main focus of research has been on the background physics and its application in electronic devices. But, according to the recent works on its applications in photonics and optoelectronics, where it benefits from the combination of its unique optical and electronic properties, even without a bandgap, this material enables ultrawide-band tunability. Here in this article we review different applications and graphene's advantages and drawbacks will be mentioned to conclude at the end.

  • 11. Akram, Muhammad Nadeem
    et al.
    Xiang, Yu
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Yu, Xingang
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zabel, Thomas
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Hammar, Mattias
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Influence of base-region thickness on the performance of Pnp transistor-VCSEL2014In: Optics Express, ISSN 1094-4087, E-ISSN 1094-4087, Vol. 22, no 22, p. 27398-27414Article in journal (Refereed)
    Abstract [en]

    We have recently reported a 980nm GaAs-based three terminal Pnp transistor-vertical-cavity surface-emitting laser (TVCSEL) operating at room temperature with optical power up to 1.8mW. However, the current gain beta = Delta I-c/Delta I-b was near zero just before lasing and became negative after the lasing threshold. The main cause of the negative current gain was found to be a gradual and position-dependent forward-biasing (saturation) of the base-collector junction with increasing bias even before lasing threshold. In this article, detailed multi-physics device simulations are performed to better understand the device physics, and find ways to avoid the premature saturation of the base-collector junction. We have optimized the thickness of the base region as well as its doping concentration and the location of the quantum wells to ensure that the T-VCSEL is in the active mode throughout its range of operation. That is, the emitter-base junction is forward biased and base-collector junction is reversed biased for sweeping the excess charges out of the base region.

  • 12. Akram, N. M.
    et al.
    Schatz, Richard
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Marcinkevicius, Saulius
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Kjebon, Olle
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Berggren, Jesper
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Experimental evaluation of carrier transport, gain, T0 and chirp of 1.55 mu;m MQW structures with different barrier compositions2005In: Optical Communication, 2005. ECOC 2005. 31st European Conference on, 2005, Vol. 2, p. 297-298Conference paper (Refereed)
    Abstract [en]

    Direct carrier transport measurements were performed for different InGaAsP/InGaAlAs MQW test structures. Shallow InGaAlAs barrier QW showed faster carrier transport. Semi-insulating regrown FP lasers with InGaAlAs barrier QW showed improved high temperature operation, modal gain, differential modal gain and chirp.

  • 13. Alzaher, H.
    et al.
    Al-Ghamdi, M.
    Ismail, Mohammed
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    CMOS low-power bandpass IF filter for Bluetooth2007In: Iet Circuits Devices & Systems, ISSN 1751-858X, Vol. 1, no 1, p. 7-12Article in journal (Refereed)
    Abstract [en]

    Design of a CMOS 18th-order IF (intermediate frequency) bandpass filter for integrated low-IF Bluetooth receivers is presented. The centre frequency and bandwidth of the filter are 3 and 1 MHz, respectively. The proposed filter is based on unity gain fully differential voltage buffers and provides efficient, low power and a small area design solution. The filter, including its automatic tuning circuit, occupies an area of 0.6 mm(2) in a standard 0.5 mu m-CMOS chip. Experimental results show that the filter satisfies the selectivity and dynamic range requirements of Bluetooth while operating from a total supply current of 0.9 mA.

  • 14. Andersson, J. Y.
    et al.
    Ericsson, P.
    Radamson, H. H.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Wissmar, Stanley
    Kolahdouz, Mohammad
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    SiGe/Si quantum structures as a thermistor material for low cost IR microbolometer focal plane arrays2011In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 60, no 1, p. 100-104Article in journal (Refereed)
    Abstract [en]

    Uncooled microbolometer thermal infrared detector technology is presently revolutionizing the infrared technology field. Essential improvement of the cost/performance ratio would be achieved by microbolometer arrays with higher sensitivity, since this allows the use of simpler and less costly camera optics, which implies a lower cost of the complete IR camera. The sensitivity of the microbolometers depends critically on the signal-to-noise ratio of the integrated thermistor material, which is set by its temperature coefficient of resistance (TCR) and noise characteristics. In this work we have investigated the use of epitaxial silicon-germanium/silicon (SiGe/Si) quantum well (QW) structures as a thermistor material. Si0.68Ge0.32/Si QW structures typically give a TCR of 3.0%/K and low noise values. A calculation of the noise equivalent temperature NETD of a bolometer gives 25 mK using the following assumptions: f-number = 1, 30 Hz video frame rate for a 640 x 480 array, with a pixel size 25 x 25 mu m. Higher TCR values are foreseen for SiGe/Si quantum dot structures, and the noise is expected to be similar to the QW based structures.

  • 15. Andersson, J. Y.
    et al.
    Hoglund, L.
    Noharet, B.
    Wang, Q.
    Ericsson, P.
    Wissmar, Stanley
    Asplund, C.
    Malm, H.
    Martijn, H.
    Hammar, Mattias
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Gustafsson, Oscar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Hellström, S.
    Radamson, Henry
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Holtz, P. O.
    Quantum structure based infrared detector research and development within Acreo's centre of excellence IMAGIC2010In: Infrared physics & technology, ISSN 1350-4495, E-ISSN 1879-0275, Vol. 53, no 4, p. 227-230Article in journal (Refereed)
    Abstract [en]

    Acreo has a long tradition of working with quantum structure based infrared (IR) detectors and arrays. This includes QWIP (quantum well infrared photodetector), QDIP (quantum dot infrared photodetector), and InAs/GaInSb based photon detectors of different structure and composition. It also covers R&D on uncooled microbolometers. The integrated thermistor material of such detectors is advantageously based on quantum structures that are optimised for high temperature coefficient and low noise. Especially the SiGe material system is preferred due to the compatibility with silicon technology. The R&D work on IR detectors is a prominent part of Acreo's centre of excellence "IMAGIC" on imaging detectors and systems for non-visible wavelengths. IMAGIC is a collaboration between Acreo, several industry partners and universities like the Royal Institute of Technology (KTH) and Linkoping University. (C) 2010 Elsevier B.V. All rights reserved.

  • 16.
    Ansari, Nazanin
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Khartsev, Sergiy
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Grishin, Alexander
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Multicolor filter all-garnet magneto-optical photonic crystals2012In: Optics Letters, ISSN 0146-9592, E-ISSN 1539-4794, Vol. 37, no 17, p. 3552-3554Article in journal (Refereed)
    Abstract [en]

    We demonstrate a multicolor optical filter and isolator based on a double-cavity magneto-optical (MO) photonic crystal. Being grown as a heteroepitaxial all-garnet multilayer, it compromises a strong MO response and high optical transmittance. Low-loss, high Faraday rotation passbands as well as strong light rejection within the stop band were achieved by optimization of distance between cavities and repetition number of distributed Bragg reflectors.

  • 17.
    Asadollahi, Ali
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Radamson, Henry
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zabel, Thomas
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Hellström, Per-Erik
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Fabrication of strained Ge on insulator via room temperature wafer bonding2014In: 2014 15th International Conference on Ultimate Integration on Silicon, ULIS 2014, IEEE Computer Society, 2014, p. 81-84Conference paper (Refereed)
    Abstract [en]

    This work describes a strained germanium on insulator (GeOI) fabrication process using wafer bonding and etch-back techniques. The strained Ge layer is fabricated epitaxially using reduced pressure chemical vapor deposition (RPCVD). The strained Ge is grown pseudomorphic on top of a partially relaxed Si 0.66Ge0.34 layer. Wafer bonding is performed at room temperature without post-anneal processes and the etch-back steps are performed without mechanical grinding and chemical mechanical polishing (CMP).

  • 18.
    Asadollahi, Ali
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zabel, Thomas
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Roupillard, Gabriel
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Radamson, Henry H.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Hellström, Per-Erik
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Fabrication of relaxed germanium on insulator via room temperature wafer bonding2014In: ECS Transactions: Volume 64, Cancun, Mexico, October 5 – 9, 2014 2014 ECS and SMEQ Joint International Meeting, Electrochemical Society, 2014, no 6, p. 533-541Conference paper (Refereed)
    Abstract [en]

    We report on the fabrication of, high quality, monocrystalline relaxed Germanium with ultra-low roughness on insulator (GeOI) using low-temperature direct wafer bonding. We observe that a two-step epitaxially grown germanium film fabricated on silicon by reduced pressure chemical vapor deposition can be directly bonded to a SiO2 layer using a thin Al2O3 as bonding mediator. After removing the donor substrate silicon the germanium layer exhibits a complete relaxation without degradation in crystalline quality and no stress in the film. . The results suggest that the fabricated high quality GeOI substrate is a suitable platform for high performance device applications.

  • 19.
    Atallah, Jad G.
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Elnaggar, Mohammed Ismail
    Ohio State University.
    Future 4G front-ends enabling smooth vertical handovers2006In: IEEE Circuits & Devices, ISSN 8755-3996, E-ISSN 1558-1888, Vol. 22, no 1, p. 6-15Article in journal (Refereed)
    Abstract [en]

    An overview is given of the most important effects that handover considerations have on the design of multistandard mobile radio transceivers. Focus is on the multitude of design issues and challenges that should be taken into account in the RF/analog front-end part. Topics discussed include the convergence challenge, wireless transceiver design challenge, wireless standards, handover initiation, interworking between GSM and DECT, idle mode issues, possible issues when mobile terminals miss pages, procedure while in active communication in DECT mode, procedure while in active communication in GSM mode, and GSM/WLAN handover.

  • 20. Attaran, A.
    et al.
    Nikan, S.
    Razzaghpour, Milad
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    CMOS class AB power amplifier linearization by feed forward technique for wireless communications2011In: International Journal on Communications Antenna and Propagation, ISSN 2039-5086, Vol. 1, no 1, p. 29-33Article in journal (Refereed)
    Abstract [en]

    This paper presents a class AB PA with an optimized load impedance for maximum output power in a standard 180 nm CMOS technology. This Amplifier shows a measured output power of 22.36 dBm at 2.4 GHz for a supply voltage of 1.8 V. It will display necessary trade offs for optimum output power and small signal gain. Simulation results show that the drain efficiency at 1 dB compression point reaches 31.41%. Additionally, using a feed forward linearization technique, P1-dB is increased to 24.05 dBm which shows 3.46 dB improvement compared to the case without linearization. Enhancement in the amplifier linearity range leads to lower adjacent channel interference and thus higher data transfer rate. © 2011 Praise Worthy Prize S.r.l. - All rights reserved.

  • 21.
    Atwa, Mohamed M.
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Alaskalany, Ahmed
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Elgammal, Karim
    KTH, School of Information and Communication Technology (ICT), Materials- and Nano Physics. KTH, Centres, SeRC - Swedish e-Science Research Centre.
    Smith, Anderson D.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Hammar, Mattias
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Trilayer Graphene as a Candidate Material for Phase-Change Memory Applications2016In: MRS Advances, ISSN 2316-7858, E-ISSN 1610-191X, Vol. 1, no 20, p. 1487-1494Article in journal (Refereed)
    Abstract [en]

    There is pressing need in computation of a universal phase change memory consolidating the speed of RAM with the permanency of hard disk storage. A potentiated scanning tunneling microscope tip traversing the soliton separating a metallic, ABA-stacked phase and a semiconducting ABC-stacked phase in trilayer graphene has been shown to permanently transform ABA-stacked regions to ABC-stacked regions. In this study, we used density functional theory (DFT) calculations to assess the energetics of this phase-change and explore the possibility of organic functionalization using s-triazine to facilitate a reverse phase-change from rhombohedral back to Bernal in graphene trilayers. A significant deviation in the energy per simulated atom arises when s-triazine is adsorbed, favoring the transformation of the ABC phase to the ABA phase once more. A phase change memory device utilizing rapid, energy-efficient, reversible, field-induced phase-change in graphene trilayers could potentially revolutionize digital memory industry.

  • 22. Audren, A.
    et al.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Linnarsson, Margareta K.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Possnert, G.
    Damage recovery in ZnO by post-implantation annealing2010In: Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms, ISSN 0168-583X, E-ISSN 1872-9584, Vol. 268, no 11-12, p. 1842-1846Article in journal (Other academic)
    Abstract [en]

    ZnO bulk samples were implanted with 200 key-Co ions at room temperature with two fluences, 1 x 10(16) and 8 x 10(16) cm(-2), and then annealed in air for 30 min at different temperatures up to 900 degrees C. After the implantation and each annealing step, the samples were analyzed by Rutherford backscattering spectrometry (RBS) in random and channeling directions to follow the evolution of the disorder profile. The RBS spectra reveal that disorder is created during implantation in proportion to the Co fluence. The thermal treatments induce a disorder recovery, which is however, not complete after annealing at 900 degrees C, where about 15% of the damage remains. To study the Co profile evolution during annealing, the samples were, in addition to RBS, characterized by secondary ion mass spectrometry (SIMS). The results show that Co diffusion starts at 800 degrees C, but also that a very different behavior is seen for Co concentrations below and above the solubility limit. (C) 2010 Elsevier B.V. All rights reserved.

  • 23. Audren, A.
    et al.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Possnert, G.
    Damage recovery in the oxygen sublattice of ZnO by post-implantation annealing2012In: Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms, ISSN 0168-583X, E-ISSN 1872-9584, Vol. 272, p. 418-421Article in journal (Refereed)
    Abstract [en]

    Hydrothermally grown zinc oxide bulk samples were implanted with 200 key-Co ions with a fluence of 4.5 x 10(16) cm(-2) and then annealed in air during 30 min at different temperatures up to 900 degrees C. After the implantation and each annealing step, the samples were analyzed using the nuclear reaction O-16(alpha,alpha)O-16 at 3.045 MeV He in random and channeling directions to follow the annealing of the disorder profile in the O sublattice. For comparison, the disorder in the Zn sublattice was also observed by Rutherford backscattering spectrometry (RBS) in random and channeling directions. The results reveal that the disorder created during the Co implantation is slightly higher in the O sublattice than in the Zn sublattice. The disorder recovery induced by the thermal treatments, starts at 500 degrees C in the O sublattice and at 700 degrees C in the Zn sublattice. Although, the most part of the disorder recovery occurs between 700 and 800 degrees C in both sublattices.

  • 24. Ayedh, H. M.
    et al.
    Bobal, V.
    Nipoti, R.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Svensson, B. G.
    Formation and annihilation of carbon vacancies in 4H-SiC2016In: 16th International Conference on Silicon Carbide and Related Materials, ICSCRM 2015, Trans Tech Publications, 2016, p. 331-336Conference paper (Refereed)
    Abstract [en]

    The carbon vacancy (VC) is a major point defect in high-purity 4H-SiC epitaxial layers limiting the minority charge carrier lifetime. In layers grown by chemical vapor deposition techniques, the VC concentration is typically in the range of 1012 cm-3 and after device processing at temperatures approaching 2000 °C, it can be enhanced by several orders of magnitude. In the present contribution, we show that the cooling rate after high-temperature processing has a profound influence on the resulting VC concentration where a slow rate promotes elimination of VC. Further, isochronal annealing of as-grown and as-oxidized epi-layers protected by a carbon-cap was undertaken between 800 °C and 1600 °C. The results reveal that thermodynamic equilibrium of VC is established rather rapidly at moderate temperatures, reaching a VC concentration of only a few times 1011 cm-3 after 40 min at 1500 °C. Hence, the concept of eliminating VC’s by annealing at moderate temperatures under C-rich equilibrium conditions shows great promise and enables reannealing of high-temperature processed wafers, in contrast to the procedures commonly used today to eliminate VC. In-diffusion of carbon interstitials and out-diffusion of VC’s are discussed as the kinetics processes establishing the thermodynamic equilibrium.

  • 25. Ayedh, H. M.
    et al.
    Bobal, V.
    Nipoti, R.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Svensson, B. G.
    Formation of carbon vacancy in 4H silicon carbide during high-temperature processing2014In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 115, no 1, p. 012005-Article in journal (Refereed)
    Abstract [en]

    As-grown and pre-oxidized silicon carbide (SiC) samples of polytype 4H have been annealed at temperatures up to 1950 degrees C for 10 min duration using inductive heating, or at 2000 degrees C for 30 s using microwave heating. The samples consisted of a n-type high-purity epitaxial layer grown on 4 degrees off-axis < 0001 > n(+)-substrate and the evolution of the carbon vacancy (V-C) concentration in the epitaxial layer was monitored by deep level transient spectroscopy via the characteristic Z(1/2) peak. Z(1/2) appears at similar to 0.7 eV below the conduction band edge and arises from the doubly negative charge state of V-C. The concentration of V-C increases strongly after treatment at temperatures >= 1600 degrees C and it reaches almost 10(15)cm(-3) after the inductive heating at 1950 degrees C. A formation enthalpy of similar to 5.0 eV is deduced for V-C, in close agreement with recent theoretical predictions in the literature, and the entropy factor is found to be similar to 5 k (k denotes Boltzmann's constant). The latter value indicates substantial lattice relaxation around V-C, consistent with V-C being a negative-U system exhibiting considerable Jahn-Teller distortion. The microwave heated samples show evidence of non-equilibrium conditions due to the short duration used and display a lower content of V-C than the inductively heated ones. Finally, concentration-versus-depth profiles of V-C favour formation in the "bulk" of the epitaxial layer as the prevailing process and not a Schottky type process at the surface.

  • 26. Ayedh, H. M.
    et al.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Svensson, B. G.
    Elimination of carbon vacancies in 4H-SiC epi-layers by near-surface ion implantation: Influence of the ion species2015In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 118, no 17, article id 175701Article in journal (Refereed)
    Abstract [en]

    The carbon vacancy (VC) is a prevailing point defect in high-purity 4H-SiC epitaxial layers, and it plays a decisive role in controlling the charge carrier lifetime. One concept of reducing the VC-concentration is based on carbon self-ion implantation in a near surface layer followed by thermal annealing. This leads to injection of carbon interstitials (Ci's) and annihilation of VC's in the epi-layer "bulk". Here, we show that the excess of C atoms introduced by the self-ion implantation plays a negligible role in the VC annihilation. Actually, employing normalized implantation conditions with respect to displaced C atoms, other heavier ions like Al and Si are found to be more efficient in annihilating VC's. Concentrations of VC below ∼2 × 1011 cm-3 can be reached already after annealing at 1400 °C, as monitored by deep-level transient spectroscopy. This corresponds to a reduction in the VC-concentration by about a factor of 40 relative to the as-grown state of the epi-layers studied. The negligible role of the implanted species itself can be understood from simulation results showing that the concentration of displaced C atoms exceeds the concentration of implanted species by two to three orders of magnitude. The higher efficiency for Al and Si ions is attributed to the generation of collision cascades with a sufficiently high energy density to promote Ci-clustering and reduce dynamic defect annealing. These Ci-related clusters will subsequently dissolve during the post-implant annealing giving rise to enhanced Ci injection. However, at annealing temperatures above 1500 °C, thermodynamic equilibrium conditions start to apply for the VC-concentration, which limit the net effect of the Ci injection, and a competition between the two processes occurs.

  • 27. Ayedh, H. M.
    et al.
    Nipoti, R.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Svensson, B. G.
    Controlling the carbon vacancy concentration in 4H-SiC subjected to high temperature treatment2016In: 16th International Conference on Silicon Carbide and Related Materials, ICSCRM 2015, Trans Tech Publications, 2016, p. 414-417Conference paper (Refereed)
    Abstract [en]

    The carbon vacancy (VC) is the major charge carrier lifetime limiting-defect in 4H-SiC epitaxial layers and it is readily formed during elevated heat treatments. Here we describe two ways for controlling the VC concentration in 4H-SiC epi-layer using different annealing procedures. One set of samples was subjected to high temperature processing at 1950 °C for 3 min, but then different cooling rates were applied. A significant reduction of the VC concentration was demonstrated by the slow cooling rate. In addition, elimination of the VC’s was also established by annealing a sample, containing high VC concentration, at 1500 °C for a sufficiently long time. Both procedures clearly demonstrate the need for maintaining thermodynamic equilibrium during cooling.

  • 28. Ayedh, H. M.
    et al.
    Nipoti, R.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Svensson, B. G.
    Elimination of carbon vacancies in 4H-SiC employing thermodynamic equilibrium conditions at moderate temperatures2015In: Applied Physics Letters, ISSN 0003-6951, E-ISSN 1077-3118, Vol. 107, no 25Article in journal (Refereed)
    Abstract [en]

    The carbon vacancy (VC) is a major point defect in high-purity 4H-SiC epitaxial layers limiting the minority charge carrier lifetime. In layers grown by chemical vapor deposition techniques, the VC concentration is typically in the range of 1012cm-3, and after device processing at temperatures approaching 2000 °C, it can be enhanced by several orders of magnitude. In the present study, both as-grown layers and a high-temperature processed one have been annealed at 1500 °C and the VC concentration is demonstrated to be strongly reduced, exhibiting a value of only a few times 1011cm-3 as determined by deep-level transient spectroscopy measurements. The value is reached already after annealing times on the order of 1 h and is evidenced to reflect thermodynamic equilibrium under C-rich ambient conditions. The physical processes controlling the kinetics for establishment of the VC equilibrium are estimated to have an activation energy below ∼3 eV and both in-diffusion of carbon interstitials and out-diffusion of VC’s are discussed as candidates. This concept of VC elimination is flexible and readily integrated in a materials and device processing sequence.

  • 29. Azarov, A. Yu.
    et al.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Du, X. L.
    Liu, Z. L.
    Svensson, B. G.
    Kuznetsov, A. Yu.
    Thermally induced surface instability in ion-implanted Mg(x)Zn(1-x)O films2011In: Physical Review B. Condensed Matter and Materials Physics, ISSN 1098-0121, E-ISSN 1550-235X, Vol. 84, no 1, p. 014114-Article in journal (Refereed)
    Abstract [en]
    Thermal stability of originally single crystalline wurtzite Mg(x)Zn(1-x)O (x <= 0.3) films implanted at room temperature with (166)Er ions is studied by a combination of Rutherford backscattering spectrometry, time-of-flight elastic recoil detection analysis, x-ray diffraction analysis, and atomic force microscopy. The MgZnO films exhibit a complex behavior during postimplantation annealing associated with compositional changes and surface erosion in addition to Er accumulation at the surface. The importance of these processes depends on the Mg content, annealing temperature, and amount of implantation damage. Specifically, increases in the Mg content as well as the implantation damage enhance the compositional changes in the near-surface region and give rise to altered stoichiometry and Mg-enriched phase separation. In its turn, the rate of surface erosion in MgZnO under the thermal treatment depends on temperature, MgZnO composition, and the amount of implantation damage nontrivially, which is attributed to the compositional changes in the near-surface region assisted by the implantation damage.
  • 30. Azarov, A. Yu
    et al.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Du, X. L.
    Rauwel, P.
    Kuznetsov, A. Yu.
    Svensson, B. G.
    Effect of implanted species on thermal evolution of ion-induced defects in ZnO2014In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 115, no 7, p. 073512-Article in journal (Refereed)
    Abstract [en]

    Implanted atoms can affect the evolution of ion-induced defects in radiation hard materials exhibiting a high dynamic annealing and these processes are poorly understood. Here, we study the thermal evolution of structural defects in wurtzite ZnO samples implanted at room temperature with a wide range of ion species (from B-11 to Bi-209) to ion doses up to 2 x 10(16) cm(-2). The structural disorder was characterized by a combination of Rutherford backscattering spectrometry, nuclear reaction analysis, and transmission electron microscopy, while secondary ion mass spectrometry was used to monitor the behavior of both the implanted elements and residual impurities, such as Li. The results show that the damage formation and its thermal evolution strongly depend on the ion species. In particular, for F implanted samples, a strong out-diffusion of the implanted ions results in an efficient crystal recovery already at 600 degrees C, while co-implantation with B (via BF2) ions suppresses both the F out-diffusion and the lattice recovery at such low temperatures. The damage produced by heavy ions (such as Cd, Au, and Bi) exhibits a two-stage annealing behavior where efficient removal of point defects and small defect clusters occurs at temperatures similar to 500 degrees C, while the second stage is characterized by a gradual and partial annealing of extended defects. These defects can persist even after treatment at 900 degrees C. In contrast, the defects produced by light and medium mass ions (O, B, and Zn) exhibit a more gradual annealing with increasing temperature without distinct stages. In addition, effects of the implanted species may lead to a nontrivial defect evolution during the annealing, with N, Ag, and Er as prime examples. In general, the obtained results are interpreted in terms of formation of different dopant-defect complexes and their thermal stability.

  • 31. Azarov, A. Yu.
    et al.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Svensson, B. G.
    Du, X. L.
    Kuznetsov, A. Yu.
    Damage accumulation and annealing behavior in high fluence implanted MgZnO2012In: Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms, ISSN 0168-583X, E-ISSN 1872-9584, Vol. 272, p. 426-429Article in journal (Refereed)
    Abstract [en]

    Molecular beam epitaxy grown MgxZn1-xO (x <= 0.3) layers were implanted at room temperature with 150 keV Er-166(+) ions in a fluence range of 5 x 10(15-)3 x 10(16) cm(-2). Evolution of ion-induced damage and structural changes were studied by a combination of Rutherford backscattering spectrometry, nuclear reaction analysis and time-of-flight elastic recoil detection analysis. Results show that damage production enhances in both Zn- and O-sublattices with increasing the Mg content in the MgZnO. However, MgZnO as well as pure ZnO exhibits a high degree of dynamic annealing and MgZnO can not be amorphized even at the highest ion fluence used. Annealing of heavily damaged ZnO leads to a strong surface erosion and thinning of the film. Increasing the Mg content suppresses the surface evaporation in high fluence implanted MgZnO but leads to a strong surface decomposition accompanied with a Mg-rich surface layer formation during post-implantation annealing.

  • 32. Azarov, A. Yu
    et al.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Svensson, B. G.
    Kuznetsov, A. Yu
    Annealing of ion implanted CdZnO2012In: Journal of Physics D: Applied Physics, ISSN 0022-3727, E-ISSN 1361-6463, Vol. 45, no 23, p. 235304-Article in journal (Refereed)
    Abstract [en]

    We have studied the effect of the Cd content on the recovery of ion-induced damage in wurtzite CdxZn1-xO (x <= 0.05) films and compared with that in pure wurtzite ZnO and rock-salt CdO.200 keV Au+ and 55 keV Ar+ ion implants were performed at room temperature in the dose range of 5 x 1014-6.5 x 1015 cm-2. Rutherford backscattering/channelling spectrometry was used to characterize the damage evolution in the course of annealing (600-900 degrees C in air). A complex defect annealing behaviour is revealed in CdZnO as a function of annealing temperature, Cd content and ion dose. In particular, defects in the low dose implanted CdZnO films can be effectively removed at 800 degrees C, while the high dose implantation results in the formation of defects stable at least up to 900 degrees C. Moreover, annealing of the CdZnO films is accompanied by Cd loss at the surface for temperatures exceeding 800 degrees C. In contrast, CdO exhibits a typical damage accumulation behaviour for metals and semiconductors with high degree of ionicity, resulting in saturation and extended defect formation at high ion doses. These extended defects in pure ZnO and CdO, formed either directly during implantation or by reconstruction during post-implant annealing, are substantially more stable compared with small defects which can be efficiently removed at 700 degrees C and 600 degrees C for ZnO and CdO, respectively.

  • 33. Azarov, A. Yu.
    et al.
    Svensson, B. G.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Du, X. L.
    Kuznetsov, A. Yu.
    Effect of composition on damage accumulation in ternary ZnO-based oxides implanted with heavy ions2010In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 108, no 3, p. 033509-Article in journal (Refereed)
    Abstract [en]

    Thin films of wurtzite MgxZn1-xO (x <= 0.3) grown by molecular beam epitaxy and wurtzite CdxZn1-xO (x <= 0.05) grown by metal organic chemical vapor deposition were implanted at room temperature with 150 keV Er+ ions and 200 keV Au+ ions in a wide dose range. Damage accumulation was studied by Rutherford backscattering/channeling spectrometry. Results show that the film composition affects the damage accumulation behavior in both MgZnO and CdZnO dramatically. In particular, increasing the Mg content in MgZnO results in enhanced damage accumulation in the region between the bulk and surface damage peaks characteristically distinguished in the pure ZnO. However, the overall damage accumulation in MgZnO layers, as well as in pure ZnO, exhibits saturation with increasing ion dose and MgZnO cannot be amorphized even at the highest ion dose used (3 X 10(16) Er/cm(2)). Increasing the Cd content in CdZnO affects the saturation stage of the damage accumulation and leads to an enhancement of damage production in both Cd and Zn sublattices. (C) 2010 American Institute of Physics. [doi:10.1063/1.3467532]

  • 34.
    Azarov, Alexander
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Applied Physics, MAP.
    Titov, A. I.
    Karaseov, P. A.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Effect of collision cascade density on radiation damage in SiC2009In: Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms, ISSN 0168-583X, E-ISSN 1872-9584, Vol. 267, no 8-9, p. 1247-1250Article in journal (Refereed)
    Abstract [en]

    The damage accumulation in 6H-SiC bombarded at room temperature with 1.3 keV/amu atomic P+ ions and small cluster ions PFn+ (n = 2 and 4) have been studied by Rutherford backscattering spectrometry in channeling mode. Results show that collision cascade density strongly affects damage buildup in SiC. The cluster ion bombardment of SiC produces more stable defects both near the surface and in the region between the surface and bulk defect peaks than irradiation by atomic ions.

  • 35. Balestra, F.
    et al.
    Parker, E.
    Leadley, D.
    Mantl, S.
    Dubois, E.
    Engstrom, O.
    Clerc, R.
    Cristoloveanu, S.
    Kurz, H.
    Raskin, J. P.
    Lemme, Max C.
    AMO GmbH, AMICA, Aachen, Germany.
    Ionescu, A.
    Moselund, K. E.
    Boucart, K.
    Kasper, E.
    Karmous, A.
    Baus, M.
    Spangenberg, B.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Sangiorgi, E.
    Ghibaudo, G.
    Flandre, D.
    NANOSIL network of excellence-silicon-based nanostructures and nanodevices for long-term nanoelectronics applications2008In: Materials Science in Semiconductor Processing, ISSN 1369-8001, E-ISSN 1873-4081, Vol. 11, no 5-6, p. 148-159Article in journal (Refereed)
    Abstract [en]

    NANOSIL Network of Excellence [NANOSIL NoE web site < www.nanosil-noe.eu >], funded by the European Commission in the 7th Framework Programme (ICT-FP7, no 216171), aims at European scale integration of the excellent European research laboratories and their capabilities in order to strengthen scientific and technological excellence in the field of nanoelectronic materials and devices for terascale integrated circuits (ICs), and to disseminating the results in a wide scientific and industrial community. NANOSIL is exploring and assessing the science and technological aspects of nanodevices and operational regimes relevant to the n+4 technology node and beyond. It encompasses projects on nanoscale CMOS and beyond-CMOS. Innovative concepts, technologies and device architectures are proposed-with fabrication down to the finest features, and utilising a wide spectrum of advanced deposition and processing capabilities, extensive characterization and very rigorous device modeling. This work is carried out through a network of joint processing, characterization and modeling platforms. This critical interaction strengthens European integration in nanoelectronics and will speed up technological innovation for the nanoelectronics of the next two to three decades.

  • 36. Balinsky, Michael
    et al.
    Ranjbar, Mojtaba
    Haidar, Mohammad
    Durrenfeld, Philipp
    Khartsev, Sergiy
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Slavin, Andrei
    Åkerman, Johan
    KTH, School of Information and Communication Technology (ICT), Materials- and Nano Physics, Material Physics, MF. University of Gothenburg, Sweden.
    Dumas, Randy K.
    Spin Pumping and the Inverse Spin-Hall Effect via Magnetostatic Surface Spin-Wave Modes in Yttrium-Iron Garnet/Platinum Bilayers2015In: IEEE Magnetics Letters, ISSN 1949-307X, E-ISSN 1949-3088, Vol. 6, no 3000604Article in journal (Refereed)
    Abstract [en]

    Spin pumping at a boundary between a yttrium-iron garnet (YIG) film and a thin platinum (Pt) layer is studied under conditions in which a magnetostatic surface spin wave (MSSW, or Damon-Eshbach mode) is excited in YIG by a narrow strip-line antenna. It is shown that the voltage created by the inverse spin-Hall effect (ISHE) in Pt is strongly dependent on the wavevector of the excited MSSW. For YIG film thicknesses of 41 and 0.9 mu m, the maximum ISHE voltage corresponds to the maximum of efficiently excited MSSW wavevectors and does not coincide with the maximum of absorbed microwave power. For a thinner (0.175 mu m) YIG film, the maximum of the ISHE voltage moves closer to the ferromagnetic resonance and almost coincides with the region of the maximum microwave absorption. We show that the effect is related to the change in the thickness profile and the wavenumber spectrum of the excited MSSW taking place when the YIG film thickness is increased.

  • 37. Baranowski, M.
    et al.
    Kudrawiec, R.
    Misiewicz, J.
    Hammar, Mattias
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Nitrogen-related changes in exciton localization and dynamics in GaInNAs/GaAs quantum wells grown by metalorganic vapor phase epitaxy2015In: Applied Physics A: Materials Science & Processing, ISSN 0947-8396, E-ISSN 1432-0630, Vol. 118, no 2, p. 479-486Article in journal (Refereed)
    Abstract [en]

    In this work, we show the results of low-temperature photoluminescence (PL), time-resolved photoluminescence, and photoreflectance (PR) investigations, performed on a series of three Ga0.64In0.34As1-x N (x) /GaAs single quantum wells (SQW) grown by metalorganic vapor phase epitaxy with the nitrogen content of 0, 0.5, and 0.8 %. Comparing the PL and PR data, we show that at low excitation intensity and temperature, the radiative recombination occurs via localizing centers (LCs) in all samples. The excitation intensity-dependent PL measurements combined with theoretical modeling of hopping excitons in this system allow us to provide quantitative information on the disorder parameters describing population of LCs. It has been found that the average energy of LCs increases about two times and simultaneously the number of LCs increases about 10 and 20 times after the incorporation of 0.5 and 0.8 % of nitrogen, respectively. The value of average localization energy E > (0) determined for N-containing samples (similar to 6-7 meV) is in the range typical for dilute nitride QWs grown by molecular beam epitaxy (MBE). On the other hand, the "effective" concentration of LCs seems to be higher than for GaInNAs/GaAs QW grown by MBE. The dramatic increase in localizing centers also affects the PL dynamics. Observed PL decay time dispersion is much stronger in GaInNAs SQW than in nitrogen-free SQW. The change in PL dynamic is very well reproduced by model of hopping excitons.

  • 38. Belotelov, V. I.
    et al.
    Kreilkamp, L. E.
    Akimov, I. A.
    Kalish, A. N.
    Bykov, D. A.
    Kasture, S.
    Yallapragada, V. J.
    Gopal, Achanta Venu
    Grishin, Alexander M.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Khartsev, Sergiy I.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Nur-E-Alam, M.
    Vasiliev, M.
    Doskolovich, L. L.
    Yakovlev, D. R.
    Alameh, K.
    Zvezdin, A. K.
    Bayer, M.
    Plasmon-mediated magneto-optical transparency2013In: Nature Communications, ISSN 2041-1723, E-ISSN 2041-1723, Vol. 4, p. 2128-Article in journal (Refereed)
    Abstract [en]

    Magnetic field control of light is among the most intriguing methods for modulation of light intensity and polarization on sub-nanosecond timescales. The implementation in nanostructured hybrid materials provides a remarkable increase of magneto-optical effects. However, so far only the enhancement of already known effects has been demonstrated in such materials. Here we postulate a novel magneto-optical phenomenon that originates solely from suitably designed nanostructured metal-dielectric material, the so-called magneto-plasmonic crystal. In this material, an incident light excites coupled plasmonic oscillations and a waveguide mode. An in-plane magnetic field allows excitation of an orthogonally polarized waveguide mode that modifies optical spectrum of the magneto-plasmonic crystal and increases its transparency. The experimentally achieved light intensity modulation reaches 24%. As the effect can potentially exceed 100%, it may have great importance for applied nanophotonics. Further, the effect allows manipulating and exciting waveguide modes by a magnetic field and light of proper polarization.

  • 39. Belotelov, V. I.
    et al.
    Kreilkamp, L. E.
    Kalish, A. N.
    Akimov, I. A.
    Bykov, D. A.
    Kasture, S.
    Yallapragada, V. J.
    Gopal, A. V.
    Grishin, Alexander M.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Khartsev, Sergiy I.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Nur-E-Alam, M.
    Vasiliev, M.
    Doskolovich, L. L.
    Yakovlev, D. R.
    Alameh, K.
    Zvezdin, A. K.
    Bayer, M.
    Magnetophotonic intensity effects in hybrid metal-dielectric structures2014In: Physical Review B. Condensed Matter and Materials Physics, ISSN 1098-0121, E-ISSN 1550-235X, Vol. 89, no 4, p. 045118-Article in journal (Refereed)
    Abstract [en]

    The magneto-optical properties of a hybrid metal-dielectric structure consisting of a one-dimensional gold grating on top of a magnetic waveguide layer are studied experimentally and theoretically. It is demonstrated that a magnetic field applied in the longitudinal configuration (in the plane of the magnetic film and perpendicular to the slits in the gold grating) to the metal-dielectric structure modifies the field distribution of the optical modes and thus changes the mode excitation conditions. In the optical far field, this manifests in the alteration of the optical transmittance or reflectance when the structure becomes magnetized. This magneto-optical effect is shown to represent a novel class of effects related to the magnetic-field-induced modification of the Bloch modes of the periodic hybrid structure. That is why we define this effect as "longitudinal magnetophotonic intensity effect" (LMPIE). The LMPIE has two contributions, odd and even in magnetization. While the even LMPIE is maximal for the light polarized perpendicular to the grating slits (TM) and minimal for the orthogonal polarization (TE), the odd LMPIE takes maximum values at some intermediate polarization and vanishes for pure TM and TE polarizations. Two principal modes of the magnetic layer - TM and TE - acquire in the longitudinal magnetic field additional field components and thus turn into quasi-TM and quasi-TE modes, respectively. The largest LMPIE is observed for excitation of the antisymmetrical quasi-TE mode by TM-polarized light. The value of the LMPIE measured for the plasmonic structure with a magnetic film of Bi2Dy1Fe4Ga1O12 composition is about 1% for the even effect and 2% for the odd one. However, the plasmonic structure with a magnetic film with a higher concentration of bismuth (Bi2.97Er0.03Fe4Al0.5Ga0.5O12) gives significantly larger LMPIE: even LMPIE reaches 24% and odd LMPIE is 9%. Enhancement of the magneto-optical figure of merit (defined as the ratio of the specific Faraday angle of a magnetic film to its absorption coefficient) of the magnetic films potentially causes the even LMPIE to exceed 100% as is predicted by calculations. Thus, the nanostructured material described here may be considered as an ultrafast magnetophotonic light valve.

  • 40. Bethge, O.
    et al.
    Pozzovivo, G.
    Henkel, Christoph
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Abermann, S.
    Bertagnolli, E.
    Fabrication of highly ordered nanopillar arrays and defined etching of ALD-grown all-around platinum films2012In: Journal of Micromechanics and Microengineering, ISSN 0960-1317, E-ISSN 1361-6439, Vol. 22, no 8, p. 085013-Article in journal (Refereed)
    Abstract [en]

    Highly ordered arrays of silicon nanopillars are etched by means of induced-coupled-plasma reactive-ion etching (RIE). The sulfur hexafluoride/oxygen (SF6/O-2)-based cryogenic process allows etching of nanopillars with an aspect ratio higher than 20:1 and diameters down to 30 nm. Diameters can be further reduced by a well-controllable oxidation process in O-2-ambient and a subsequent etching in hydrofluoric acid. This approach effectively removes surface contaminations induced by former RIE, as shown by x-ray photoelectron spectroscopy. Atomic layer deposition (ALD) is used to establish an all-around Al2O3/Pt stack onto the vertically aligned nanorods. Two approaches are successfully applied to remove the resistant Pt coating from the nanopillar tips.

  • 41. Bethge, O.
    et al.
    Zimmermann, C.
    Lutzer, B.
    Simsek, S.
    Smoliner, J.
    Stoeger-Pollach, M.
    Henkel, Christoph
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Bertagnolli, E.
    Effective reduction of trap density at the Y2O3/Ge interface by rigorous high-temperature oxygen annealing2014In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 116, no 21, p. 214111-Article in journal (Refereed)
    Abstract [en]

    The impact of thermal post deposition annealing in oxygen at different temperatures on the Ge/Y2O3 interface is investigated using metal oxide semiconductor capacitors, where the yttrium oxide was grown by atomic layer deposition from tris(methylcyclopentadienyl) yttrium and H2O precursors on n-type (100)-Ge substrates. By performing in-situ X-ray photoelectron spectroscopy, the growth of GeO during the first cycles of ALD was proven and interface trap densities just below 1 x 10(11) eV(-1) cm(-2) were achieved by oxygen annealing at high temperatures (550 degrees C-600 degrees C). The good interface quality is most likely driven by the growth of interfacial GeO2 and thermally stabilizing yttrium germanate.

  • 42. Bolten, J.
    et al.
    Hellström, Per-Erik
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Ternon, C.
    Serre, P.
    Fabrication of Nanowires2014In: Beyond CMOS Nanodevices 1, Wiley Blackwell , 2014, p. 5-23Chapter in book (Other academic)
    Abstract [en]

    Several fabrication processes of silicon nanowires have been developed in the research community. They can be divided into bottom-up or top-down approaches. This chapter describes top-down fabrication of silicon nanowires using electron beam lithography (EBL), which combined with optical lithography can be a viable approach if not too many silicon nanowires need to be patterned on a wafer. It also describes the sidewall transfer lithography (STL) technique using I-line stepper lithography to pattern a vast amount of silicon nanowires on a silicon wafer. In addition the chapter examines how bottom-up Si nanowires synthesized by vapor-liquid-solid (VLS)-chemical vapor deposition (CVD) can be assembled at low cost in an efficient way for further use as a sensing material. Among the solution-based assembly methods for the nanostructured network (nanonet) fabrication, the vacuum filtration method is highly simple, versatile, low cost and scalable to large areas.

  • 43. Bonetti, Stefano
    et al.
    Kukreja, R
    Chen, Z
    Macià, F
    Hernàndez, J. M.
    Eklund, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Backes, D
    Frisch, J
    Katine, J
    Malm, Gunnar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Urazhdin, S
    Kent, A. D.
    Stöhr, J.
    Ohldag, H.
    Dürr, H. A.
    Direct observation and imaging of a spin-wave soliton with p−like symmetry2015In: Nature Communications, ISSN 2041-1723, E-ISSN 2041-1723, Vol. 6, article id 8889Article in journal (Refereed)
    Abstract [en]

    The prediction and realization of magnetic excitations driven by electrical currents via the spin transfer torque effect, enables novel magnetic nano-devices where spin-waves can be used to process and store information. The functional control of such devices relies on understanding the properties of non-linear spin-wave excitations. It has been demonstrated that spin waves can show both an itinerant character, but also appear as localized solitons. So far, it was assumed that localized solitons have essentially cylindrical, s−like symmetry. Using a newly developed high-sensitivity time-resolved magnetic x-ray microscopy, we instead observe the emergence of a novel localized soliton excitation with a nodal line, i.e. with p−like symmetry. Micromagnetic simulations identify the physical mechanism that controls the transition from s− to p−like solitons. Our results suggest a potential new pathway to design artificial atoms with tunable dynamical states using nanoscale magnetic devices.

  • 44. Booker, I. D.
    et al.
    Hassan, J.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Sveinbjörnsson, E. Ö
    Kordina, O.
    Bergman, J. P.
    Comparison of post-growth carrier lifetime improvement methods for 4H-SiC epilayers2012In: Silicon Carbide And Related Materials 2011, Pts 1 And 2, Trans Tech Publications Inc., 2012, Vol. 717-720, p. 285-288Conference paper (Refereed)
    Abstract [en]

    We compare two methods for post-growth improvement of bulk carrier lifetime in 4H-SiC: dry oxidations and implantations with either 12C or 14N, followed by high temperature anneals in Ar atmosphere. Application of these techniques to samples cut from the same wafer/epilayer yields 2- to 11-fold lifetime increases, with the implantation/annealing technique shown to give greater maximum lifetimes. The maximum lifetimes reached are ∼5 μs after 12C implantation at 600 °C and annealing in Ar for 180 minutes at 1500 °C. At higher annealing temperatures the lifetimes decreases, a result which differs from reports in the literature.

  • 45. Buchholt, K.
    et al.
    Eklund, P.
    Jensen, J.
    Lu, J.
    Ghandi, Reza
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Behan, G.
    Zhang, H.
    Spetz, A. Lloyd
    Hultman, L.
    Growth and characterization of epitaxial Ti3GeC2 thin films on 4H-SiC(0001)2012In: Journal of Crystal Growth, ISSN 0022-0248, E-ISSN 1873-5002, Vol. 343, no 1, p. 133-137Article in journal (Refereed)
    Abstract [en]

    Epitaxial Ti3GeC2 thin films were deposited on 4 degrees off-cut 4H-SiC(0001) using magnetron sputtering from high purity Ti, C, and Ge targets. Scanning electron microscopy and helium ion microscopy show that the Ti3GeC2 films grow by lateral step-flow with {11 (2) over bar0} faceting on the SiC surface. Using elastic recoil detection analysis, atomic force microscopy, and X-Ray diffraction the films were found to be substoichiometric in Ge with the presence of small Ge particles at the surface of the film.

  • 46. Buchholt, Kristina
    et al.
    Ghandi, Reza
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Lu, J.
    Eklund, Per
    Hultman, Lars
    Lloyd Spetz, Anita
    Ohmic contact properties of magnetron sputtered Ti3SiC2 on n- and p-type 4H-silicon carbide2011In: Applied Physics Letters, ISSN 0003-6951, E-ISSN 1077-3118, Vol. 98, no 4, p. 042108-Article in journal (Refereed)
    Abstract [en]

    Epitaxial Ti3SiC2 (0001) thin film contacts were grown on doped 4H-SiC (0001) using magnetron sputtering in an ultra high vacuum system. The specific contact resistance was investigated using linear transmission line measurements. Rapid thermal annealing at 950 degrees C for 1 min of as-deposited films yielded ohmic contacts to n-type SiC with contact resistances in the order of 10(-4) Omega cm(2). Transmission electron microscopy shows that the interface between Ti3SiC2 and n-type SiC is atomically sharp with evidence of interfacial ordering after annealing. (c) 2011 American Institute of Physics.

  • 47.
    Buono, Benedetto
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Simulation and Characterization of Silicon Carbide Power Bipolar Junction Transistors2012Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    The superior characteristics of silicon carbide, compared with silicon, have suggested considering this material for the next generation of power semiconductor devices. Among the different power switches, the bipolar junction transistor (BJT) can provide a very low forward voltage drop, a high current capability and a fast switching speed. However, in order to compete on the market, it is crucial to a have high current gain and a breakdown voltage close to ideal. Moreover, the absence of conductivity modulation and long-term stability has to be solved.

    In this thesis, these topics are investigated comparing simulations and measurements. Initially, an efficient etched JTE has been simulated and fabricated. In agreement with the simulations, the fabricated diodes exhibit the highest BV of around 4.3 kV when a two-zone JTE is implemented. Furthermore, the simulations and measurements demonstrate a good agreement between the electric field distribution inside the device and the optical luminescence measured at breakdown.

    Additionally, an accurate model to simulate the forward characteristics of 4H-SiC BJTs is presented. In order to validate the model, the simulated current gains are compared with measurements at different temperatures and different base-emitter geometries. Moreover, the simulations and measurements of the on-resistance are compared at different base currents and different temperatures. This comparison, coupled with a detailed analysis of the carrier concentration inside the BJT, indicates that internal forward biasing of the base-collector junction limits the BJT to operate at high current density and low forward voltage drop simultaneously. In agreement with the measurements, a design with a highly-doped extrinsic base is proposed to alleviate this problem.

    In addition to the static characteristics, the comparison of measured and simulated switching waveforms demonstrates that the SiC BJT can provide fast switching speed when it acts as a unipolar device. This is crucial to have low power losses during transient.

    Finally, the long-term stability is investigated. It is observed that the electrical stress of the base-emitter diode produces current gain degradation; however, the degradation mechanisms are still unclear. In fact, the analysis of the measured Gummel plot suggests that the reduction of the carrier lifetime in the base-emitter region might be only one of the causes of this degradation. In addition, the current gain degradation due to ionizing radiation is investigated comparing the simulations and measurements. The simulations suggest that the creation of positive charge in the passivation layer can increase the base current; this increase is also observed in the electrical measurements.

  • 48.
    Buono, Benedetto
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Ghandi, Reza
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Malm, B. Gunnar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Current Gain Degradation in 4H-SiC Power BJTs2011In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 679-680, p. 702-705Article in journal (Refereed)
    Abstract [en]

    SiC airs are very attractive for high power application, but long term stability is still problematic and it could prohibit commercial production of these devices. The aim of this paper is to investigate the current gain degradation in BJTs with no significant degradation of the on-resistance. Electrical measurements and simulations have been used to characterize the behavior of the BJT during the stress test. Current gain degradation occurs, the gain drops from 58 before stress to 43 after 40 hours, and, moreover, the knee current shows fluctuations in its value during the first 20 hours. Current gain degradation has been attributed to increased interface traps or reduced lifetime in the base-emitter region or small stacking faults in the base-emitter region, while fluctuations of the knee current might be due to stacking faults in the collector region.

  • 49.
    Buono, Benedetto
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Ghandi, Reza
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Malm, B. Gunnar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Influence of Emitter Width and Emitter-Base Distance on the Current Gain in 4H-SiC Power BJTs2010In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 57, no 10, p. 2664-2670Article in journal (Refereed)
    Abstract [en]

    The influence of the emitter-base geometry on the current gain has been investigated by means of measurements and simulations. Particular attention has been placed on the emitter width and on the distance between the emitter edge and the base contact. When the emitter width is decreased from 40 to 8 mu m, the current gain is reduced by 20%, whereas when the distance between the base contact and the emitter edge is decreased from 5 to 2 mu m, the current gain is reduced by 10%. Simulations have been used to investigate the reasons for the current gain reduction. The reduction of the emitter width induces two mechanisms of current gain reduction: earlier forward biasing of the base-collector junction and higher recombination in the emitter region. Both mechanisms result from the higher current density flowing under the emitter region. Placing the base contact very close to the emitter edge increases the base current by increasing the gradient of the electron concentration toward the base contact. The effect of increasing the base doping in the extrinsic region has been simulated, and the results demonstrate that the current gain can be improved if a high doping concentration in the range of 5 x 10(18) cm(-3) is used.

  • 50.
    Buono, Benedetto
    et al.
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Ghandi, Reza
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Domeij, Martin
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Malm, B. Gunnar
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
    Modeling and Characterization of Current Gain Versus Temperature in 4H-SiC Power BJTs2010In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 57, no 3, p. 704-711Article in journal (Refereed)
    Abstract [en]

    Accurate physical modeling has been developed to describe the current gain of silicon carbide (SiC) power bipolar junction transistors (BJTs), and the results have been compared with measurements. Interface traps between SiC and SiO2 have been used to model the surface recombination by changing the trap profile, capture cross section, and concentration. The best agreement with measurement is obtained using one single energy level at 1 eV above the valence band, a capture cross section of 1 x 10(-15) cm(2), and a trap concentration of 2 x 10(12) cm(-2). Simulations have been performed at different temperatures to validate the model and characterize the temperature behavior of SiC BJTs. An analysis of the carrier concentration at different collector currents has been performed in order to describe the mechanisms of the current gain fall-off at a high collector current both at room temperature and high temperatures. At room temperature, high injection in the base ( which has a doping concentration of 3 x 10(17) cm(-3)) and forward biasing of the base-collector junction occur simultaneously, causing an abrupt drop of the current gain. At higher temperatures, high injection in the base is alleviated by the higher ionization degree of the aluminum dopants, and then forward biasing of the base-collector junction is the acting mechanism for the current gain fall-off. Forward biasing of the base-collector junction can also explain the reduction of the knee current with increasing temperature by means of the negative temperature dependence of the mobility.

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