Germanium-based integrated photonics is gaining attention due to its potential for mid-infrared wavelength applications, including environmental sensing, industrial gas monitoring, defense, and security. However, current germanium-on-silicon platforms face significant propagation losses at wavelengths above 8 μm, and gas sensing in this regime using a germanium waveguide has not been demonstrated to date. To address this challenge, we introduce a suspended germanium-on-silicon platform, where an 11 μm deep suspension gap ensures optical mode isolation from the lossy silicon substrate. The waveguide has a low propagation loss of 3.5 dB/cm at a wavelength of 9.2 μm. Furthermore, we demonstrate on-chip ethanol gas sensing in the long-wave infrared range with a detection limit of 925 ppm using this platform. Our method paves the way for extending the operating wavelength range of germanium-on-silicon integrated photonics into the long-wave infrared.

The modulation transfer function (MTF) in fully delineated 15 μ m pitch type-II superlattice (T2SL) mid-wave infrared (IR) detectors is studied theoretically and experimentally. Theoretically, a 2-D model to simulate the spot scan (SS) profile is presented and used to compute the MTF as a function of the wavelength and the array geometry (pitch size, trench width). The dependence of the detector trench on the MTF is also evaluated experimentally by the edge spread function (ESF) method according to the ISO12233 standard. The experimental results show an excellent agreement with the theoretical model, reporting an MTF of 0.61 and 0.60 at the Nyquist frequency for 1 and 2 μ m trench, respectively. With the simulation model, the effect of the increased optical crosstalk for smaller pixel pitch is discussed as a function of the trench width (0.5, 1, and 2 μ m) and incidence angle up to ± 30 ∘ . Simulation results show MTF values at the Nyquist frequency between 0.61–0.62, 0.58–0.60, and 0.55–0.57 with an average degradation of 1%, 2%, and 7% at an angle of ± 30 ∘ compared to normal incidence for the 10, 7.5, and 5 μ m pitch, respectively.

The dependence of quantum efficiency (QE) on fill factor and pixel pitch is studied theoretically and experimentally in fully delineated type-II superlattice (T2SL) detectors. Theoretically, a 2-dimensional simulation model is used to compute the absorption in the array geometry, which shows an insensitivity of the optical response to the fill factor. This is a result of the photodiode array (PDA) geometry concentrating the light in the pixel area. QE measurements on PDAs with varying pixel pitch (from 225 to 10 μm) and fill factors (from 98% to 64%) confirm this independence of the QE on the fill factor and results in a 50% increase in the photocurrent density in 10 μm pitch PDAs compared to 225 μm pitch PDAs. Furthermore, measurements of the dark current density vs pixel size revealed an absence of surface leakage in these PDAs, which, combined with the increased photocurrent density results in an improved signal-to-noise ratio when reducing the pitch in these T2SL detectors. Finally, this result resolves the QE-modulation transfer function trade-off, as the electrical isolation of the pixel is carried out without impacting the QE of the array.

This work investigates the potential of p-type InAs/GaSb superlattice for the fabrication of full mid-wave megapixel detectors with n-on-p polarity. A significantly higher surface leakage is observed in deep-etched n-on-p photodiodes compared to p-on-n diodes. Shallow-etch and two-etch-step pixel geometry are demonstrated to mitigate the surface leakage on devices down to 10 mu m with n-on-p polarity. A lateral diffusion length of 16 mu m is extracted from the shallow etched pixels, which indicates that cross talk could be a major problem in small pitch arrays. Therefore, the two-etch-step process is used in the fabrication of 1280 x 1024 arrays with a 7.5 mu m pitch, and a potential operating temperature up to 100 K is demonstrated.

The surface leakage in InAs/GaSb type-II superlattice (T2SL) is studied experimentally and theoretically for photodiodes with small sizes down to 10 x 10 mu m(2). The dependence of dark current density on mesa size is studied at 110 and 200 K, and surface leakage is shown to impact both generation-recombination (GR) and diffusion dark current mechanisms. A quasi-3-dimensional model to simulate the fabrication process using surface traps on the pixel's sidewall is presented and is used to accurately represent the dark current of large and small pixels with surface leakage in the different temperature regimes. The simulations confirmed that the surface leakage current has a GR and diffusion component at low and high temperature, respectively. Finally, the surface leakage current has been correlated with the change in minority carrier concentration at the surface due to the presence of donor traps.

Herein, results from noise and dark current density studies on InAs/GaSb type-II superlattice IR detectors are presented. The activation energy of the dark current density is used to identify the dominating dark current mechanisms (generation–recombination (GR), tunneling, or diffusion dark current) as a function of temperature and bias. The bias evolution of the power spectral density (PSD) is measured in dark conditions for several temperatures. At the operating bias of the detectors, the arrays show a white noise–dominated spectrum up to 100 K with a minor 1/f contribution (corner frequency around 10 Hz), while for higher temperatures the spectra are 1/f dominated. The 1/f noise component is compared to the dominating dark current mechanism in the same temperature and bias regimes. A strong correlation between the 1/f noise component and the dominating dark current (I) is found, with the PSD proportional to I for tunneling currents and I2 for GR and diffusion currents. Very low noise coefficients of αGR = 4.8 × 10−9 Hz−1, αdiff = 1.9 × 10−10 Hz−1, and αtun = 2.1 × 10−16 A Hz−1 are observed for these detectors. 

The improvement of forming gas anneal (10 % H2 in N2) at 400 °C on electrical properties of Ge/GeOx/Tm2O3/HfO2 gate stacks is investigated. It is found that forming gas anneal effectively suppresses fixed charge density, oxide trap density and interface state density. Hydrogen is demonstrated to efficiently passivate the negative fixed charge density and reduce the global variability of the flatband voltage down to 90 mV over a wafer. A forming gas anneal is also found to reduce equivalent oxide thickness in scaled gate stacks.

The improvement of forming gas anneal (10 % H-2 in N-2) at 400 degrees C on electrical properties of Ge/GeOx/Tm2O3/HfO2 gate stacks is investigated. It is found that forming gas anneal effectively suppresses fixed charge density, oxide trap density and interface state density. Hydrogen is demonstrated to efficiently passivate the negative fixed charge density and reduce the global variability of the Hatband voltage down to 90 mV over a safer. A forming gas anneal is also found to reduce equivalent oxide thickness in scaled gate stacks.

Fully depleted silicon-on-insulator (FDSOI) CMOS with thick buried oxide (BOX) can operate at higher temperatures compared to bulk CMOS. This work demonstrates, both experimentally and through simulations, that the subthreshold characteristics (off-state leakage current, beak and subthreshold swing, SS) are greatly improved at high temperatures by reducing the Si thickness (t(si)) in FDSOI CMOS. Fabricated N and PFET devices exhibit low I-leak < 300 pA/mu m and close to ideal subthreshold swing (SS<132 mV/dec) at 300 degrees C. TCAD simulations closely match measured data and show that electrostatic control of the Si layer is key to achieve close to ideal SS and low I-leak. With proper gate electrodes FDSOI CMOS can achieve an I-off< 1nA/mu m at 300 degrees C for both P and NFETs. This result shows that FDSOI CMOS can find use as low power control logic at high temperatures.

An image sensor based on wide band gap silicon carbide (SiC) has the merits of high temperature operation and ultraviolet (UV) detection. To realize a SiC-based image sensor the challenge of opto-electronic on-chip integration of SiC photodetectors and digital electronic circuits must be addressed. Here, we demonstrate a novel SiC image sensor based on our in-house bipolar technology. The sensing part has 256 ( $16\times 16$ ) pixels. The digital circuit part for row and column selection contains two 4-to-16 decoders and one 8-bit counter. The digital circuits are designed in transistor-transistor logic (TTL). The entire circuit has 1959 transistors. It is the first demonstration of SiC opto-electronic on-chip integration. The function of the image sensor up to 400 degrees C has been verified by taking photos of the spatial patterns masked from UV light. The image sensor would play a significant role in UV photography, which has important applications in astronomy, clinics, combustion detection and art.