This paper presents a soft-switched buck converter using Autonomous Gate Drivers (AGDs) for power electronic converters. Operating at a 400 V DC-link, typical of Electric Vehicles (EVs) and industrial systems, the converter achieves Zero Voltage Switching (ZVS) during turn-on and turn-off via AGD circuitry and optimized snubber capacitance. Operating in Triangular Current Mode (TCM), the converter utilizes inductor current ripple to enable ZVS. Experimental results confirm reliable soft-switching and suppression of voltage overshoot under realistic conditions. While the validation uses a buck converter, the proposed AGDs are directly applicable to more complex converters, including three-phase inverters with sinusoidal reference currents, relevant to EVs, renewable energy, and industrial drives. This work demonstrates a scalable solution for reducing switching losses and improving efficiency in advanced high-voltage converters.

The utilization of soft-switching inverters is essential for achieving high efficiency and low electromagnetic interference (EMI) in electric vehicle (EV) drive systems. However, inductor design for such converters presents significant challenges. In triangular current mode (TCM)-based zero voltage switching (ZVS) inverters, inductors experience large current ripple and variable switching frequency, leading to excessive core and winding losses. This paper presents a design methodology for a high-power filter inductor specifically suited for TCM-based ZVS inverters. A ferrite pot core was selected, and three winding techniques—Litz wire, copper foil, and solid copper wire—were evaluated. The inductance of the three inductors was determined both experimentally and via simulation using FEMM and ANSYS, while power losses were estimated using FEM-based simulations in ANSYS. Experimental determination of 3C91 core loss coefficients was also performed. The optimal configuration required two parallel inductors per phase, resulting in a final three-phase inverter design with six inductors, each 57 mm high and 66 mm in diameter. By integrating experimental measurements with simulation-based loss estimation, the proposed approach reduces core and copper losses, improves thermal management, and enhances power density, making it suitable for next-generation EV powertrains and renewable energy conversion systems.

This study analyzes the sequential failure and remaining useful life (RUL) of a multi-chip power module (MCPM) using finite element (FE) simulation, an empirical lifetime model, and recursive deconvolution. The FE model captures electro-thermal interactions, while the empirical model estimates failure probabilities from power cycling test data. The deconvolution method refines the probability density function of the first failure, providing deeper insights into degradation trends. Results show that the first die in an MCPM can fail significantly earlier than the last, with temperature imbalances contributing to this variation. Despite early failures, the system can continue operating with minor thermal impacts. These findings highlight the need for adaptive failure management and improved thermal design to enhance reliability and system life time.

Double-sided cooled (DSC) power semiconductor modules have garnered increased interest over the past decade due to their ability to offer an additional path for heat removal, facilitating higher power density operation while reducing junction temperatures and thermal stresses. Nevertheless, when operating at similar junction temperatures, DSC modules might exhibit elevated thermo-mechanical stress compared to single-sided cooled (SSC) modules. This increase can be attributed to restricted vertical movement within the DSC modules. Furthermore, the integration of various spacers within the DSC modules, which enable bond wire connections to gate terminals, can significantly influence both the thermal performance and induced thermo-mechanical stresses. Depending on the materials used in the spacer, the thermal performance and thermo-mechanical stresses inside the module can vary. In this study, we have first analysed the thermal performance of the DSC power modules employing different spacers. Following that, we have also performed thermo-mechanical analysis in different solder layers. Finally, fatigue analysis is done to demonstrate the weakest solder layer inside the package.

Accurate estimation of losses in high-power traction converters is essential for an effective design. Precise estimation of switching and conduction losses is crucial for this purpose. In this paper, the widely recognized Double Pulse Test (DPT) is employed to determine these losses. However, time-shift errors and misalignments in measurements can lead to significant deviations in loss estimation of the actual setup. This paper introduces a postprocessing method aimed at mitigating time-shift and misalignment issues in voltage and current waveforms. The proposed method is validated through simulation, demonstrating its effectiveness in improving the accuracy of loss estimation for high-power traction converters.

This paper evaluates traction inverters for heavy-duty electric vehicles, focusing on key criteria such as raised power ratings with improved efficiency and power densities. Boosted voltage and current levels are required to achieve higher power levels and provide megawatt charging system solutions, which results in the need to utilize new semiconductors and topologies. In this study, 3-Level neutral point clamped (3L- NPC) and 2-Level 6-phase (2L-6Ph) voltage source inverters (VSIs) are evaluated and compared to conventional 2-Level 3-phase (2L-3Ph). The comparison uses figure-of-merit parameters and a virtual prototyping method based on several performance indices, such as efficiency, power density, output harmonic quality, and reliability. Then, efficiency maps are acquired to find out the sweet operating points, minimizing losses. Results show that the 3L-NPC VSI system provides a higher switching frequency, which also shrinks the size of the passive elements and cooling system. Although the 3L-NPC inverter requires additional power switches and isolated gate drivers, its estimated performance outweighs such reliability and cost-dependent issues. Therefore, this study concludes that multi-level inverter topologies hold promise for high-voltage, high-power traction drives.

The semiconductor industry plays a critical role in numerous sectors, yet faces vulnerability in its supply chains. The recent global semiconductor shortage highlighted the risks of relying on a single supplier. To mitigate this, companies adopt dualsourcing strategies, but power devices like silicon carbide (SiC) metal-oxide semiconductor field-effect transistors (MOSFETs) pose challenges due to manufacturing nuances. Configurable gate-drive units (GDUs) offer flexibility but often require external input for device recognition. This paper introduces a method to achieve a self-configurable gate-drive unit based on measuring the gate step-response for power device identification. The proposed method enhances safety, ensures seamless integration, and offers adaptability in full-bridge or multi-phase systems. Experimental results demonstrate component uniformity, emphasize the importance of interval selection, and showcase the impact of external gate resistors on rise and fall times. Estimations of input capacitance using different methods highlight their effectiveness in distinguishing among devices. The practical implementation of the proposed method contributes to the efficiency, reliability, and cost-effectiveness of self-configurable GDUs.