The increasing processing power of today's HW/SW platforms leads to the integration of more and more functions in a single device. Additional design challenges arise when these functions share computing resources and belong to different criticality levels. CONTREX complements current activities in the area of predictable computing platforms and segregation mechanisms with techniques to consider the extra-functional properties, i.e., timing constraints, power, and temperature. CONTREX enables energy efficient and cost aware design through analysis and optimization of these properties with regard to application demands at different criticality levels. This article presents an overview of the CONTREX European project, its main innovative technology (extension of a model based design approach, functional and extra-functional analysis with executable models and run-time management) and the final results of three industrial use-cases from different domain (avionics, automotive and telecommunication).

The task scheduling problem for Multiprocessor System-on-Chips (MPSoC), which plays a vital role in performance, is an NP-hard problem. Exploring the whole search space in order to find the optimal solution is not time efficient, thus metaheuristics are mostly used to find a near-optimal solution in a reasonable amount of time. We propose a novel metaheuristic method for near-optimal scheduling that can provide performance guarantees for multiple applications implemented on a shared platform. Applications are represented as directed acyclic task graphs (DAG) and are executed on an MPSoC platform with given communication costs. We introduce a novel multi-population method inspired by both genetic and imperialist competitive algorithms. It is specialized for the scheduling problem with the goal to improve the convergence policy and selection pressure. The potential of the approach is demonstrated by experiments using a Sobel filter, a SUSAN filter, RASTA-PLP and JPEG encoder as real-world case studies.

When designing complex mixed-critical systems on multiprocessor platforms, a huge number of design alternatives has to be evaluated. Therefore, there is a need for tools which systematically find and analyze the ample alternatives and identify solutions that satisfy the design constraints. The recently proposed design space exploration (DSE) tool DeSyDe uses constraint programming (CP) to find implementations with performance guarantees for multiple applications with potentially mixed-critical design constraints on a shared platform. A key component of the DeSyDe tool is its throughput analysis component, called a throughput propagator in the context of CP. The throughput propagator guides the exploration by evaluating each design decision and is therefore executed excessively throughout the exploration. This paper presents two throughput propagators based on different analysis methods for DeSyDe. Their performance is evaluated in a range of experiments with six different application graphs, heterogeneous platform models and mixed-critical design constraints. The results suggest that the MCR throughput propagator is more efficient.

Embedded system designers often face a large number of design alternatives when designing complex systems. A designer must select an alternative which satisfies application constraints (e.g. timing requirements) while optimizing system level objectives such as overall energy consumption. The size of design space is often very large giving rise to the need for systematic Design Space Exploration (DSE) methods. In this paper we address the DSE problem for real-time applications that belong to two different domains: (i) streaming applications modeled using the synchronous dataflow graphs; (ii) feedback control tasks modeled using the periodic task model. We consider a heterogeneous multiprocessor platform in which processors communicate through a predictable bus architecture. We present our DSE tool in which the DSE problem is modeled as a constraint satisfaction problem, and it is solved using a constraint programming solver. This approach provides a modular framework in which different constraints such as deadline, throughput and energy consumption can easily be plugged depending on the system being designed.

We have introduced an adaptive hierarchical scheduling framework as a solution for composing dynamic real-time systems, i.e., systems where the CPU demand of its tasks are subjected to unknown and potentially drastic changes during run-time. The framework consists of a controller which periodically adapts the system to the current load situation. In this paper, we unveil and explore the detailed behavior and performance of such an adaptive framework. Specifically, we investigate the controller configurations enabling efficient control parameters which maximizes performance, and we evaluate the adaptive framework against a traditional static one. Furthermore, we demonstrate the results of our investigation using a practical multimedia case study in which we simulate the timing behavior of video decoding tasks running on our proposed framework. In addition, we compare the results of using our framework with the results of using static resource allocation approach.

Modern computer systems are often designed to play a multipurpose role. Therefore, they are capable of running a number of software tasks (software programs) simultaneously in parallel. These software tasks should share the processor such that all of them run and finish their computations as expected. On the other hand, a number of software tasks have timing requirements meaning that they should not only access the processing unit, but this access should also be in a timely manner. Thus, there is a need to timely share the processor among different software programs (applications). The time-sharing often is realized by assigning a fixed and predefined processor time-portion to each application. However, there exists a group of applications where, i) their processor demand is changing in a wide range during run-time, and/or ii) their occasional timing violations can be tolerated. For systems that contain applications with the two aforementioned properties, it is not efficient to assign the applications with fixed processor time-portions. Because, if we allocate the processor resource based on the maximum resource demand of the applications, then the processor's computing capacity will be wasted during the time intervals where the applications will require a smaller portion than maximum resource demand. To this end, in this thesis we propose adaptive processor time-portion assignments. In our adaptive scheme, at each point in time, we monitor the actual demand of the applications, and we provide sufficient processor time-portions for each application. In doing so, we are able to integrate more applications on a shared and resource constrained system, while at the same time providing the applications with timing guarantees.

We have presented a multi-level adaptive hierarchical scheduling framework in our previous work. The framework targets compositional real-time systems which are composed of both hard and soft real-time systems. While static CPU portions are reserved for hard real-time components, the CPU portions of soft real-time components are adjusted during run-time. In this paper, we present the implementation details of our framework which is implemented as a Linux kernel loadable module. In addition, we present a case-study to evaluate the performance and the overhead of our framework.

Processor partitioning and hierarchical scheduling have been widely used for composing hard real-time systems on a shared hardware platform while preserving the timing requirements of the systems. Due to the safety critical nature of the hard real-time systems for deriving the sufficient partition size often conservative analysis is used. Applying the exact same analysis for deriving the partition sizes for soft real-time systems result in unnecessary processors overallocation and consequently waste of the CPU resource. In this paper, to address the problem of composing soft and hard real-time systems on a resource constrained shared hardware, we present a multi-level adaptive hierarchical scheduling framework. In our framework, we adapt the processor partition sizes of soft real-time systems according to their need at each time point by on-line monitoring their processor demand. Furthermore, we implement our adaptive framework in the Linux kernel and show the performance of our framework using a case-study.