Slippery lubricant impregnated surfaces (SLIPSs/LISs) exhibit remarkable features of repellency and droplet mobility to a broad range of complex fluids. Their performance in micro-droplet repellency has received less attention. In this study, the anti-wetting performance of SLIPSs in comparison to superhydrophobic surfaces (SHSs) is investigated for the micro-droplet impact on different textured surfaces. Different series of square-pillar arrays are modeled to consider the effect of surface morphology on droplet hydrodynamics. A multiphase numerical model in conjunction with an accurate contact angle method has been implemented to analyze details of three immiscible phases during the droplet impact on the SLIPS. Our findings revealed that on the SLIPS with a low-density micro-textured surface where the effect of lubricant is more significant, droplet repellency and mobility are improved compared to SHSs. It was illustrated that on the SLIPS, droplet pinning decreased significantly and in low Weber number cases where the effect of lubricant is more noticeable, partial bouncing occurred. It was also observed that slippery surfaces with a low-density of micro-pillars exhibit bouncing behavior, which indicated the repellency effect of lubricant in droplet hydrodynamics. Although micro-droplets failed to recoil at a higher Weber number ( W e similar or equal to 160) on both the SHS and the SLIPS, droplet penetration within the micro-structured surface was considerably smaller on the SLIPS.

models are important tools to manage the increasing complexity of system design. The choice of a modeling language for constructing models governs what types of systems can be modeled, and which subsequent design activities can be performed. This is especially true for the area of embedded electronic and cyber-physical system design, which poses several challenging requirements of modeling and design methodologies. This article argues that the Formal System Design (ForSyDe) methodology with the necessary presented extensions fulfills these requirements, and thus qualifies for the design of tomorrow's systems. Based on the theory of models of computation and the concept of process constructors, heterogeneous models are captured in ForSyDe with formal semantics. A refined layer of the formalism is introduced to make its denotational-style semantics easy to implement on top of commonly used imperative languages, and an open-source realization on top of the IEEE standard language SystemC is presented. The introspection mechanism is introduced to automatically export an intermediate representation of the constructed models for further analysis/synthesis by external tools. Flexibility and extensibility of ForSyDe is emphasized by integrating a new timed model of computation without central synchronization, and by providing mechanisms for integrating foreign models, parallel and distributed simulation, modeling adaptive, data-parallel, and non-deterministic systems. A set of ForSyDe features is demonstrated in practice, and compared with similar approaches using a running example and two relevant case studies.

Design of real-time MPSoC systems including multiple appli-cations is challenging because temporal requirements of each applicationmust be respected throughout the entire design flow. Currently the de-sign of different applications is often interdependent, making converge toa solution for each application difficult. This paper proposes a composi-tional method to design applications independently, and then to executethem without interference. We define a formal modeling framework as asuitable entry point for application design. The models are executable,which enables early detection of specification errors, and include the for-mal properties of the applications based on well-defined models of com-putation. We combine this with a predictable MPSoC platform templatethat has a supporting design flow but lacks a simulation front-end. Thestructure and behavior of the application models are exported to an in-termediate format via introspection which is iteratively adapted for thebackend flow. We identify the problems arising in this adaptation andprovide appropriate solutions. The design flow is demonstrated by a sys-tem consisting of two streaming applications where less than half of thedesign time is dedicated to operating on the integrated system model.

With the growing complexity of Real-Time Embedded Systems (RTES), there is a huge interest in using modeling languages such as the Unified Modeling Language (UML), and other Model-Driven Engineering (MDE) techniques targeting RTES system design. These approaches provide language abstractions for system design, allowing to focus on their relevant properties. Unfortunately, such approaches still suffer from several shortcomings including the lack of well-defined semantics. Therefore, it remains difficult to connect the MDE specification tools and the design tools that are based on formal grounds and well-defined semantics to perform analysis, validation or system synthesis for RTES. This paper presents a top-down RTES design flow aiming to reduce the gap between MDE and formal design approaches. We present the connection between a framework dedicated to the enrichment of modeling languages such as UML with formal semantics, a framework based on formal models of computation supporting validation by simulation, and a system synthesis tool targeting a flexible platform with well-defined execution services. Our purpose is to cover several system design phases from specification, simulation down to implementation on a platform. As a case study, a JPEG Encoder application was realized following the different design steps of the tool-chain.

Virtual Prototypes (VPs) provide an early development platform to embedded software designers when the hardware is not ready yet and allows them to explore the design space of a system, both from the software and architecture perspective. However, automatic generation of VPs is not straightforward because several aspects such as the validity of the generated platforms and the timing of the components needs to be considered. To address this problem, based on a framework which characterizes predictable platform templates, we propose a method for automated generation of VPs which is integrated into a combined design flow consisting of analytic and simulation based design-space exploration. Using our approach the valid TLM-2.0-based simulated VP instances with timing annotation can be generated automatically and used for further development of the system in the design flow. We have demonstrated the potential of our method by designing a JPEG encoder system.

The Functional Mock-up Interface (FMI) standard defines a method for tool- and platform-independent model exchange and co-simulation of dynamic system models. In FMI, the master algorithm, which executes the imported components, is a timed differential equation solver. This is a limitation for heterogeneous embedded and cyber-physical systems, where models with different time abstractions co-exist and interact. This work integrates FMI into a heterogeneous system modeling and simulation framework as process constructors and co-simulation wrappers. Consequently, each external model communicates with the framework without unnecessary semantic adaptation while the framework provides necessary mechanisms for handling heterogeneity. The presented methods are implemented in the ForSyDe-SystemC modeling framework and tested using a case study.

The design of real-time multiprocessor systems is a very costly and time-consuming process due to the need for extensive verification efforts. Genericcorrect-by-construction system-level design flows, targeting predictable plat-forms, would help to tackle this problem. Unfortunately, because system-level design problems are formulated monolithically, existing methods areeither not powerful enough to perform efficient design space exploration,over-customized to a specific class of platforms, or do not allow to be ex-tended with new heuristics and solving methods, which makes their reusedifficult. We present a formal framework to explicitly capture and character-ize predictable platform templates that can be used to formulate a genericdesign flow for real-time streaming applications in a composable manner. Aproof-of-concept implementation of such a flow is performed and used to mapa JPEG encoder application onto an FPGA-based time-predictable platform.

To cope with the increasing complexity of embedded and cyber-physical system design, different system-level design approaches are proposed which start from abstract models and implement them using design flows with high degrees of automation. However, creating models of such systems and also formulating the mathematical problems arising in these design flows are themselves challenging tasks. A promising approach is the composable construction of these models and problems from more basic entities. Unfortunately, it is non-trivial to propose such compositional formulations today because the current practice in the electronic design automation domain tends to be on using imperative languages and frameworks due to legacy and performance-oriented reasons.

This thesis addresses the system design complexity by first promoting proper formalisms and frameworks for capturing models and formulating design-space exploration problems for electronic system-level design in a declarative style; and second, propose realizations based on the industrially accepted languages and frameworks which hold the interesting properties such as composability and parallelism.

For modeling, ForSyDe, a denotational system-level modeling formalism for heterogeneous embedded systems is chosen, extended with timed domains to make it more appropriate for capturing cyber-physical systems, and mapped on top of the IEEE standard system design language SystemC. The realized modeling framework, called ForSyDe-SystemC, can be used for modeling systems of heterogeneous nature and their composition to form more sophisticated systems and also conducting parallel and distributed simulation for boosting the simulation speed. Another extension to ForSyDe, named wrapper processes, introduces the ability to compose formal ForSyDe models with legacy IP blocks running in external execution environments to perform a heterogeneous co-simulation.

In platform-based design flows, the correct and optimal mapping of an application model onto a flexible platform involves solving a hard problem, named design space exploration. This work proposes Tahmuras, a constraint- based framework to construct generic design space exploration problems as the composition of three individual sub-problems: the application, the platform, and the mapping and scheduling problems. In this way, the model of the design space exploration problem in Tahmuras is automatically generated for each combination of application semantics, target platform, and mapping and scheduling policy simply by composing their respective problems. Using constraint programming, problems can be modeled in a declarative style, while they can be solved in a variety of different styles, including imperative solving heuristics commonly used to solve difficult problems. Efficient parallel solvers exists for constraint programming. 

Den ökande komplexiteten är en stor utmaning för konstruktionen av framtida inbyggda system. För att möta utmaningen utvecklas nu konstruktionsmetoder som har som mål att starta från en abstrakt modell och att generera en implementering genom ett konstruktionsflöde med hög automatiseringsgrad. Dessvärre är dock skapandet av abstrakta systemmodeller och formaliseringen av de relaterade matematiska problemen i sig ett mycket utmanande problem. Konstruktion genom komposition av basenheter är en lovande idé, men tyvärr är det väldigt svårt att introducera metoden i dagens industriella konstruktionsflöden på grund av imperativa programmeringsspråk och ett gammalt arv i form av existerande kodbas och äldre konstruktioner.

Avhandlingen adresserar komplexiten inom systemkonstruktion genom att föreslå passande formalismer för att uttrycka modeller i en deklarativ stil och angripa problemet att hitta en passande implementering. Dessutom visar avhandlingen hur dessa formalismer kan realiseras i en form som kan användas i ett industriellt sammanhang utan att förlora formalismens viktiga grundläggande egenskaper som komposition och parallelism.

Modelleringen använder och utökar ForSyDe, en konstruktionsmetod för heterogena inbyggda system. Tilläggen består av en modelleringsmodell som kan fånga specifika egenskaper hos heterogena inbyggda system, samt en implementering av ForSyDe i SystemC, ett industriellt modelleringsspråk som är standardiserat av IEEE. Den nya utvecklingsmiljön, ForSyDe-SystemC, kan användas för att modellera inbyggda system, komponera systemmodeller till större system, samt möjliggör genomförandet av parallella och distribuerade simuleringar med medföljande hög simuleringshastighet. Avhandlingen introducerar också “wrapper”-konceptet i ForSyDe som möjliggör integrationen av existerande modeller och system som en del av en formell ForSyDe-modell och deras co-simulering. ForSyDe-SystemC har använts inom EU-projekt av industriella partner för modellering av egna system.

Att hitta en korrekt och effektiv implementering av en abstrakt systemmodell är målet inom aktiviteten “design space exploration” (DSE) som är ett svårt problem för parametriserbara och flexibla plattformar. Avhandlingen presenterar två generationer av Tahmuras, som är baserade på villkorsprogrammering och har som mål att konstruera DSE-problemet som en komposition av tre olika delproblem: applikation, plattform, och bindning. Ett integrerat DSE-problem kan sedan automatiskt genereras genom en kombination av dessa delproblem. Olika metoder, från heuristisk till komplett sökning, kan användas inom villkorsprogrammering för att lösa DSE-problemet. För att visa Tahmuras potential har DSE-metoden validerats med hjälp av olika systemapplikationer av skilda tidsegenskaper och olika plattformar. 

Simulation of complex embedded and cyber-physical systems requires exploitation of the computation power ofavailable parallel architectures. Current simulation environments either do not address this parallelism or use separate models for parallel simulation and for analysis and synthesis, which might lead to model mismatches. We extend a formal modeling framework targeting heterogeneous systems with elements that enable parallel simulations. An automated flow is then proposed that starting from a serial executable specification generates an efficient MPI-based parallel simulation model by using aconstraint-based method. The proposed flow generates parallel models with acceptable speedups for a representative example.

Virtual prototypes (VPs) provide an early development platform to embedded software designers when the hardware is not ready yet and allows them to explore the design space of a system, both from the software and architecture perspective. However, automatic generation of VPs is not straightforward because several aspects such as the validity of the generated platforms and the timing of the components needs to be considered. To address this problem, based on a framework which characterizes predictable platform templates, we propose a method for automated generation of VPs which is integrated into a combined design flow consisting of analytic and simulation based design-space exploration. Using our approach the valid TLM 2.0-based simulated VP instances with timing annotation can be generated automatically and used for further development of the system in the design flow. We have demonstrated the potential of our method by designing a JPEG encoder system.