This paper proposes a novel power module concept specially designed for highly reliable silicon carbide (SiC) power devices for medium- and high-power applications. The concept consists of two clamped structures: 1) a press-pack power stage accommodating SiC power switch dies and 2) perpendicularly clamped press-pack heatsinks, in which the heatsinks are in contact with electrically insulated case plates of the power stage. The concept enables bondless package with symmetric double-sided cooling of the dies and allows for an order of magnitude higher clamping force on the heatsinks than what can be applied on the dies. The concept has been evaluated in a first demonstrator (half-bridge configuration with 10 paralleled SiC dies in each position). The experimental methodologies, setups, and procedures have been presented. The commutation loop inductance is approximately 9 nH at 78 kHz. The junction-to-case thermal resistance is approximately 0.028 K/W. Furthermore, a simplified 3-D finite-element thermomechanical model representing the center unit of the demonstrator has been established for the purpose of future optimization. The accuracy of the simulated temperatures is within 4% compared to the measurements. Finally, a 3-D thermomechanical stress distribution map has been obtained for the simplified model of the demonstrator.

Silicon carbide embedded power modules enable a compact and cost competitive packaging solution for high-switching frequency and high-temperature operation applications. Power module packaging technologies span several engineering domains. At the early design stage, simulation-driven development is necessary to shorten the design period and reduce the design cost. This paper presents a novel design concept of a three-phase embedded power module (1200 V, 20 A, 55 mm × 36 mm × 0.808 mm) including silicon carbide metal-oxide-semiconductor field-effect transistor and antiparallel diode dies. Based on the E/CAD design data different layer built-up designs have been tested against thermal, mechanical, and electrical behavior. The obtained simulation data then have been evaluated against a commercial available power module (Motion Smart Power Module SMP33) which utilizes over mold direct bonded copper substrates with soldered semiconductor dies and bond wire contacts. Compared to the conventional module, the loop conductive interconnection parasitic inductance and resistance of the design concept (Vdc+ to Vdc-) reduces approximately by 88 % and 72 %, respectively. The average junction to case thermal resistance has been improved by approximately more than 10 % even though the total package size reduces by approximately 88 %. Furthermore, the contours of deformation and stresses have been investigated for the design concept in the thermomechanical simulation.

This paper presents an experimental methodology for the characterization of thermomechanical displacement and friction properties in a free-floating press-pack structure, and evaluation of the tensile stress on the semiconductor die through simulation of different mechanical and thermal loading conditions. The press-pack structure consists of a single silver-metallized (1 μm) silicon carbide die (400 μm) in contact with rhodium-coated (0.4 μm) molybdenum square plates. The thermomechanical displacements in the press-pack structure have been obtained using the digital image correlation technique, and the mean random error has been $± $0.1 μm, which is approximately 10 ppm of the measured length (10.5 mm). The developed experimental method has led to an analytical estimation of friction coefficients on the interfaces' silicon carbide-molybdenum and molybdenum-copper. The results demonstrate that the thin silver layer behaves as a solid film lubricant. A 2-D finite-element model representing the experimental setup has been implemented. The difference in displacement between measurement and simulation is less than 8%. Furthermore, the coinfluence of the design parameters on the thermomechanical performance of the stacked structure has been analyzed through simulations. Finally, design guidelines to reduce the tensile stress on the silicon carbide die have been proposed regarding free-floating press-pack power electronics packaging.

The package parasitics are a serious obstacle to the high-speed switching, which is necessary in order to reduce the switching power losses or reduce the size of power converters. In order to design new packages suitable for Silicon Carbide (SiC) power transistors, it is necessary to extract the parasitics of different packages and be able to predict the switching performance of the power devices placed in these packages. This paper presents two ways of simulating the switching performance in a half-bridge power module with SiC MOSFETs. The results show that the parasitic inductances in the power module slow down the switching, lead to poor current sharing, and together with the parasitic capacitances lead to oscillations. These negative effects can cause failures, increased losses, and electromagnetic compatibility issues.

Thermal contact resistances between a silver metallized SiC chip and a Molybdenum substrate and between the Molybdenum substrate and bulk Copper were measured in a heat transfer experiment. An experimental method to separate thermal contact resistances in a multilayer heat transfer path was used to extract the layer-specific contact resistances. The experimental results were compared with theory based calculations and also with 3-D computational fluid dynamics (CFD) simulation results. The results show significant pressure dependence of the thermal contact resistance and the results show higher thermal contact resistance per unit area between the bulk SiC chip and Molybdenum than between Molybdenum and bulk Copper.

Thermal contact resistances between a silver metallized SiC chip and a direct bonded copper (DBC) substrate have been measured in a heat transfer experiment. A novel experimental method to separate thermal contact resistances in multilayer heat transfer path has been demonstrated. The experimental results have been compared both with analytical calculations and with 3D computational fluid dynamics (CFD) simulation results. A simplified CFD model of the experimental setup has been validated. The results show significant pressure dependence of the thermal contact resistance but also a pressure independent part.

A simplified transient computational fluid dynamics model of an automotive three-phase double-side liquid cooled silicon carbide power inverter, including pin-fin baseplates, has been developed and qualified for parametric studies. Effective heat transfer coefficients have been extracted from the detailed pin-fin baseplate model for two coolant volume flow rates 2 l/min and 6 l/min, at the coolant temperature 105 degrees C. The inverter model includes temperature dependent heat losses of SiC transistors and diodes, calculated for two driving cycles. Baseplate materials such as copper, aluminum-silicon carbide metal matrix composite, aluminium alloy 6061 as well as virtual materials have been evaluated in the parametric studies. Thermal conductivity, specific heat and density have been varied as well as thickness of the finned baseplates (1 to 3 mm). A trade-off between temperature of SiC chips and baseplate weight has been investigated by means of Pareto optimization. The main results of the parametric studies include a weak dependence (1 to 3 degrees C) of the chip temperature on baseplate thickness. Furthermore, switching e.g. between copper and AlSiC results in 5 to 8 degrees C increase of the chip temperature, at 65 to 70 % baseplate weight reduction.

A thermal design of an integrated double-side cooled SiC 50kW-1200V-200A power inverter for hybrid electric vehicle applications has been proposed to enable cooling in two different automotive operating environments: under-hood and controlled temperature environment of passenger compartment. The power inverter is integrated with air/liquid cooled cold plates equipped with finned channels. Concept evaluation and CFD model calibration have been performed on a simplified thermal prototype. Computational experiments on the detailed model of the inverter, including packaging materials, have been performed for automotive industry defined application scenarios, including two extreme and one typical driving cycles. For the studied application scenarios the case temperature of the SiC transistors and diodes have been found to be below 210°C. The maximum steady-state temperature of the DC-link capacitor has been below 127 °C for the worst-case scenario including liquid cooling, and up to 140 °C for the worst-case scenario with air-cooling.