Recent developments in high-voltage direct current transmission technology and the plans for multi-terminals motivate research efforts on the fast DC breaker. A novel concept to interrupt current up to several kiloamperes within a few milliseconds is presently under development, using a vacuum interrupter together with power electronics to create an artificial zero-crossing in the current through the switch. To achieve this objective, one critical component in the concept is an ultra-fast linear mechanical actuator. A prototype has been developed based on a Thomson coil. The experimental results are presented and show how a contact gap in a vacuum interrupter was effectively created in a controlled manner. Current of several kiloamperes was successfully interrupted within 3ms, thanks to the high-speed operation of the linear actuator.

This paper gives an overall review of the working principle of the inertial response from the synchronous condenser for frequency support in the grid. In addition to this, four proposed frequency control strategies for improvement of network frequency response by static energy storage devices, such as the Static Synchronous Compensator (STATCOM) with suitable energy storage elements or the battery energy storage system (BESS), are presented. The proposed frequency control strategies are evaluated and benchmarked with the synchronous condenser in the same network. It is shown that a power electronic converter based system with energy storage can be designed with lower rating, still providing the same or better frequency support than the synchronous condenser.

The current from an electrical arc furnace (EAF) in a steel plant is highly unsymmetrical, i.e. it comprises a large amount of negative sequence. This causes problems with the voltage stability in the capacitor submodules for a static synchronous compensator (STATCOM), when implemented using the modular multilevel converter (M2C) concept. In order to counteract the uncontrollability of the capacitor voltage, a common practice is to circulate a zero-sequence fundamental current or a direct current. The method brings the benefit of re-balancing the active power among the individual phases while it requires over-rating of the valve current or dc voltage of the STATCOM. This would in practice give a more expensive design. This paper presents a benchmark of various M2C-based STATCOM designs considering the valve overrating. The STATCOM topologies will be benchmarked with the EAF modeled for all possible combinations of positive-and negative-sequence current. The rating comparison considering the dc capacitor ripple and zero-sequence harmonic injection are discussed.

This paper proposes a new HVDC grid test system for electro-magnetic transient analysis, suitable for HVDC power system studies ranging from protection to dynamic studies investigating converter behaviour and interactions. In the recent past research interest in HVDC grids has increased, leading to a multitude of studies concerning dc power flow and optimal power flow, dynamics and HVDC grid protection. However, each of these studies makes use of different grid topologies, configurations and transmission line parameters. In this paper, a standard HVDC grid test system is proposed and an implementation in EMT-type software is provided. The implementation in EMT-type software makes use of a frequency dependent cable model, continuous converter model and a reduced dc breaker model. By means of a protection study, the effectiveness and computational efficiency of the proposed HVDC grid test system is demonstrated. The model with its parameters will be made publicly available.

The feasibility of future multiterminal dc (MTDC) systems depends largely on the capability to withstand dc-side faults. Simulation models of MTDC systems play a very important role in investigating these faults. For such studies, the test system needs to be accurate and computationally efficient. This paper proposes a detailed equivalent model of the modular multilevel converter (MMC), which is used to develop the MTDC test system. The proposed model is capable of representing the blocked-mode operation of the MMC, and can be used to study the balancing control of the capacitor voltages. In addition, the operation of the MMC when redundant submodules are included in the arms can also be studied. A simplified model of a hybrid high-voltage dc breaker is also developed. Hence, the developed test system is capable of accurately describing the behavior of the MMC-based MTDC system employing hybrid HVDC breakers, during fault conditions. Using time-domain simulations, permanent dc-side faults are studied in the MTDC system. In addition, a scheme to control the fault current through the MMC using thyristors on the ac side of the converter is proposed.

In this paper, the authors first highlight an existing overvoltage phenomenon that is inherent to the modular multilevel converter (MMC) topology. The latter occurs during the blocking sequences of semiconductor devices if the converter needs to be stopped due to circulating current, loss of control, or unexpected faults. An analysis based on time-domain expressions describing each operating sequence during normal and faulty blocking conditions is used to demonstrate the origin of this overvoltage. Thereafter, system behaviour is obtained when devices gating signals are withheld as well as the exact overvoltage cause. Real-time simulation, with submicrosecond time steps, and experimental results validate the overvoltage phenomena and the proposed remedial strategy to avoid uncontrolled faulty conditions.

Variable-speed drives have reduced voltage requirementswhen operating below the base speed. In a modularmultilevel-converter-based (M2C-based) motor drive it is thenpossible to operate with reduced voltage in the submodulecapacitors, than at the base speed. In this sense, a greatercapacitor-voltage ripple can be accommodated, without exceedingthe maximum peak-capacitor voltage. This paper presents ananalytical investigation for the optimal selection of the averagecapacitor voltage for M2Cs, when the motor is operating withrated torque, below the base speed. This method does not requireany power exchange between the converter arms, so it keepsthe conduction losses at the minimum level. Additionally, themethod decreases the switching losses, due to the decreasedcapacitor-voltage level. The overall ratings of the converterremain the same as in the base-speed operation. It is shownthat this method can be applied at a speed range betweenthe base speed and down to approximately one third of it,i.e, an operating range that covers the requirements for typicalpump- and fan-type applications. The results obtained from theanalytical investigation are experimentally verified on a downscaledlaboratory prototype M2C.

The modular multilevel converter (MMC) is the state-of-the-art voltage-source converter (VSC) topology used for various power-conversion applications. In the MMC, submodule failures can occur due to various reasons. Therefore, additional submodules called the redundant submodules are included in the arms of the MMC to fulfill the fault-safe operation requirement. The performance of the MMC with redundant submodules has not been widely covered in the published literature. This paper investigates the performance of the MMC with redundant submodules in the arms. Two different control strategies are used and compared for integrating redundant submodules. The response of the MMC to a submodule failure for the two strategies is also studied. Moreover, the operation of the MMC with redundant submodules is validated experimentally using the converter prototype in the laboratory.

Modular multilevel converters (M2Cs) are increasingly used in high-voltage direct current (HVDC) systems. The efficiency of M2Cs is influenced by the modulation and cell selecting methods, which determines the switching frequency and capacitor voltage ripple in the converter station. A new approach to modulation of the M2C is presented in this paper. Tolerance band methods are employed to obtain the switching instants, and also cell selection. The proposed methods overcome the modulation problem for converters with few cells on one hand and also reduce the sorting efforts for cell balancing purposes of many cells converter on the other hand. Three different algorithms are also proposed to balance the cell capacitor voltages. The evaluation is done in time-domain simulation by which the performance of each method is studied in both the steady-state and transient cases. It is observed that using tolerance band methods not only reduces the switching frequency but also allows for handling severe fault cases in a grid-connected system. Eventually, the most promising tolerance band method has been implemented and verified in a real-time digital simulator, RTDS®. The average switching frequency of 70 Hz has been achieved for the system under study, while the capacitor voltage ripple is limited to 10% of the nominal cell voltage.