Modular multilevel converters (MMCs) can be configured to perform ac/ac conversion, which makes them suitable as railway power supplies. In this paper, a hierarchical control scheme for ac/ac MMCs for railway power supplies is devised and evaluated, considering the requirements and the operating conditions specific to this application. Furthermore, admittance models of the ac/ac MMC are developed, showing how the suggested hierarchical control scheme affects the three-phase and the single-phase side admittances of the converter. These models allow for analyzing the stability of the interconnected system using the impedance-based stability criterion and the passivity-based stability assessment. Finally, the findings presented in this paper are validated experimentally, using a down-scaled MMC. 

Future meshed high-voltage direct current grids require modular multilevel converters with extended functionality. One of the most interesting new submodule topologies is the semi-full-bridge because it enables efficient handling of DC-side short circuits while having reduced power losses compared to an implementation with full-bridge submodules. However, the semi-full-bridge submodule requires the parallel connection of capacitors during normal operation which can cause a high redistribution current in case the voltages of the two submodule capacitors are not equal. The maximum voltage difference and resulting redistribution current have been studied analytically, by means of simulations and in a full-scale standalone submodule laboratory setup. The most critical parameter is the capacitance mismatch between the two capacitors. The experimental results from the full-scale prototype show that the redistribution current peaks at 500A if the voltage difference is 10V before paralleling and increases to 2500A if the difference is 40V. However, neglecting very unlikely cases, the maximum voltage difference predicted by simulations is not higher than 20-30V for the considered case. Among other measures, a balancing controller is proposed which reduces the voltage difference safely if a certain maximum value is surpassed. The operating principle of the controller is described in detail and verified experimentally on a down-scaled submodule within a modular multilevel converter prototype. It can be concluded that excessively high redistribution currents can be prevented. Consequently, they are no obstacle for using the semi-full-bridge submodule in future HVDC converters.

An investigation of the voltage imbalance of the two capacitors of the semi-full-bridge submodule is performed. Since the capacitances are not exactly the same, there may be a difference between the capacitor voltages. The resulting current-spike when they are connected in parallel has been analyzed in a full-scale laboratory experiment.

In this paper, a comparison of the energy storage requirements is performed for the modular multilevel converter (MMC) with half-bridge and full-bridge submodules as well as for the alternate arm converter (AAC). Concerning the AAC, the operational mode with overlap period is taken into account and an analytical relation between the overlap angle and the modulation index is presented. This ensures that the net energy exchange for the converter arms is zero over each half cycle.

In modular multilevel converters there is a trade-off between the switching frequency and the voltage ripple in the submodule capacitors. The reason for this is that it becomes increasingly difficult to balance the capacitor voltages when the switching frequency is reduced. This paper presents a new submodule circuit which improves the balancing of the capacitor voltages at low switching frequencies. The proposed submodule circuit consists of two capacitors and eight switches, forming a three-level submodule. Ideally, the voltage and current ratings of the switches can be chosen such that the combined power rating of the semiconductors is the same as for the equivalent solution with conventional half-bridge submodules. The proposed submodule circuit provides the possibility of connecting the two capacitors in parallel when the intermediate voltage level is used. This will reduce the capacitor voltage ripple, especially at low switching frequencies and thus allow for a reduction of the size, weight, and cost of the submodule capacitors. The proposed submodule circuit is validated by both simulations and experimental results. It is found that the parallel connection of the submodule capacitors will, in fact, significantly improve the balancing of the capacitor voltages.

Many publications have been presented on the modulation and control of the modular multilevel converter, some of which are based on phase-shifted carrier modulation. This paper presents an analysis of how the switching frequency affects the capacitor voltages, circulating currents, and alternating voltages using phase-shifted carrier modulation. It is found that switching frequencies that are integer multiples of the fundamental frequency should be avoided as they can cause the capacitor voltages to diverge. Suitable switching frequencies are derived for which the arm and line quantities will be periodic with symmetric operating conditions in the upper and lower arms. Thus, the practical outcome of this paper is a detailed description of how the switching frequency should be chosen in order to achieve advantageous operating conditions. The theoretical results from the analysis are validated by both simulations and experimental results.

In this paper, previously developed stability results for open-loop sum-capacitor-voltage control of modular multilevel converters are extended. To give improved damping, circulating-current feedback is included in the control law. With the output-current control loop and a first-order measurement lag taken into account, global asymptotic stability is proven. Careful consideration of the on-line sum-capacitor-voltage reference computation is given, since this is the most critical part of the control system.

The balancing of the capacitor voltages in modular multilevel converters becomes increasingly difficult when the switching frequency is reduced. Typically, a reduced switching frequency will increase the spread in the capacitor voltages and, thus, the voltage ripple in the individual submodules. This paper presents a capacitor voltage balancing strategy which aims to combine a low switching frequency with a low capacitor-voltage ripple. This is done by a predictive algorithm that controls the converter in such a way that the stored charge in the submodule capacitors is evenly distributed among all the submodules when the capacitor voltages reach their maximum values. In this way, it is possible to limit the peak voltages in the submodule capacitors at switching frequencies as low as 2-3 times the fundamental switching frequency. The proposed capacitor voltage balancing strategy is validated by both simulations and experimental results with 130-Hz and 140-Hz switching frequency. In the simulations, the capacitor voltage ripple was reduced by 24% compared to the case when a conventional sorting algorithm is used, and the experimental results show that it is possible to combine the proposed voltage balancing strategy with a circulating-current controller.

Modular multilevel converters (M2Cs) are increasingly used in high-voltage direct current (HVDC) systems. The efficiency of M2Cs is influenced by the modulation and cell selecting methods, which determines the switching frequency and capacitor voltage ripple in the converter station. A new approach to modulation of the M2C is presented in this paper. Tolerance band methods are employed to obtain the switching instants, and also cell selection. The proposed methods overcome the modulation problem for converters with few cells on one hand and also reduce the sorting efforts for cell balancing purposes of many cells converter on the other hand. Three different algorithms are also proposed to balance the cell capacitor voltages. The evaluation is done in time-domain simulation by which the performance of each method is studied in both the steady-state and transient cases. It is observed that using tolerance band methods not only reduces the switching frequency but also allows for handling severe fault cases in a grid-connected system. Eventually, the most promising tolerance band method has been implemented and verified in a real-time digital simulator, RTDS®. The average switching frequency of 70 Hz has been achieved for the system under study, while the capacitor voltage ripple is limited to 10% of the nominal cell voltage.

This paper presents a simplified qualitative comparison of previously presented cascaded multilevel converter topologies for ac-ac conversion with particular emphasis on motor drive applications. Performance criteria such as the pulsation of the stored energy in the cell capacitors and the total required semiconductor rating are derived by analytical methods. The main conclusion is that the back-to-back connected modular multilevel converter operates best at synchronous speed, whereas the modular matrix converter and Hexverter are better suited for low-frequency output. However, by injecting circulating currents in the phase arms the operating region can be extended for all of the studied topologies.