Open this publication in new window or tab >>2020 (English)In: Proceedings 50th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2020, Institute of Electrical and Electronics Engineers (IEEE) , 2020, p. 58-63Conference paper, Published paper (Refereed)
Abstract [en]
Recently, several deep-learning side-channel attacks on cryptographic algorithms were demonstrated. With the help of a trained deep-learning model, the attacker extracts the key from a few power traces captured from a victim device. However, previous works have shown that the inter-chip variation may significantly reduce the attack success probability. In this paper, we quantify the effect of inter-chip variation on the classification accuracy of Multi-Layer Perceptron (MLP) models. We show that, by training on multiple chips, we can increase the probability of recovering the key from a single trace from 39.95% to 86.07% on average. We also evaluate how the printed circuit board diversity affects the classification accuracy.
Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2020
Series
International Symposium on Multiple-Valued Logic, ISSN 0195-623X
Keywords
Side-channel attack, power analysis, deep learning, multi-source training, AES
National Category
Computer Sciences
Identifiers
urn:nbn:se:kth:diva-298617 (URN)10.1109/ISMVL49045.2020.00-29 (DOI)000656495500011 ()2-s2.0-85097343863 (Scopus ID)
Conference
50th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2020, Miyazaki, Japan, November 9-11, 2020
Note
Part of proceedings: ISBN 978-1-7281-5406-0
QC 20210710
2021-07-102021-07-102023-02-08Bibliographically approved