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Publications (10 of 14) Show all publications
Bahrami, F., Jordao, R., Sander, I. & Ungureanu, G. (2024). Automatic Parallelization of Embedded Software via Hierarchical Process Network Transformations. In: 2024 forum on specification & design languages, FDL 2024: . Paper presented at 27th Forum on Specification and Design Languages (FDL), SEP 04-06, 2024, KTH Royal Inst Technol, Stockholm, SWEDEN (pp. 37-45). Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>Automatic Parallelization of Embedded Software via Hierarchical Process Network Transformations
2024 (English)In: 2024 forum on specification & design languages, FDL 2024, Institute of Electrical and Electronics Engineers (IEEE) , 2024, p. 37-45Conference paper, Published paper (Refereed)
Abstract [en]

To fully utilize multi-processors, new tools are required to manage software complexity. We present a novel technique that enables automating hierarchical process network transformations to derive optimized parallel applications. Designers leverage a library of process constructors and data-parallel algorithmic skeletons, utilizing the well-defined semantics of a restricted set of operators. This carefully chosen set addresses both temporal and spatial aspects of computation, enabling the automated identification of various parallel patterns. We utilize an augmented version of a meta-modeling framework grounded in system graphs and trait hierarchies to generate an intermediate representation (IR) of the system model to simplify automatic transformations and evaluations. Our augmentation allows for capturing skeletons and hierarchical networks. By meticulously selecting the underlying framework, we alleviate the need for tool integration in our design flow. We validate our approach through a proof-of-concept implementation, where our automated tool applied 193 transformations to fully parallelize an image processing application.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2024
Series
International Forum on Design Languages, ISSN 1636-9874
Keywords
embedded systems, software parallelization, process network transformation, design transformation
National Category
Computer Sciences Software Engineering
Identifiers
urn:nbn:se:kth:diva-356025 (URN)10.1109/FDL63219.2024.10673845 (DOI)001324887800005 ()2-s2.0-85206251790 (Scopus ID)
Conference
27th Forum on Specification and Design Languages (FDL), SEP 04-06, 2024, KTH Royal Inst Technol, Stockholm, SWEDEN
Note

Part of ISBN 979-8-3315-0458-8, 979-8-3315-0457-1

QC 20241111

Available from: 2024-11-11 Created: 2024-11-11 Last updated: 2025-06-19Bibliographically approved
Jordao, R., Becker, M. & Sander, I. (2024). IDeSyDe: Systematic Design Space Exploration via Design Space Identification. ACM Transactions on Design Automation of Electronic Systems, 29(5), Article ID 87.
Open this publication in new window or tab >>IDeSyDe: Systematic Design Space Exploration via Design Space Identification
2024 (English)In: ACM Transactions on Design Automation of Electronic Systems, ISSN 1084-4309, E-ISSN 1557-7309, Vol. 29, no 5, article id 87Article in journal (Refereed) Published
Abstract [en]

Design space exploration (DSE) is a key activity in embedded design processes, where a mapping between applications and platforms that meets the process design requirements must be found. Finding such mappings is very challenging due to the complexity of modern embedded platforms and applications. DSE tools aid in this challenge by potentially covering sections of the design space that could be unintuitive to designers, leading to more optimised designs. Despite this potential benefit, DSE tools remain relatively niche in the embedded industry. A significant obstacle hindering their wider adoption is integrating such tools into embedded design processes. We present two contributions that address this integration issue. First, we present the design space identification (DSI) approach for systematically constructing DSE solutions that are modular and tuneable. Modularity means that DSE solutions can be reused to construct other DSE solutions, while tuneability means that the most specific DSE solution is chosen for the target DSE problem. Moreover, DSI enables transparent cooperation between exploration algorithms. Second, we present IDeSyDe, an extensible DSE framework for DSE solutions based on DSI. IDeSyDe allows extensions to be developed in different programming languages in a manner compliant with the DSI approach. We showcase the relevance of these contributions through five different case studies. The case study evaluations showed that non-exploration DSI procedures create overheads, which are marginal compared to the exploration algorithms. Empirically, most evaluations average 2% of the total DSE request. More importantly, the case studies have shown that IDeSyDe indeed provides a modular and incremental framework for constructing DSE solutions. In particular, the last case study required minimal extensions over the previous case studies so that support for a new application type was added to IDeSyDe.

Place, publisher, year, edition, pages
Association for Computing Machinery (ACM), 2024
Keywords
Design space exploration, design space identification, embedded system design
National Category
Embedded Systems
Identifiers
urn:nbn:se:kth:diva-355298 (URN)10.1145/3647640 (DOI)001331108600004 ()2-s2.0-85206216490 (Scopus ID)
Note

QC 20241030

Available from: 2024-10-30 Created: 2024-10-30 Last updated: 2024-10-30Bibliographically approved
Jordao, R. (2024). Modular and tuneable design space exploration in model-driven engineering of embedded systems. (Doctoral dissertation). Stockholm: KTH Royal Institute of Technology
Open this publication in new window or tab >>Modular and tuneable design space exploration in model-driven engineering of embedded systems
2024 (English)Doctoral thesis, monograph (Other academic)
Abstract [en]

The design of modern embedded systems is increasingly complex. Different applications must share a heterogeneous embedded platform while satisfying demanding design requirements. The financial cost and engineering effort to implement such modern embedded systems are proportional to this increasing complexity. Model-driven-engineering (MDE) approaches mitigate this complexity by using well-defined models as the central elements of the design process. Namely, these models can be used to automate design process activities, such as design space exploration (DSE).

This thesis brings two contributions within this context. First, a novel meta-modelling approach for MDE with its implementation ForSyDe IO. Second, the design space identification (DSI) approach with its implementation IDeSyDe. ForSyDe IO is a language-agnostic MDE framework that promotes cooperative development through its underlying common model and capabilities. IDeSyDe is a modular and tuneable MDE DSE framework that enables the composable construction of DSE solutions via DSI. Of greater practical value, DSI and its implementation IDeSyDe seamlessly combine different DSE solutions to improve the overall exploration performance.

To ensure these contributions have immediate practical value, this thesis also presents four different MDE DSE scenarios originating from industrial cooperation incorporated into IDeSyDe. The industrial cooperation includes periodic workloads from avionics and automotive contexts and digital signal processing applications from academic contexts. ForSyDe IO was used to express each case study’s applications, platforms and requirements, which shows how it can be incrementally adapted for different scenarios. At the same time, IDeSyDe is used to construct DSE solutions for each case study in a fashion that displays IDeSyDe’s modularity, tuneability and capabilityfor synergizing different DSE solutions.

The case studies show qualitatively how the contributions, DSI in particular, aid in providing a cooperative and modular environment for developing MDE DSE solutions. At the same time, the numeric results of case studies show quantitatively that the overhead of the DSI automated proceduresis negligible compared to the overall DSE process and that the transparent combination of explorers improves the overall exploration performance without additional development effort.

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2024. p. xx, 221
Series
TRITA-EECS-AVL ; 2024:66
Keywords
Design space exploration, Model-driven engineering, Embedded systems
National Category
Embedded Systems
Research subject
Electrical Engineering
Identifiers
urn:nbn:se:kth:diva-354060 (URN)978-91-8106-038-6 (ISBN)
Public defence
2024-11-01, https://kth-se.zoom.us/j/61167004728, Sal A, Kistagången 16, floor 2, Kista, 13:00 (English)
Opponent
Supervisors
Funder
Vinnova, 2017-04892Vinnova, 2019-02743Vinnova, 2021-02484
Note

The ITEA 3 project 2018-02228 PANORAMA was also a major funding source for this thesis.

QC 20241002

Available from: 2024-10-02 Created: 2024-09-27 Last updated: 2024-10-17Bibliographically approved
Jordao, R., Bahrami, F., Yang, Y., Becker, M., Sander, I. & Rosvall, K. (2024). Multi-objective preference-free exact design space exploration of static DSP on multicore platforms. In: 2024 forum on specification & design languages, FDL 2024: . Paper presented at 27th Forum on Specification and Design Languages (FDL), SEP 04-06, 2024, KTH Royal Inst Technol, Stockholm, SWEDEN (pp. 59-67). Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>Multi-objective preference-free exact design space exploration of static DSP on multicore platforms
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2024 (English)In: 2024 forum on specification & design languages, FDL 2024, Institute of Electrical and Electronics Engineers (IEEE) , 2024, p. 59-67Conference paper, Published paper (Refereed)
Abstract [en]

A challenge in designing resource-constrained embedded systems for digital signal processing (DSP) is their complexity due to their vast design spaces, where only a fraction of implementations are feasible or optimal. A crucial tool to aid in this challenge is automated design space exploration (DSE). However, no exact, multi-objective, and preference-free DSE approach exists for DSP applications on resource-constrained embedded platforms. We propose a novel DSE solution with these ideal characteristics to perform DSE of analyzable DSP applications for tile-based multiprocessing embedded platforms. Our proposal harmonizes the exactness of constraint programming (CP) and the exploration efficiency of genetic algorithms (GA). Through this synergy, no single-objective reduction strategy or a priori objective preferences is required. We evaluate the proposal through state-of-the-art single-objective case studies and multi-objective case studies inspired by these. The evaluations show that our proposal improves the single-objective state-of-the-art and finds high-quality approximate Pareto-frontiers for the multi-objective case study. Therefore, our proposal is a more performant single-objective DSE solution than the state-of-the-art, and it is the first exact, multi-objective, and preference-free DSE approach for the problem addressed.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2024
Series
International Forum on Design Languages, ISSN 1636-9874
Keywords
design space exploration, multiprocessing embedded systems, digital signal processing
National Category
Embedded Systems
Identifiers
urn:nbn:se:kth:diva-356036 (URN)10.1109/FDL63219.2024.10673877 (DOI)001324887800008 ()2-s2.0-85206268957 (Scopus ID)
Conference
27th Forum on Specification and Design Languages (FDL), SEP 04-06, 2024, KTH Royal Inst Technol, Stockholm, SWEDEN
Note

Part of ISBN 979-8-3315-0458-8, 979-8-3315-0457-1

QC 20241111

Available from: 2024-11-11 Created: 2024-11-11 Last updated: 2025-05-27Bibliographically approved
Jordao, R., Becker, M., Sander, I. & Söderquist, I. (2023). Design space exploration for safe and optimal mapping of avionics functionality on IMA platforms. In: AIAA/IEEE Digital Avionics Systems Conference: Proceedings. Paper presented at 42nd AIAA/IEEE Digital Avionics Systems Conference (DASC), 1-5 October 2023, Barcelona, Spain. Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>Design space exploration for safe and optimal mapping of avionics functionality on IMA platforms
2023 (English)In: AIAA/IEEE Digital Avionics Systems Conference: Proceedings, Institute of Electrical and Electronics Engineers (IEEE) , 2023Conference paper, Published paper (Refereed)
Abstract [en]

    Future avionic systems will be increasingly automated. The size and complexity of the avionics functions in these systems will increase likewise. The degree of attainable automation directly depends on the avionics system's computing power and the efficiency of available tools that map the overall functionality onto the target heterogeneous platform architecture. In safety-critical scenarios, these automation tools must also provide safety guarantees that aid or drive the certification processes.

    In line with this automation goal, We propose a novel design space exploration technique for the mapping functionality on IMA platforms.    The design space exploration technique returns mappings of the functionality onto the platform that are safe and increasingly resource-efficient.    A safe mapping is one where the functional and extra-functional requirements are met.    A resource-efficient mapping is one where fewer processing elements are used to achieve a safe mapping.    More importantly, the proposed technique can return computational proof that no safe mapping is likely possible. This proof is key for safety-critical contexts.

    To demonstrate the suitability of our technique for avionics systems design scenarios, we investigate its use with an industrial avionics case based on the ones from the PANORAMA ITEA3 project. The case study includes two avionics functionalities,    one control functionality, and one streaming-like functionality. The platform is hierarchical and heterogeneous, with elements oriented for higher safety and elements oriented for higher performance.    The avionics case-study evaluation shows that our novel design space exploration technique's abstractions and assumptions adequately represent avionics design scenarios directly or through a systematic overestimation.

    The technique is openly available within the design space exploration tool IDeSyDe. Therefore, designers can immediately benefit from the optimality and safety guarantees given by our novel design space exploration technique in their avionics design process.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2023
National Category
Embedded Systems Computer Systems
Research subject
Information and Communication Technology
Identifiers
urn:nbn:se:kth:diva-338768 (URN)10.1109/DASC58513.2023.10311316 (DOI)001103267600209 ()2-s2.0-85178655754 (Scopus ID)
Conference
42nd AIAA/IEEE Digital Avionics Systems Conference (DASC), 1-5 October 2023, Barcelona, Spain
Funder
Vinnova, 2021-02484
Note

Part of ISBN 979-835033357-2

QC 20231215

Available from: 2023-10-25 Created: 2023-10-25 Last updated: 2024-02-06Bibliographically approved
Jordao, R., Bahrami, F., Chen, R. & Sander, I. (2022). A multi-view and programming language agnostic framework for model-driven engineering. In: PROCEEDINGS OF THE 2022 FORUM ON SPECIFICATION & DESIGN LANGUAGES (FDL): . Paper presented at Forum on Specification and Design Languages (FDL), SEP 14-16, 2022, Linz, AUSTRIA. Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>A multi-view and programming language agnostic framework for model-driven engineering
2022 (English)In: PROCEEDINGS OF THE 2022 FORUM ON SPECIFICATION & DESIGN LANGUAGES (FDL), Institute of Electrical and Electronics Engineers (IEEE) , 2022Conference paper, Published paper (Refereed)
Abstract [en]

Model-driven engineering (MDE) addresses the complexity of modern-day embedded system design. Multiple MDE frameworks are often integrated into a design process to use each MDE framework's state-of-the-art tools for increased productivity. However, this integration requires substantial development effort. In this paper, we propose an MDE, framework based on a formalism of system graphs and trait hierarchies for programming-language-agnostic integration between tools within our framework and with tools of other MDE frameworks. Implementing our framework for each programming language is a one-time development effort. We evaluate our proposal in an MDE design process by developing a Java supporting library and an AMALTHEA connector. Then we perform an MDE, industrial avionics case study with both. The evaluation shows that our framework facilitates the integration of different tools and the independent development of different system parts. Therefore, our framework is a reliable MDE, framework that lowers the effort of integrating tools to benefit from their combined state-of-the-art.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2022
Series
International Forum on Design Languages, ISSN 1636-9874
Keywords
Model-driven Engineering, System Modelling, Collaborative Tools
National Category
Embedded Systems
Identifiers
urn:nbn:se:kth:diva-322481 (URN)10.1109/FDL56239.2022.9925666 (DOI)000889465700011 ()2-s2.0-85141766551 (Scopus ID)
Conference
Forum on Specification and Design Languages (FDL), SEP 14-16, 2022, Linz, AUSTRIA
Note

Part of proceedings: ISBN 978-1-6654-7332-3

QC 20221216

Available from: 2022-12-16 Created: 2022-12-16 Last updated: 2023-10-25Bibliographically approved
Schwartz, C., Sander, I., Jordao, R., Bruhn, F., Persson, M., Ekblad, J. & Fuglesang, C. (2022). On-board Satellite Data Processing to Achieve Smart Information Collection. In: Proceedings of SPIE - The International Society for Optical Engineering: . Paper presented at Optics, Photonics and Digital Technologies for Imaging Applications VII 2022, 9 May 2022 through 15 May 2022. SPIE-Intl Soc Optical Eng
Open this publication in new window or tab >>On-board Satellite Data Processing to Achieve Smart Information Collection
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2022 (English)In: Proceedings of SPIE - The International Society for Optical Engineering, SPIE-Intl Soc Optical Eng , 2022Conference paper, Published paper (Refereed)
Abstract [en]

Nowadays, it is a reality to launch, operate, and utilize small satellites at an affordable cost. However, bandwidth constraint is still an important challenge. For instance, multispectral and hyperspectral sensors generate a significant amount of data subjected to communication channel impairments, which is addressed mainly by source and channel coding aiming at an effective transmission. This paper targets a significant further bandwidth reduction by proposing an on-the-fly analysis technique on the satellite to decide which information is effectively useful for specific target applications, before coding and transmitting. The challenge would be detecting clouds and vessels having the measurements of red-band, green-band, blue-band, and near infrared band, aiming at sufficient probability of detection, avoiding false alarms. Furthermore, the embedded platform constraints must be satisfied. Experiments for typical scenarios of summer and winter days in Stockholm, Sweden, are conducted using data from the Mimir’s Well, the Saab AI-based data fusion system. Results show that non-relevant content can be identified and discarded, pointing out that for the cloudy scenarios evaluated, up to 73.1% percent of image content can be suppressed without compromising the useful information into the image. For the water regions in the scenarios containing vessels, results indicate that a stringent amount of data can be discarded (up to 98.5%) when transmitting only the regions of interest (ROI). 

Place, publisher, year, edition, pages
SPIE-Intl Soc Optical Eng, 2022
Keywords
Cloud detection, Image compression, Satellite communication, Vessel detection, Bandwidth, Data fusion, Data handling, Infrared devices, Satellite communication systems, Bandwidth constraint, Board satellites, Images compression, Information collections, Multispectral sensors, Satellite communications, Satellite data processing, Small-satellite, Satellites
National Category
Signal Processing
Identifiers
urn:nbn:se:kth:diva-324950 (URN)10.1117/12.2620955 (DOI)000943943400017 ()2-s2.0-85132990951 (Scopus ID)
Conference
Optics, Photonics and Digital Technologies for Imaging Applications VII 2022, 9 May 2022 through 15 May 2022
Note

QC 20230426

Available from: 2023-03-27 Created: 2023-03-27 Last updated: 2023-04-26Bibliographically approved
Sander, I., Söderquist, I., Ekman, M., Jordao, R., Bahrami, F., Chen, R. & Åhlander, A. (2022). TOWARDS CORRECT-BY-CONSTRUCTION DESIGN OF SAFETY-CRITICAL EMBEDDED AVIONICS SYSTEMS. In: 33rd Congress of the International Council of the Aeronautical Sciences, ICAS 2022: . Paper presented at 33rd Congress of the International Council of the Aeronautical Sciences, ICAS 2022, Stockholm, Sweden, Sep 4 2022 - Sep 9 2022 (pp. 1637-1658). International Council of the Aeronautical Sciences
Open this publication in new window or tab >>TOWARDS CORRECT-BY-CONSTRUCTION DESIGN OF SAFETY-CRITICAL EMBEDDED AVIONICS SYSTEMS
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2022 (English)In: 33rd Congress of the International Council of the Aeronautical Sciences, ICAS 2022, International Council of the Aeronautical Sciences , 2022, p. 1637-1658Conference paper, Published paper (Refereed)
Abstract [en]

New methodologies are needed for the development of avionics systems to meet today’s software explosion in complexity and related cost due to the increased functionality in the aircraft. Current design flows for software-intensive systems do not have a clear path from the functional specification to the final implementation and cannot provide real-time guarantees. The situation will become even more difficult because, in the future, more and more applications will share the same computation nodes and the network in a distributed hierarchical network-based system. In order to overcome the present situation, a novel methodology for a correct-by-construction design of safety-critical embedded avionics systems has been created and formulated within the Vinnova NFFP7 project CORRECT. Correct-by-construction design is a radical departure from current design practice, with the potential to decrease the verification costs for future systems significantly. The paper presents the underlying foundation of the methodology, its carefully selected ingredients, and discuss available results and existing tool support. The methodology is based on a disciplined system modelling environment grounded on a sound formal foundation, a design space exploration technique, and a clear path to hardware and software synthesis. An industrial case study investigates the potential of the methodology.

Place, publisher, year, edition, pages
International Council of the Aeronautical Sciences, 2022
Keywords
Correct-by-Construction Design, Design Space Exploration, Integrated Modular Avionics, System Modelling, System Synthesis
National Category
Embedded Systems
Identifiers
urn:nbn:se:kth:diva-333305 (URN)2-s2.0-85159674343 (Scopus ID)
Conference
33rd Congress of the International Council of the Aeronautical Sciences, ICAS 2022, Stockholm, Sweden, Sep 4 2022 - Sep 9 2022
Note

Part of ISBN 9781713871163

QC 20230801

Available from: 2023-08-01 Created: 2023-08-01 Last updated: 2023-08-01Bibliographically approved
Jordao, R., Sander, I. & Becker, M. (2021). Formulation of Design Space Exploration Problems by Composable Design Space Identification. In: PROCEEDINGS OF THE 2021 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2021): . Paper presented at 2021 Design, Automation and Test in Europe Conference and Exhibition, DATE 2021, 1-5 February 2021, Grenoble, France. (pp. 1204-1207). Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>Formulation of Design Space Exploration Problems by Composable Design Space Identification
2021 (English)In: PROCEEDINGS OF THE 2021 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2021), Institute of Electrical and Electronics Engineers (IEEE) , 2021, p. 1204-1207Conference paper, Published paper (Refereed)
Abstract [en]

Design space exploration (DSE) is a key activity in embedded system design methodologies and can be supported by well-defined models of computation (MoCs) and predictable platform architectures. The original design model, covering the application models, platform models and design constraints needs to be converted into a form analyzable by computer-aided decision procedures such as mathematical programming or genetic algorithms. This conversion is the process of design space identification (DSI), which becomes very challenging if the design domain comprises several MoCs and platforms. For a systematic solution to this problem, separation of concerns between the design domain and decision domain is of key importance. We propose in this paper a systematic DSI scheme that is (a) composable, as it enables the stepwise and simultaneous extension of both design and decision domain, and (b) tuneable, because it also enables different DSE solving techniques given the same design model. We exemplify this DSI scheme by an illustrative example that demonstrates the mechanisms for composition and tuning. Additionally, we show how different compositions can lead to the same decision model as an important property of this DSI scheme.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2021
Keywords
Computer programming, Embedded software, Genetic algorithms, Mathematical programming, Space platforms, Application models, Decision modeling, Decision procedure, Design constraints, Design space exploration, Models of computation, Platform architecture, Separation of concerns, Design
National Category
Embedded Systems
Identifiers
urn:nbn:se:kth:diva-310720 (URN)10.23919/DATE51398.2021.9474082 (DOI)000805289900225 ()2-s2.0-85111039144 (Scopus ID)
Conference
2021 Design, Automation and Test in Europe Conference and Exhibition, DATE 2021, 1-5 February 2021, Grenoble, France.
Note

Part of proceedings ISBN: 978-3-9819263-5-4

QC 20220413

Available from: 2022-04-13 Created: 2022-04-13 Last updated: 2022-10-12Bibliographically approved
Aybek, M. O., Jordao, R., Lundbäck, J., Lundbäck, K.-L. & Becker, M. (2021). From the Synchronous Data Flow Model of Computation to an Automotive Component Model. In: Proceedings 26th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2021: . Paper presented at 26th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2021, Västerås, Sweden, September 7-10, 2021. Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>From the Synchronous Data Flow Model of Computation to an Automotive Component Model
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2021 (English)In: Proceedings 26th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2021, Institute of Electrical and Electronics Engineers (IEEE) , 2021Conference paper, Published paper (Refereed)
Abstract [en]

The size and complexity of automotive software systems are steadily increasing. Software functions are subject to different requirements and belong to different functional domains of the car. Meanwhile, streaming applications have become increasingly relevant in emerging application areas such as Advanced Driving Assistance Systems. Among models for streaming applications, the Synchronous Data Flow model is well-known for its analysable properties. This work presents transformation rules that allow transforming applications described by the Synchronous Data Flow model to an automotive component model. The proposed transformation rules are implemented in form of a software plugin for an automotive tool suite that allows for timing analysis, code synthesis and deployment to a Real-Time Operating System. To demonstrate the applicability of the proposed approach, a case study of a Kalman filter that is part of a simplified cruise control application is presented. An abstract Synchronous Data Flow model of the filter is transformed into a component that is deployed on an Electronic Control Unit with hard timing guarantees.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2021
Series
IEEE International Conference on Emerging Technologies and Factory Automation-ETFA, ISSN 1946-0740
National Category
Computer Systems Embedded Systems
Identifiers
urn:nbn:se:kth:diva-311047 (URN)10.1109/ETFA45728.2021.9613621 (DOI)000766992600208 ()2-s2.0-85122913789 (Scopus ID)
Conference
26th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2021, Västerås, Sweden, September 7-10, 2021
Note

Part of proceedings 978-1-7281-2989-1

QC 20220420

Available from: 2022-04-20 Created: 2022-04-20 Last updated: 2022-06-25Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0002-1277-3903

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