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Zhu, W. (2025). Efficient Machine Learning for Edge Computing: Architecture and Application. (Doctoral dissertation). Stockholm: KTH Royal Institute of Technology
Open this publication in new window or tab >>Efficient Machine Learning for Edge Computing: Architecture and Application
2025 (English)Doctoral thesis, monograph (Other academic)
Abstract [en]

Machine learning has demonstrated exceptional capability in solving complex tasks across a wide range of fields. Advances in hardware accelerators have enabled the deployment of machine learning models on edge devices, facilitating real-time AI applications in resource-constrained systems. Recent accelerators have increasingly adopted Network-on-Chip (NoC) architectures to support massive data communication within large-scale processing element arrays. However, as the complexity of these accelerators continues to grow, effective design-space exploration before hardware prototyping becomes essential. Additionally, achieving high flexibility and efficiency across diverse machine learning workloads remains a significant challenge, especially for edge computing.

To address these problems, we explore from both the architecture side and the application side. Firstly, we introduce a cycle-accurate simulation tool for NoC-based deep neural network (DNN) accelerators. This simulator enables rapid and precise evaluation of inference efficiency by exploring design parameters. By providing detailed performance tracing into system behavior, the simulator facilitates the optimization of DNN inference efficiency, which can reduce the time and cost associated with hardware prototyping. Then we focus on novel architectural designs for NoC-based DNN accelerators, leveraging in-network processing techniques to improve end-to-end latency and resource utilization. Two key approaches are proposed: an activation-in-network design that offloads non-linear operations to the NoC and a pooling on-the-go design that minimizes communication overhead for pooling layers. These designs demonstrate substantial improvements in processing efficiency upon existing NoC-based accelerator architectures, while maintaining scalability and adaptability for diverse DNN workloads.

The third part explores the application of machine learning in embedded sensor systems, with a focus on lower-limb prostheses. A wearable pressure measurement system is developed to collect and analyze intra-socket pressure data. Two machine learning applications are proposed for solving sub-tasks within the field of comfortable prosthetic socket design. A clustering-based method is developed for optimizing sensor deployment by reducing redundancy while maintaining data integrity. A gait phase recognition approach that utilizes multiple hidden Markov models and Gaussian mixture models is developed. The proposed gait recognition method achieves high accuracy and computational efficiency, which outperforms conventional techniques.

By tackling the challenges in NoC-based accelerator design and machine learning applications for embedded systems, we bridge the gap between hardware optimization and practical deployment. These techniques would pave the way for future advancements in embedded intelligence.

Abstract [sv]

Maskininlärning har visat en exceptionell förmåga att lösa komplexa uppgifter inom en rad olika områden. Framsteg inom hårdvaruacceleratorer har möjliggjort implementeringen av maskininlärningsmodeller på edge-enheter, vilket underlättar realtidsapplikationer för AI i resursbegränsade system. Nya acceleratorer har i allt högre grad anammat Network-on-Chip (NoC) arkitekturer för att stödja massiv datakommunikation inom storskaliga processorelementmatriser. Dock blir det, i takt med att komplexiteten hos dessa acceleratorer ökar, allt viktigare att utforska designrymden effektivt innan hårdvaruprototyptillverkning. Dessutom kvarstår utmaningen att uppnå hög flexibilitet och effektivitet över olika maskininlärningsarbetslaster, särskilt inom edge computing.

För att hantera dessa problem utforskar vi både arkitektursidan och applikationssidan. För det första introducerar vi ett cykelnoggrant simuleringsverktyg för NoC-baserade djupa neurala nätverks (DNN) acceleratorer. Denna simulator möjliggör snabb och exakt utvärdering av inferenseffektivitet genom att undersöka designparametrar. Genom att tillhandahålla detaljerad prestandaspårning av systembeteende underlättar simulatorn optimeringen av DNN-inferenseffektivitet, vilket kan minska tiden och kostnaden för hårdvaruprototyptillverkning. Därefter fokuserar vi på nya arkitektoniska lös\-ningar för NoC-baserade DNN-acceleratorer, där vi utnyttjar in-netverksbear\-betningstekniker för att förbättra end-to-end-latens och resursutnyttjande. Två nyckelmetoder föreslås: en "activation-in-network" design som avlastar icke-linjära operationer till NoC samt en "pooling on-the-go" design som minimerar kommunikationsöverhead för pooling-lager. Dessa designlösningar uppvisar betydande förbättringar i bearbetningseffektivitet jämfört med befintliga NoC-baserade acceleratorarkitekturer, samtidigt som de bibehåller skalbarhet och anpassningsförmåga för olika DNN-arbetslaster.

Den tredje delen undersöker tillämpningen av maskininlärning i inbäddade sensorsystem, med fokus på underbensproteser. Ett bärbart tryckmätningssys\-tem utvecklas för att samla in och analysera tryckdata inom proteshylsan. Två maskininlärningsapplikationer föreslås för att lösa deluppgifter inom området för komfortabel proteshylsdesign. En klusterbaserad metod utvecklas för att optimera sensordistribution genom att minska redundans samtidigt som dataintegriteten bibehålls. En gångfasigenkänningsmetod som utnyttjar flera dolda Markovmodeller och Gaussiska mixmodeller utvecklas. Den föreslagna metoden för gångigenkänning uppnår hög noggrannhet och beräkningsmässig effektivitet, vilket överträffar konventionella tekniker.

Genom att hantera utmaningarna inom NoC-baserad acceleratorutformning och maskininlärningsapplikationer för inbäddade system överbryggar vi klyftan mellan hårdvaruoptimering och praktisk implementering. Dessa tekniker banar väg för framtida framsteg inom inbäddad intelligens.

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2025. p. xiv, 112
Series
TRITA-EECS-AVL ; 2025:26
Keywords
Network-on-Chip, Neural Network Accelerator, Accelerator Performance Simulation, In-Network Processing, Embedded Sensor System, Machine Learning for Prosthetics, Network-on-Chip, Neurala Nätverksacceleratorer, Prestandasimulering för Acceleratorer, Bearbetning inom Nätverket, Inbyggt Sensorsystem, Maskininlärning för Proteser
National Category
Computer Systems
Research subject
Information and Communication Technology
Identifiers
urn:nbn:se:kth:diva-360884 (URN)978-91-8106-208-3 (ISBN)
Public defence
2025-03-28, https://kth-se.zoom.us/j/63180568741, Ka-Sal B, Kistagången 16, Kista, Stockholm, 13:00 (English)
Opponent
Supervisors
Note

QC 20250305

Available from: 2025-03-05 Created: 2025-03-04 Last updated: 2025-03-17Bibliographically approved
Zhu, W., Chen, Y. & Lu, Z. (2025). Pooling On-the-Go for NoC-Based Convolutional Neural Network Accelerator. In: Embedded Computer Systems: Architectures, Modeling, and Simulation - 24th International Conference, SAMOS 2024, Proceedings: . Paper presented at 24th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2024, Samos, Greece, Jun 29 2024 - Jul 4 2024 (pp. 109-118). Springer Nature
Open this publication in new window or tab >>Pooling On-the-Go for NoC-Based Convolutional Neural Network Accelerator
2025 (English)In: Embedded Computer Systems: Architectures, Modeling, and Simulation - 24th International Conference, SAMOS 2024, Proceedings, Springer Nature , 2025, p. 109-118Conference paper, Published paper (Refereed)
Abstract [en]

Due to the complexity and diversity of deep convolutional neural networks (CNNs), Network-on-chip (NoC) based CNN accelerators have grown in popularity to improve inference efficiency and flexibility. Current optimization approaches focus on computational-heavy layers. Therefore, pooling layers are often ignored and processed individually using general processing units. In this work, we explore the acceleration of pooling layers by in-network processing. We propose a pooling on-the-go method to do the pooling operations while transmitting its prior layer outputs. Consequently, we combine the pooling layer with its prior convolution layer to remove unnecessary data movements. We demonstrate our method on a cycle-accurate NoC-CNN accelerator simulator on two CNN models, LeNet and VGG16. The results show that the processing time of individual pooling layers is almost eliminated by around 99%. Compared with the pooling standalone baseline, we can achieve 1.09x speedup in the full LeNet model, and up to 1.16x speedup in the combined layers that our approach applies.

Place, publisher, year, edition, pages
Springer Nature, 2025
Keywords
CNN Accelerator, In-network Processing, Network-on-Chip, Pooling
National Category
Computer graphics and computer vision
Identifiers
urn:nbn:se:kth:diva-360913 (URN)10.1007/978-3-031-78380-7_9 (DOI)001447102500009 ()2-s2.0-85218439695 (Scopus ID)
Conference
24th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2024, Samos, Greece, Jun 29 2024 - Jul 4 2024
Note

Part of ISBN 9783031783791

QC 20250310

Available from: 2025-03-05 Created: 2025-03-05 Last updated: 2025-05-27Bibliographically approved
Chen, Y., Zhu, W. & Lu, Z. (2025). Travel Time-Based Task Mapping for NoC-Based DNN Accelerator. In: Embedded Computer Systems: Architectures, Modeling, and Simulation - 24th International Conference, SAMOS 2024, Proceedings: . Paper presented at 24th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2024, Samos, Greece, June 29 - July 4, 2024 (pp. 76-92). Springer Nature
Open this publication in new window or tab >>Travel Time-Based Task Mapping for NoC-Based DNN Accelerator
2025 (English)In: Embedded Computer Systems: Architectures, Modeling, and Simulation - 24th International Conference, SAMOS 2024, Proceedings, Springer Nature , 2025, p. 76-92Conference paper, Published paper (Refereed)
Abstract [en]

Network-on-Chip (NoC) based architectures are recently proposed to accelerate deep neural networks in specialized hardware. Given that the hardware configuration is fixed post-manufacture, proper task mapping attracts researchers’ interest. We propose a travel time-based task mapping method that allocates uneven counts of tasks across different Processing Elements (PEs). This approach utilizes the travel time recorded in the sampling window and implicitly makes use of static NoC architecture information and dynamic NoC congestion status. Furthermore, we examine the effectiveness of our method under various configurations, including different mapping iterations, flit sizes, and NoC architectures. Our method achieves up to 12.1% improvement compared with even mapping and static distance mapping for one layer. For a complete NN example, our method achieves 10.37% and 13.75% overall improvements to row-major mapping and distance-based mapping, respectively. While ideal travel time-based mapping (post-run) achieves 10.37% overall improvements to row-major mapping, we adopt a sampling window to efficiently map tasks during the running, achieving 8.17% (sampling window 10) improvement.

Place, publisher, year, edition, pages
Springer Nature, 2025
Keywords
DNN accelerator, Network-on-Chip, Task mapping
National Category
Computer Systems
Identifiers
urn:nbn:se:kth:diva-360912 (URN)10.1007/978-3-031-78377-7_6 (DOI)001447099800006 ()2-s2.0-85218456046 (Scopus ID)
Conference
24th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2024, Samos, Greece, June 29 - July 4, 2024
Note

Part of ISBN 9783031783760

QC 20250310

Available from: 2025-03-05 Created: 2025-03-05 Last updated: 2025-06-02Bibliographically approved
Zhu, W., Chen, Y. & Lu, Z. (2024). Activation in Network for NoC-Based Deep Neural Network Accelerator. In: 2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024 - Proceedings: . Paper presented at 2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024, Hsinchu, Taiwan, Apr 22 2024 - Apr 25 2024. Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>Activation in Network for NoC-Based Deep Neural Network Accelerator
2024 (English)In: 2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024 - Proceedings, Institute of Electrical and Electronics Engineers (IEEE) , 2024Conference paper, Published paper (Refereed)
Abstract [en]

Network-on-Chip (NoC) based Deep Neural Net-work (DNN) accelerators are widely adopted, but their performance is still not satisfactory as the network congestion may enlarge the inference latency. In this work, we leverage the idea of in-network processing and propose a computation-while-blocking method to conduct activation in network that improves inference latency for NoC-based DNN accelerators. Our approach offloads the non-linear activation from processing elements (PEs) to network routers. Based on a cycle-accurate NoC-DNN simulator, we experiment on a popular neural network model LeNet. The proposed approach can achieve up to 12% speedup in the first layer, and an overall around 6% decrease in total cycles compared to the baseline.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2024
Keywords
Deep neural networks, DNN accelerator, In-network processing, Network-on-Chip
National Category
Computer Systems
Identifiers
urn:nbn:se:kth:diva-349914 (URN)10.1109/VLSITSA60681.2024.10546384 (DOI)001253001400044 ()2-s2.0-85196721436 (Scopus ID)
Conference
2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024, Hsinchu, Taiwan, Apr 22 2024 - Apr 25 2024
Note

QC 20240704

Part of ISBN 979-8-3503-6034-9

Available from: 2024-07-03 Created: 2024-07-03 Last updated: 2024-09-03Bibliographically approved
Zhu, W., Liu, Z., Chen, Y., Chen, D. & Lu, Z. (2024). Amputee Gait Phase Recognition Using Multiple GMM-HMM. IEEE Access, 12, 193796-193806
Open this publication in new window or tab >>Amputee Gait Phase Recognition Using Multiple GMM-HMM
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2024 (English)In: IEEE Access, E-ISSN 2169-3536, Vol. 12, p. 193796-193806Article in journal (Refereed) Published
Abstract [en]

Gait analysis helps clinical assessment and achieves comfortable prosthetic designs for lower limb amputees, in which accurate gait phase recognition is a key component. However, gait phase detection remains a challenge due to the individual nature of prosthetic sockets and limbs. For the first time, we present a gait phase recognition approach for transfemoral amputees based on intra-socket pressure measurement. We proposed a multiple GMM-HMM (Hidden Markov Model with Gaussian Mixture Model emissions) method to label the gait events during walking. For each of the gait phases in the gait cycle, a separate GMM-HMM model is trained from the collected pressure data. We use gait phase recognition accuracy as a primary metric. The evaluation of six human subjects during walking shows a high accuracy of over 99% for single-subject, around 97.4% for multiple-subject, and up to 84.5% for unseen-subject scenarios. We compare our approach with the widely used CHMM (Continuous HMM) and LSTM (Long Short-term Memory) based methods, demonstrating better recognition accuracy performance across all scenarios.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2024
Keywords
Hidden Markov models, Sockets, Pressure measurement, Prosthetics, Legged locomotion, Accuracy, Gaussian mixture model, Foot, Viterbi algorithm, Phase measurement, Gait phase recognition, hidden Markov model, lower limb prosthesis
National Category
Signal Processing
Identifiers
urn:nbn:se:kth:diva-358816 (URN)10.1109/ACCESS.2024.3516520 (DOI)001383061300030 ()2-s2.0-85212783100 (Scopus ID)
Note

QC 20250122

Available from: 2025-01-22 Created: 2025-01-22 Last updated: 2025-01-22Bibliographically approved
Liu, T., Tan, K., Zhu, W., Chen, P. & Feng, L. (2024). An Event-Triggered Control Mechanism to Improve Online Computation Efficiency of Energy Management Strategies for Hybrid Electric Vehicles. In: 2024 IEEE 27th International Conference on Intelligent Transportation Systems, ITSC 2024: . Paper presented at 27th IEEE International Conference on Intelligent Transportation Systems, ITSC 2024, Edmonton, Canada, Sep 24 2024 - Sep 27 2024 (pp. 3082-3089). Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>An Event-Triggered Control Mechanism to Improve Online Computation Efficiency of Energy Management Strategies for Hybrid Electric Vehicles
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2024 (English)In: 2024 IEEE 27th International Conference on Intelligent Transportation Systems, ITSC 2024, Institute of Electrical and Electronics Engineers (IEEE) , 2024, p. 3082-3089Conference paper, Published paper (Refereed)
Abstract [en]

The superiority of hybrid electric vehicles (HEVs) in energy efficiency highly relies on real-time executions of their energy management strategies (EMSs). Most current EMSs merely seek numeric optimality but neglect computation efficiencies in real-time applications. Hence, these EMSs usually suffer from tremendous computation overheads in practice and thus cannot be executed by onboard embedded processors. Consequently, this paper introduces an event-triggered control mechanism to replace the periodic torque split controller. When the HEV is in hybrid mode, an efficient trigger algorithm at each step determines whether the torque split controller needs to calculate a new solution or the previous solution is still valid. In this way, a large percentage of unnecessary computation overheads is avoided when the powertrain torque demand is unchanged. The advantages of this event-triggered control mechanism are demonstrated by processor-in-the-loop (PIL) simulations on different testing cycles. In contrast to the EMS with a fixed period, the event-triggered controller can significantly reduce both maximum and average CPU utilization in online testing without obviously compromising energy efficiency.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2024
Keywords
Computation efficiency, Energy management strategy, Event-triggered control mechanism, Flexible control period, Hybrid electric vehicle
National Category
Control Engineering Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-367501 (URN)10.1109/ITSC58415.2024.10920035 (DOI)001471220700449 ()2-s2.0-105001669199 (Scopus ID)
Conference
27th IEEE International Conference on Intelligent Transportation Systems, ITSC 2024, Edmonton, Canada, Sep 24 2024 - Sep 27 2024
Note

Part of ISBN 9798331505929

QC 20250718

Available from: 2025-07-18 Created: 2025-07-18 Last updated: 2025-10-30Bibliographically approved
Liu, T., Tan, K., Zhu, W. & Feng, L. (2024). Computationally Efficient Energy Management for a Parallel Hybrid Electric Vehicle Using Adaptive Dynamic Programming. IEEE Transactions on Intelligent Vehicles, 9(2), 4085-4099
Open this publication in new window or tab >>Computationally Efficient Energy Management for a Parallel Hybrid Electric Vehicle Using Adaptive Dynamic Programming
2024 (English)In: IEEE Transactions on Intelligent Vehicles, ISSN 2379-8858, E-ISSN 2379-8904, Vol. 9, no 2, p. 4085-4099Article in journal (Refereed) Published
Abstract [en]

Hybrid electric vehicles (HEVs) rely on energy management strategies (EMSs) to achieve optimal fuel economy. However, both model- and learning-based EMSs have their respective limitations which negatively affect their performances in online applications. This paper presents a computationally efficient adaptive dynamic programming (ADP) approach that can not only rapidly calculate optimal control actions but also iteratively update the approximated value function (AVF) according to the actual fuel and electricity consumption with limited computation resources. Exploiting the AVF, the engine on/off switch and torque split problems are solved by one-step lookahead approximation and Pontryagin's minimum principle (PMP), respectively. To raise the training speed and reduce the memory space, the tabular value function (VF) is approximated by carefully selected piecewise polynomials via the parametric approximation. The advantages of the proposed EMS are threefold and verified by processor-in-the-loop (PIL) Monte Carlo simulations. First, the fuel efficiency of the proposed EMS is higher than that of an adaptive PMP and close to the theoretical optimum. Second, the new method can adapt to the changed driving conditions after a small number of learning iterations and thus has higher fuel efficiency than a non-adaptive dynamic programming (DP) controller. Third, the computation efficiencies of the proposed AVF and a tabular VF are compared. The concise data structure of the AVF enables faster convergence and saves at least 70% of onboard memory space without obviously increasing the average CPU utilization.

Place, publisher, year, edition, pages
IEEE, 2024
Keywords
Hybrid electric vehicle, energy management strategy, adaptive dynamic programming, approximated value function
National Category
Control Engineering Vehicle and Aerospace Engineering
Research subject
Applied and Computational Mathematics, Optimization and Systems Theory; Industrial Information and Control Systems
Identifiers
urn:nbn:se:kth:diva-330694 (URN)10.1109/tiv.2023.3285392 (DOI)001215322100066 ()2-s2.0-85162622555 (Scopus ID)
Projects
XPRESTECoSA
Funder
XPRES - Initiative for excellence in production researchVinnova, TECoSA
Note

Not duplicate with DiVA 1753630

QC 20230704

Available from: 2023-06-30 Created: 2023-06-30 Last updated: 2025-02-14Bibliographically approved
Chen, Y., Zhu, W., Chen, D., Mohammed, O., Khound, P. & Lu, Z. (2024). Impact of Image Sensor Input Faults on Pruned Neural Networks for Object Detection. In: 37th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2024: . Paper presented at 37th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2024, Didcot, United Kingdom of Great Britain and Northern Ireland, Oct 8 2024 - Oct 10 2024. Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>Impact of Image Sensor Input Faults on Pruned Neural Networks for Object Detection
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2024 (English)In: 37th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2024, Institute of Electrical and Electronics Engineers (IEEE) , 2024Conference paper, Published paper (Refereed)
Abstract [en]

Object detection is one of the most fundamental problems in computer vision, and image sensors are commonly used for this. In this paper, we present the impact of image sensor faults on pruned neural networks for object detection. We compare the error sensitivities of networks after network slimming, networks after magnitude-based pruning, and native compact models. We also explore different spatial fault types with three intensities. Furthermore, we have developed a temporal error model based on realistic aging image sensor faults. The results illuminate that the performance on clean images is important as the mean Average Precision (mAP) experiences a decrease with an increase in injected faults. Additionally, we demonstrate that the size of the model does not invariably yield a decisive impact on error tolerance when comparing small models such as pruned models and native compact models.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2024
Keywords
Error sensitivity, Image Sensor Fault, Network Pruning, Network Slimming, Object Detection
National Category
Computer Sciences Computer Engineering Computer Systems
Identifiers
urn:nbn:se:kth:diva-358142 (URN)10.1109/DFT63277.2024.10753547 (DOI)001448004400025 ()2-s2.0-85212421051 (Scopus ID)
Conference
37th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2024, Didcot, United Kingdom of Great Britain and Northern Ireland, Oct 8 2024 - Oct 10 2024
Note

Part of ISBN 9798350366884

QC 20250114

Available from: 2025-01-07 Created: 2025-01-07 Last updated: 2025-07-01Bibliographically approved
Liu, T., Tan, K., Zhu, W. & Feng, L. (2023). Optimal and Adaptive Engine Switch Control for a Parallel Hybrid Electric Vehicle Using a Computationally Efficient Actor-Critic Method. In: IEEE/ASME International Conference on Advanced Intelligent Mechatronics, AIM: . Paper presented at 2023 IEEE/ASME International Conference on Advanced Intelligent Mechatronics, AIM 2023, Seattle, WA, United States of America, 28 June-30 June 2023 (pp. 416-423). Institute of Electrical and Electronics Engineers (IEEE), 2023-June
Open this publication in new window or tab >>Optimal and Adaptive Engine Switch Control for a Parallel Hybrid Electric Vehicle Using a Computationally Efficient Actor-Critic Method
2023 (English)In: IEEE/ASME International Conference on Advanced Intelligent Mechatronics, AIM, Institute of Electrical and Electronics Engineers (IEEE) , 2023, Vol. 2023-June, p. 416-423Conference paper, Published paper (Refereed)
Abstract [en]

Energy management strategies (EMSs) are crucial to the fuel economy of hybrid electric vehicles (HEVs). However, due to the lack of efficient solving approaches, most of existing EMSs mainly focus on the optimal torque split between the internal combustion engine (ICE) and the electric motor but neglect improper ICE on/off switches, and thus usually suffer degraded fuel economy and even unacceptable drivability in practice. To tackle this issue, this paper presents a novel EMS that uses an efficient actor-critic (AC) method to regulate ICE switches with limited computation resources. While common AC methods use complex neural networks (NNs) with arbitrary initialization, the proposed AC uses piecewise cubic polynomials whose parameters are initialized based on optimized solutions of dynamic programming (DP). By this means, the AC can quickly converge with high computation efficiency. The testing results from processor-in-the-loop (PIL) simulations showcase that, compared with a rule-based EMS with tabular value functions, the proposed EMS can greatly improve the equivalent fuel economy by eliminating improper ICE switches after only several iterations of adaptive learning and dramatically save onboard memory space owing to the concise AC structure.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2023
Keywords
Hybrid electric vehicle, Energy management strategy, Engine switch, Actor-critic method, Adaptive learning
National Category
Vehicle and Aerospace Engineering
Identifiers
urn:nbn:se:kth:diva-326339 (URN)10.1109/AIM46323.2023.10196276 (DOI)001051263900054 ()2-s2.0-85168411831 (Scopus ID)
Conference
2023 IEEE/ASME International Conference on Advanced Intelligent Mechatronics, AIM 2023, Seattle, WA, United States of America, 28 June-30 June 2023
Funder
XPRES - Initiative for excellence in production research
Note

QC 20230831

Available from: 2023-04-28 Created: 2023-04-28 Last updated: 2025-02-14Bibliographically approved
Liu, T., Zhu, W., Tan, K. & Feng, L. (2022). A Low-Complexity and High-Performance Energy Management Strategy of a Hybrid Electric Vehicle by Model Approximation. In: 2022 IEEE 18th International Conference on Automation Science and Engineering (CASE): . Paper presented at 2022 IEEE 18th International Conference on Automation Science and Engineering (CASE) (pp. 455-462). Mexico City, Mexico: IEEE
Open this publication in new window or tab >>A Low-Complexity and High-Performance Energy Management Strategy of a Hybrid Electric Vehicle by Model Approximation
2022 (English)In: 2022 IEEE 18th International Conference on Automation Science and Engineering (CASE), Mexico City, Mexico: IEEE, 2022, p. 455-462Conference paper, Published paper (Refereed)
Abstract [en]

The fuel economy of a hybrid electric vehicle(HEV) is determined by its energy management strategy (EMS), while the conventional EMS usually suffers from enormous computation loads when solving a nonlinear optimization problem. To resolve this issue, this paper presents a computationally efficient EMS with close-to-optimal performance using very limited computation resources. Relying on the optimal solutions by offline dynamic programming (DP), a constrained model predictive control (MPC) can quickly determine the engine on/off status and then the torque split problem is solved by a value-based Pontryagin’s minimum principle (PMP). Two measures are taken to further reduce the online computation cost: by surface fitting, the tabular value function is replaced by piecewise linear polynomials and thus the memory occupation is greatly reduced; and by model approximation, the nonlinear torque split problem becomes a quadratic programming one that can be more rapidly solved. The testing results from processor-in-the-loop (PIL) simulation indicate that the proposed EMS can generate a fuel efficiency close to the one by DP, but saves 70% onboard memory space and 30% CPU utilization compared with the benchmark EMS without taking the two measures.

Place, publisher, year, edition, pages
Mexico City, Mexico: IEEE, 2022
Keywords
Hybrid electric vehicle, Energy management strategy, Value fitting, Model approximation, Quadratic programming
National Category
Control Engineering
Identifiers
urn:nbn:se:kth:diva-324357 (URN)10.1109/CASE49997.2022.9926717 (DOI)000927622400049 ()2-s2.0-85141714907 (Scopus ID)
Conference
2022 IEEE 18th International Conference on Automation Science and Engineering (CASE)
Funder
XPRES - Initiative for excellence in production research
Note

Part of proceedings ISBN 978-1-6654-9043-6

QC 20230227

Available from: 2023-02-27 Created: 2023-02-27 Last updated: 2023-04-28Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0002-4911-0257

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