In order to enable the massive introduction of renewable energies the need for high-voltage direct current (HVDC) grids is anticipated. Large, globally interconnected HVDC networks will likely be the most cost-efficient means to balance electricity demand and available generation. In a meshed system it is important to ensure reliability, robustness, failure management, and fast protection of equipment. In case of a failure somewhere in the grid, the remaining system must be kept operational. State-of-the-art converter implementations are either not adapted to future system requirements or lead to increased losses, cost, and converter footprint. Therefore, this thesis examines several aspects of how to improve the HVDC converter design and functionality with the ultimate aim of developing reliable, highly efficient, cost-effective, more compact and lightweight converters.

Advancements are made on several levels of the converter hardware hierarchy. Main circuits, submodule (SM) topologies, and auxiliary power supply (APS) concepts are investigated and new solutions are proposed. On main-circuit level, different voltage-source converters (VSCs) are evaluated in terms of their energy storage elements. This is useful to compare the physical volume of capacitors required by each topology and, thus, to address the need to develop more compact converter stations. The theoretical analysis indicates that the required energy storage of the alternate arm converter (AAC) is smaller compared to the modular multilevel converter (MMC).

On SM level, new topologies are evaluated with the goal to find topologies, which enable efficient handling of dc-side short circuits, reduction of power loss, and lower SM capacitance. The semi-full-bridge (SFB) SM is identified as one of the most promising topologies from this point of view and is investigated in detail. A control concept for capacitor balancing and several options for improved operation of the SFB are presented. Furthermore, a novel SM cluster topology is proposed which features low conduction losses and increased protection against explosion.

The availability of a reliable APS system is crucial for equipment in future HVDC grids. Therefore, APS solutions are investigated considering design complexity, reliable performance, and power consumption. This thesis presents a novel combined optical power and data transmission concept which is tailored to the specific requirements of HVDC converters employing high-voltage (HV) silicon carbide (SiC) devices. The proposed concept offers a robust solution for isolated APS and signal transmission across any voltage barrier.

In order to transition to renewable energy sources and simultaneously meet the increasing demand for electrical energy, highly flexible and efficient grids are required. High-voltage direct-current (HVDC) transmission and grids are foreseen to be a vital part of the future electricity grid. Voltage source converters (VSCs), interfacing between HVDC and high-voltage alternating current (HVAC) technology, need to comply with grid code, and offer high reliability and cost efficiency. The state-of-the-art VSC topology is the modular multilevel converter (MMC), which offers tailored harmonic performance, modularity, fault handling, redundancy, and low losses.

This thesis investigates improvements for VSCs enabled by novel silicon carbide (SiC) power semiconductor devices. These devices feature lower losses, higher blocking voltage, and higher maximum operation temperature. However, a co-design of the different hardware levels (i.e., converter, submodule (SM), power device, and semiconductor) is required to unleash their full potential. The thesis features contributions on several of these hardware levels, aiming at improvements regarding defined technical requirements for VSCs.

It has been shown that, on converter level, future ultrahigh-voltage (UHV) SiC bipolar devices with blocking voltages of up to 50 kV have the potential for significant reduction of converter complexity, volume, and losses. The increased SM voltage is a challenge for internal fault handling, which can be met by a proposed novel SM feature, the discharge loop.

On SM level, additional improvements are enabled by synergies between power semiconductor device technology and SM topology. A comparative evaluation of a large variety of SM topologies in combination with different SiC power semiconductor device technologies identifies several promising design approaches for future SMs. An alternative to the state-of-the-art half-bridge and full-bridge SM is the semi-full-bridge, which is investigated intensively. It features lower switch count and lower losses compared to the full-bridge, while offering DC fault handling capability. Another topology, the double-connected double-zero SM, features additional conduction loss reduction in combination with SiC metal-oxide-semiconductor field-effect transistors (MOSFETs), which is enabled by parallel current paths during certain switching states. A SM cluster enhancing this effect is proposed.

Finally, results on the optimization of SiC PiN diodes via different charge carrier lifetime tailoring methods are presented. The target application is a high-voltage high-frequency LCC converter. In the future, such diodes will also be required as anti-parallel diodes for novel UHV bipolar SiC devices, as bootstrap diodes in gate drivers, and as a part of snubber circuits.