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Tightly-integrated quantum–classical computing using the QHDL hardware description language
KTH, School of Electrical Engineering and Computer Science (EECS), Centres, Centre for High Performance Computing, PDC.ORCID iD: 0000-0002-9479-7393
KTH, School of Electrical Engineering and Computer Science (EECS), Computer Science, Computational Science and Technology (CST).ORCID iD: 0000-0002-6059-8249
KTH, School of Electrical Engineering and Computer Science (EECS), Computer Science, Computational Science and Technology (CST).ORCID iD: 0000-0003-4158-3583
KTH, School of Electrical Engineering and Computer Science (EECS), Computer Science, Computational Science and Technology (CST).ORCID iD: 0000-0003-0639-0639
2026 (English)In: Future Generation Computer Systems, ISSN 0167-739X, E-ISSN 1872-7115, Vol. 174, article id 107977Article in journal (Refereed) Published
Abstract [en]

We present the design, development, and application of QHDL, a quantum hardware description language specifically designed for tightly-coupled quantum–classical computing systems. Together with the language design principles, we describe the QHDL compiler, debugger, and co-simulation infrastructure. We showcase the benefits of using a quantum–classical integrated approach in four use cases, requiring close quantum–classical device interaction: Bell's pair circuit, dynamic delay, Quantum Fourier Transform (QFT), and teleportation. To interface with QHDL, we propose to use synchronous techniques that are commonplace in digital hardware design. We illustrate examples of modeling both loosely-coupled and tightly-coupled quantum circuits that use so-called measurement-in-the-middle by utilizing these techniques in QHDL. For clock-cycle accurate implementations, we propose implementing such classical modules as programmable hardware blocks using Register-Transfer Level (RTL) or gate-level approaches. These approaches provide the highest coupling performance and are feasible to be implemented in state-of-the-art control systems.

Place, publisher, year, edition, pages
Elsevier BV , 2026. Vol. 174, article id 107977
Keywords [en]
Classical feedback, Hardware description languages, Quantum circuits, Quantum computing, Quantum software stack, Quantum–classical algorithms
National Category
Computational Mathematics
Identifiers
URN: urn:nbn:se:kth:diva-368837DOI: 10.1016/j.future.2025.107977ISI: 001524931100003Scopus ID: 2-s2.0-105009494290OAI: oai:DiVA.org:kth-368837DiVA, id: diva2:1994261
Note

QC 20250902

Available from: 2025-09-02 Created: 2025-09-02 Last updated: 2026-05-13Bibliographically approved
In thesis
1. Hardware-Centric Tightly-Coupled Quantum/Classical Computations: A hardware description language for quantum computing
Open this publication in new window or tab >>Hardware-Centric Tightly-Coupled Quantum/Classical Computations: A hardware description language for quantum computing
2026 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

By exploiting quantum mechanical behavior, quantum computers have the potential to carry out classically hard computations, such as the prime factorization of integers, with disruptive, exponentially better efficiency, yet they struggle with classically simple task like integer addition. Hybrid applications, combining both quantum and classical computations, attempt to take advantage of the strength of both approaches while avoiding their weaknesses. In such applications, the design of the interface between quantum and classical computers deserves attention as a potential performance bottleneck.

In this thesis, the design of a modular software stack for hybrid quantum/classical applications that is agnostic to the used quantum technology platform is developed both for high-level application-oriented as well as high-performance low-level use-cases. A hardware description language for quantum circuits derived from the industry standard VHDL language is proposed, and its usage in tightly-coupled hybrid applications, where quantum and classical computations overlap in time, is discussed. To enable low-latency coupling, the proposed hybrid architecture connects quantum computations to hardware implementations of timing critical classical computations and utilizes established hardware/software co-design patterns to interface higher-level classical computations.

Experimental evidence of noise effects on state-of-the-art quantum hardware is presented for the case of solving partial differential equations. This supports the conclusion that frequent interaction between short and shallow quantum and classical computations is necessary even for loosely-coupled hybrid applications under these circumstances, strengthening the case for a low-latency, high-bandwidth quantum-classical interface as proposed in this thesis.

Abstract [sv]

Genom att utnyttja kvantmekaniska effekter har kvantdatorer potentialen att lösa klassiskt svåra beräkningsproblem, som exempelvis primtalsfaktorisering av heltal, med exponentiellt bättre effektivitet, medan de har svårt att lösa klassiskt enkla uppgifter såsom summering av heltal. Hybrida applikationer, som kombinerar båda kvant- och klassiska beräkningar, försöker utnyttja styrkorna av båda tillvägagångssätten och undviker deras svagheter. Sådana applikationer behöver ta hänsyn till utformningen av gränssnittet mellan kvant- och klassiska datorer för att undvika flaskhalsar som begränsar prestandan.

I denna avhandling utvecklas en modulär mjukvarustack för hybrida kvant/klassiska applikationer som är agnostisk till den underliggande kvantteknologiska plattformen. Användningen i både högnivå, applikationsbaserade såväl som i lågnivå, högprestanda scenarierna diskuteras. Ett hårdvarubeskrivningsspråk för kretsbaserade kvantberäkningar baserat på industristandardspråket VHDL med fokus på tätt kopplade hybrida applikationer, där kvant- och klassiska beräkningar överlappar i tid, presenteras. För att minimera latensen vid informationsöverföringen mellan kvant- och klassiska beräkningar föreslås att tidskritiska klassiska delar realiseras i programmerbar hårdvara. Existerande lösningar från samordnad hård- och mjukvarudesign kan användas för att sammankoppla de klassiska lågnivåberäkningarna med högnivåmjukvaran.

En experimentell undersökning av effekten av brus i kontemporära kvantdatorer på beräkningsresultat för lösningen av partiella differentialekvationer presenteras. Den understryker vikten av sammankopplingen av talrika korta kvantberäkningar med hjälp av klassiska metoder även för löst kopplade användningar. Detta resultat bekräftar behovet av kvant/klassiska gränssnitt med låg latens och hög bandbredd.

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2026. p. xv, 61
Series
TRITA-EECS-AVL ; 2026:54
Keywords
quantum computing, quantum control systems, hybrid quantum/classical applications, hardware description languages, register-transfer-level models, programmable logic, FPGAs, VHDL, kvantberäkningar, digitala styrsystem för kvantdatorer, hybrida kvant/klassiska användningar, hårdvarubeskrivningsspråk, register-transfer modeller, programmerbar logik, FPGA, VHDL
National Category
Computer Sciences
Research subject
Computer Science
Identifiers
urn:nbn:se:kth:diva-381105 (URN)978-91-8106-631-9 (ISBN)
Public defence
2026-06-10, https://kth-se.zoom.us/s/69771296581, D3, Lindstedtsvägen 5, Stockholm, 14:00 (English)
Opponent
Supervisors
Note

QC 20260513

Available from: 2026-05-13 Created: 2026-05-12 Last updated: 2026-05-13Bibliographically approved

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Netzer, GilbertHegde, Pratibha RaghupatiPeng, IvyMarkidis, Stefano

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