Future multi-terminal high-voltage direct current (HVDC) grids require compact and efficient DC-DC converters to interconnect lines operating at different voltage levels. However, at the gigawatt scale, these converters face strict size and cost constraints. This paper investigates a 1 GW, 500 kV isolated DC-DC converter based on a modular multilevel converter (MMC) architecture and analyzes how operating frequency and semiconductor technology influence total losses and converter volume. Analytical transformer models, validated through finiteelement simulations, are combined with detailed loss calculations for both silicon (Si) insulated-gate bipolar transistor (IGBT) and silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) implementations using multiple die-area configurations. The results show that transformer losses reach a minimum at approximately 125 Hz, while total system efficiency strongly depends on the converter characteristics. Increasing the SiC die area reduces conduction losses but increases switching losses, leading to a frequency-dependent optimum. SiC-based converters achieve significantly lower losses and smaller volume than IGBT-based ones within the practical operating range. However, core losses increase rapidly with frequency and impose a practical limit on further frequency elevation. Moreover, beyond a certain frequency, the cooling system volume exceeds that of the capacitors, indicating another volumetric limitation. These findings provide quantitative design guidelines for compact and efficient HVDC DC-DC converters.
Part of ISBN 9798331571887
QC 20260717