In this paper the impact of the parasitic capacitance ofthe inductor on the performance of a fast-switching boostconverters with SiC JFETs is discussed. Two inductor designs,one conventional and another with a space between the windinglayers, are investigated and their parasitic capacitances aremeasured by different methods. The air-gap between the windinglayers reduced the inductor self-capacitance more than 8 times.The two inductors were used in a 2 kW, 100 kHz boost converterwith a normally-on SiC JFET and their performance wascompared. When the inductor with a low self-capacitance wasused, there were fewer oscillations during the switchingtransients and the losses were reduced about 16 %.
QC 20121005