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Performance analysis of on-chip bufferless router with multi-ejection ports
KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektroniksystem.
KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektroniksystem.ORCID-id: 0000-0003-0061-3475
KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektroniksystem.ORCID-id: 0000-0003-2251-0004
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2015 (engelsk)Inngår i: Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015, IEEE conference proceedings, 2015Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

In general, the bufferless NoC router has only one local output port for ejection, which may lead to multiple arriving flits competing for the only one output port. In this paper, we propose a reconfigurable bufferless router in which the number of ejection ports can be configured as 2, 3 and 4. Simulation results demonstrate that the average packet latency of the routers with multi-ejection ports is 18%, 10%, 6%, 14%, 9% and 7% on average less than that of the router with 1 ejection ports under six synthetic workloads respectively. For application workloads, the average packet latency of the router with more than two ejection ports is slightly better than the router with only one ejection port, which can be neglect. Making a compromise of hardware cost and performance, it can be concluded that it is no need to implement bufferless routers with 3 and 4 ejection ports, as the router with 2 ejection ports can achieve almost the same performance as the routers with 3 and 4 ejection ports.

sted, utgiver, år, opplag, sider
IEEE conference proceedings, 2015.
Emneord [en]
Network-on-chip, Reconfigurable hardware, Average packet latencies, Bufferless routers, Hardware cost, Local output, Output ports, Performance analysis, Reconfigurable, Synthetic workloads, Routers
HSV kategori
Identifikatorer
URN: urn:nbn:se:kth:diva-197128DOI: 10.1109/ASICON.2015.7517174ISI: 000398709000300Scopus ID: 2-s2.0-84982242165ISBN: 9781479984831 (tryckt)OAI: oai:DiVA.org:kth-197128DiVA, id: diva2:1056249
Konferanse
11th IEEE International Conference on Advanced Semiconductor Integrated Circuits (ASIC), ASICON 2015, 3 November 2015 through 6 November 2015
Merknad

QC 20161214

Tilgjengelig fra: 2016-12-14 Laget: 2016-11-30 Sist oppdatert: 2024-03-15bibliografisk kontrollert

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Lu, ZhonghaiJantsch, Axel

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Totalt: 164 treff
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