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A Reconfigurable Near-Sensor Processor for Anomaly Detection in Limb Prostheses
State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China.
State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China.
KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion.ORCID-id: 0000-0002-8028-3607
KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion, Mekatronik och inbyggda styrsystem.ORCID-id: 0000-0001-7048-0108
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2024 (Engelska)Ingår i: IEEE Transactions on Biomedical Circuits and Systems, ISSN 1932-4545, E-ISSN 1940-9990, Vol. 18, nr 5, s. 976-989Artikel i tidskrift (Refereegranskat) Published
Abstract [en]

This paper presents a reconfigurable near-sensor anomaly detection processor to real-time monitor the potential anomalous behaviors of amputees with limb prostheses. The processor is low-power, low-latency, and suitable for equipment on the prostheses and comprises a reconfigurable Variational Autoencoder (VAE), a scalable Self-Organizing Map (SOM) Array, and a window-size-adjustable Markov Chain, which can implement an integrated miniaturized anomaly detection system. With the reconfigurable VAE, the proposed processor can support up to 64 sensor sampling channels programmable by global configuration, which can meet the anomaly detection requirements in different scenarios. A scalable SOM array allows for the selection of different sizes based on the complexity of the data. Unlike traditional time accumulation-based anomaly detection methods, the Markov Chain is utilized to detect time-series-based anomalous data. The processor is designed and fabricated in a UMC 40-nm LP technology with a core area of 1.49 mm2 and a power consumption of 1.81 mW. It achieves real-time detection performance with 0.933 average F1 Score for the FSP dataset within 24.22 s, and 0.956 average F1 Score for the SFDLA-12 dataset within 30.48 s, respectively. The energy dissipation of detection for each input feature is 43.84 nJ with the FSP dataset, and 55.17 nJ with the SFDLA-12 dataset. Compared with ARM Cortex-M4 and ARM Cortex-M33 microcontrollers, the processor achieves energy and area efficiency improvements ranging from 257×, 193× and 11×, 8×, respectively. IEEE

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Institute of Electrical and Electronics Engineers (IEEE) , 2024. Vol. 18, nr 5, s. 976-989
Nationell ämneskategori
Elektroteknik och elektronik
Identifikatorer
URN: urn:nbn:se:kth:diva-347939DOI: 10.1109/tbcas.2024.3370571ISI: 001322633800007PubMedID: 38416632Scopus ID: 2-s2.0-85187023500OAI: oai:DiVA.org:kth-347939DiVA, id: diva2:1871831
Projekt
EU Horizon SocketSense, Grant agreement ID: 825429
Anmärkning

QC 20241024

Tillgänglig från: 2024-06-17 Skapad: 2024-06-17 Senast uppdaterad: 2024-10-24Bibliografiskt granskad

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Su, PengChen, DeJiu

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IEEE Transactions on Biomedical Circuits and Systems
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